abhishek-kaushik22 015aed18ee

[SelectionDAG] WidenVecOp_INSERT_SUBVECTOR - Replace INSERT_SUBVECTOR with series of INSERT_VECTOR_ELT (#124420) ...

If the operands to `INSERT_SUBVECTOR` can't be widened legally, just
replace the `INSERT_SUBVECTOR` with a series of `INSERT_VECTOR_ELT`.

Closes #124255 (and possibly #102016)

2025-01-28 18:54:49 +05:30

..

AArch64

Reapply "[AArch64] Combine and and lsl into ubfiz" (#123356) (#124576)

2025-01-28 11:27:34 +00:00

AMDGPU

[DAGISel] Fix MMRA Handling in copyExtraInfo (#124730)

2025-01-28 13:27:26 +01:00

ARC

…

ARM

[PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (#122654)

2025-01-22 13:15:40 +07:00

AVR

[AVR] Force relocations for non-encodable jumps (#121498)

2025-01-20 09:23:57 +08:00

BPF

…

CSKY

…

DirectX

[HLSL][SPIRV][DXIL] Implement WaveActiveMax intrinsic (#123428)

2025-01-27 23:26:56 -08:00

Generic

…

Hexagon

[llvm][CodeGen] Fix the issue caused by live interval checking in window scheduler (#123184)

2025-01-23 09:39:03 +08:00

Inputs

…

Lanai

…

LoongArch

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)

2025-01-23 12:49:35 -08:00

M68k

[M68k] Fix llc pass test after 3630d9ef65b30af7e4ca78e668649bbc48b5be66

2025-01-23 08:28:25 -05:00

Mips

[Mips] Add the missing judgment when processing function handleMFLOSlot (#121463)

2025-01-24 20:03:03 +08:00

MIR

[AMDGPU] Occupancy w.r.t. workgroup size range is also a range (#123748)

2025-01-23 16:07:57 +01:00

MLRegAlloc

…

MSP430

…

NVPTX

[NVPTX] Add float to tf32 conversion intrinsics (#124316)

2025-01-27 15:52:43 +05:30

PowerPC

[PowerPC] Fix saving of Link Register when using ROP Protect (#123101)

2025-01-22 13:44:20 -05:00

RISCV

[RISCV][VLOPT] Fix some typos in vl-opt-op-info.mir test. NFC

2025-01-28 20:28:02 +08:00

SPARC

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)

2025-01-23 12:49:35 -08:00

SPIRV

[HLSL][SPIRV][DXIL] Implement WaveActiveMax intrinsic (#123428)

2025-01-27 23:26:56 -08:00

SystemZ

[MachineSink] Extend loop sinking capability (#117247)

2025-01-23 17:08:23 -08:00

Thumb

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)

2025-01-23 12:49:35 -08:00

Thumb2

Revert "[MachineLICM] Use RegisterClassInfo::getRegPressureSetLimit (#119826)"

2025-01-10 09:05:06 +01:00

VE

…

WebAssembly

[WebAssembly] Fix catch block type in wasm64 (#124381)

2025-01-27 11:01:48 -08:00

WinCFGuard

…

WinEH

…

X86

[SelectionDAG] WidenVecOp_INSERT_SUBVECTOR - Replace INSERT_SUBVECTOR with series of INSERT_VECTOR_ELT (#124420)

2025-01-28 18:54:49 +05:30

XCore

…

Xtensa

…