50 lines
2.0 KiB
LLVM
50 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s
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define i32 @rocrand_regression(ptr addrspace(1) %arg, i32 %arg0, i1 %cmp7) {
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; CHECK-LABEL: rocrand_regression:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: v_and_b32_e32 v0, 1, v3
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; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0
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; CHECK-NEXT: s_xor_b64 s[4:5], vcc, -1
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; CHECK-NEXT: s_mov_b32 s8, 0
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; CHECK-NEXT: .LBB0_1: ; %do.body
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; CHECK-NEXT: ; =>This Loop Header: Depth=1
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; CHECK-NEXT: ; Child Loop BB0_2 Depth 2
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; CHECK-NEXT: s_mov_b64 s[6:7], 0
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; CHECK-NEXT: .LBB0_2: ; %while.cond
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; CHECK-NEXT: ; Parent Loop BB0_1 Depth=1
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; CHECK-NEXT: ; => This Inner Loop Header: Depth=2
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; CHECK-NEXT: s_and_b64 s[10:11], exec, s[4:5]
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; CHECK-NEXT: s_or_b64 s[6:7], s[10:11], s[6:7]
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; CHECK-NEXT: s_andn2_b64 exec, exec, s[6:7]
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; CHECK-NEXT: s_cbranch_execnz .LBB0_2
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; CHECK-NEXT: ; %bb.3: ; %do.cond
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; CHECK-NEXT: ; in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: s_or_b64 exec, exec, s[6:7]
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; CHECK-NEXT: s_or_b32 s8, s8, 1
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; CHECK-NEXT: s_cbranch_execnz .LBB0_1
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; CHECK-NEXT: ; %bb.4: ; %DummyReturnBlock
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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entry:
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br label %do.body
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do.body: ; preds = %do.cond, %entry
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%phi.0 = phi i32 [ %arg0, %do.cond ], [ 0, %entry ]
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%phi.1 = phi i32 [ %add6, %do.cond ], [ 0, %entry ]
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%add6 = or i32 %phi.1, 1
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store i32 %phi.1, ptr addrspace(1) %arg, align 4
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br label %while.cond
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while.cond: ; preds = %while.cond, %do.body
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%phi.2 = phi i32 [ %phi.0, %do.body ], [ 0, %while.cond ]
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br i1 %cmp7, label %while.cond, label %do.cond
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do.cond: ; preds = %while.cond
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br i1 true, label %do.body, label %do.end
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do.end: ; preds = %do.cond
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ret i32 %phi.2
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}
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