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llvm-project/llvm/test/CodeGen
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Bradley Smith 026bb84bcd [AArch64][SVE] Add ISel patterns for floating point compare with zero instructions 
Additionally, lower the floating point compare SVE intrinsics to
SETCC_MERGE_ZERO ISD nodes to avoid duplicating ISel patterns.

Differential Revision: https://reviews.llvm.org/D105486
2021-07-08 10:46:12 +00:00
..
AArch64
[AArch64][SVE] Add ISel patterns for floating point compare with zero instructions
2021-07-08 10:46:12 +00:00
AMDGPU
[AMDGPU] Disable garbage collection passes
2021-07-07 15:47:57 -07:00
ARC
…
ARM
[DAG] Reassociate Add with Or
2021-07-07 10:21:07 +01:00
AVR
Place the BlockAddress type in the address space of the containing function
2021-07-02 12:17:55 +01:00
BPF
BPF: Add more relocation kinds
2021-05-25 08:19:13 -07:00
Generic
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
Hexagon
[DAG] Reassociate Add with Or
2021-07-07 10:21:07 +01:00
Inputs
…
Lanai
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
M68k
[M68k][GloballSel] Lower outgoing return values in IRTranslator
2021-07-05 11:39:09 -07:00
Mips
GlobalISel/AArch64: don't optimize away redundant branches at -O0
2021-07-07 12:51:55 -07:00
MIR
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
MSP430
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
NVPTX
tests/CodeGen: Use %python lit substitution when invoking python
2021-07-06 18:46:36 -07:00
PowerPC
[PowerPC] Fix i64 to vector lowering on big endian
2021-07-08 11:05:09 +08:00
RISCV
[RISCV] Implement lround*/llround*/lrint*/llrint* with fcvt instruction with -fno-math-errno
2021-07-06 11:43:22 -07:00
SPARC
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
SystemZ
[DAG] Reassociate Add with Or
2021-07-07 10:21:07 +01:00
Thumb
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
Thumb2
[ARM] Add some opaque pointer gather/scatter tests. NFC
2021-07-07 22:03:53 +01:00
VE
[LegalizeTypes][VE] Don't Expand BITREVERSE/BSWAP during type legalization promotion if they will be promoted for NVT in op legalization.
2021-06-29 11:00:11 -07:00
WebAssembly
[WebAssembly] Optimize out shift masks
2021-07-07 23:14:31 -07:00
WinCFGuard
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
WinEH
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
X86
Recommit [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers.
2021-07-06 12:16:05 -07:00
XCore
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00