Daniel Paoliello 027f5ba24e

[win][aarch64] Enable the llvm/test/CodeGen/WinEH tests for AArch64 (#147860) ...

Enabled AArch64 runs for these tests where it made sense.

Also removed the "temporary" suffixes filter that was added over 10
years ago, I believe the "misched-copy.s output file" has been cleaned
from the runners by now...

2025-07-14 15:07:00 -07:00

..

AArch64

[AArch64] computeKnownBitsForTargetNode - add AArch64ISD::MOVIshift support (#148634)

2025-07-14 20:36:51 +01:00

AMDGPU

[AMDGPU] Add support for v_tanh_bf16 on gfx1250 (#147425)

2025-07-14 16:30:18 -04:00

ARC

…

ARM

[ARM][ fp16-promote.ll - cleanup CHECKS to be consistently inside each test. NFC.

2025-07-14 14:41:21 +01:00

AVR

[AVR] Simplify SPWRITE on XMEGA (#147210)

2025-07-14 09:40:37 +08:00

BPF

[BPF] remove_truncate_9.ll - regenerate test checks

2025-07-11 13:17:08 +01:00

CSKY

…

DirectX

[DirectX] Legalize lifetime intrinsics for DXIL (#148003)

2025-07-11 12:26:53 -07:00

Generic

[IR] Add a test for f128 libm libcall lowering (NFC) (#148308)

2025-07-14 14:29:20 +02:00

Hexagon

DAG: Use fast variants of fast math libcalls (#147481)

2025-07-13 10:41:45 +09:00

Inputs

CodeGen: Convert test to opaque pointers (#147886)

2025-07-10 17:01:19 +09:00

Lanai

…

LoongArch

[LoongArch] Optimize 128-to-256-bit vector insertion and 256-to-128-bit subvector extraction (#146300)

2025-07-11 14:32:14 +08:00

M68k

…

Mips

Mips: Remove test for ldexp with x86_fp80 (#148641)

2025-07-15 00:50:16 +09:00

MIR

[NVPTX] Rework and cleanup FTZ ISel (#146410)

2025-07-09 11:16:48 -07:00

MLRegAlloc

[mlgo] Fix test post - #147716 (#148259)

2025-07-12 12:24:01 +02:00

MSP430

DAG: Fix asserting in error case for powi softening (#147237)

2025-07-07 18:13:11 +09:00

NVPTX

[NVPTX] Use PRMT more widely, and improve folding around this instruction (#148261)

2025-07-13 15:06:53 -07:00

PowerPC

[DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::FCOPYSIGN (#148617)

2025-07-14 15:28:52 +01:00

RISCV

[RISCV] Improve hasAllNBitUsers for SLLIW. (#148344)

2025-07-14 09:02:10 -07:00

SPARC

SPARC: Add gnu run line to sincos test (#147714)

2025-07-14 18:21:45 +09:00

SPIRV

[SPIRV] Add more id and range builtIns (#143909)

2025-07-09 13:52:06 +01:00

SystemZ

[Test] Mark a number of libcall tests nounwind (#148329)

2025-07-12 11:57:28 +02:00

Thumb

…

Thumb2

[LSR] Account for hardware loop instructions (#147958)

2025-07-14 16:48:54 +01:00

VE

…

WebAssembly

[WebAssembly] Add patterns for relaxed madd (#147487)

2025-07-15 00:56:28 +08:00

WinCFGuard

…

WinEH

[win][aarch64] Enable the llvm/test/CodeGen/WinEH tests for AArch64 (#147860)

2025-07-14 15:07:00 -07:00

X86

[Test] Mark a number of libcall tests nounwind (#148329)

2025-07-12 11:57:28 +02:00

XCore

XCore: Add test for sincos and exp10 intrinsics (#148621)

2025-07-14 23:42:45 +09:00

Xtensa

…