llvm-project

65704-illegal-instruction.ll

[MachineLICM] Hoist copies of constant physical register (#93285 )

2024-05-29 14:10:01 +08:00

abd.ll

[RISCV] Enable sub(max, min) lowering for ABDS and ABDU (#86592 )

2024-03-25 20:13:53 -07:00

abs-sdnode.ll

…

abs-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

access-fixed-objects-by-rvv.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

active_lane_mask.ll

[RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (#93352 )

2024-05-28 15:05:23 -07:00

addi-rvv-stack-object.mir

[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001 )

2024-03-18 10:37:59 -04:00

addi-scalable-offset.mir

[RISCV] Change more undef passthrus to $noreg in vector tests. NFC

2024-05-07 16:02:18 +08:00

aliases.mir

…

alloca-load-store-scalable-array.ll

[CodeGen] Update for scalable MemoryType in MMO (#70452 )

2024-03-23 12:56:25 +00:00

alloca-load-store-scalable-struct.ll

[CodeGen] Update for scalable MemoryType in MMO (#70452 )

2024-03-23 12:56:25 +00:00

allocate-lmul-2-4-8.ll

[RISCV] Use shNadd for scalable stack offsets (#88062 )

2024-04-09 07:29:10 -07:00

allone-masked-to-unmasked.ll

…

binop-splats.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

binop-zext.ll

[RISCV] Combine ({s,u}{div,rem} (zext, zext)) -> (zext ({s,u}{div,rem} (zext, zext))) (#86779 )

2024-03-29 05:55:38 +08:00

bitreverse-sdnode.ll

[DAG] SimplifyDemandedBits - use ComputeKnownBits instead of getValidShiftAmountConstant to check for constant shift amounts. (#92412 )

2024-05-16 17:04:30 +01:00

bitreverse-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

bswap-sdnode.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

bswap-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

callee-saved-regs.ll

[RISCV] Exclude vector callee saved registers from RISCVRegisterInfo::needsFrameBaseReg

2024-05-13 13:38:41 -07:00

calling-conv-fastcc.ll

[RISCV] Remove x7 from fastcc list. (#96729 )

2024-07-17 08:37:55 +08:00

calling-conv.ll

[RISCV] Remove hasSideEffects=1 for vsetvli pseudos (#91319 )

2024-05-15 23:37:31 +08:00

ceil-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

cmp-folds.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

combine-sats.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

combine-splats.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

combine-store-extract-crash.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

combine-store.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

common-shuffle-patterns.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

commutable.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

commuted-op-indices-regression.mir

[test] -march -> -mtriple (#67741 )

2023-09-29 10:43:23 -07:00

compressstore.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

concat-vector-insert-elt.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

concat-vectors-constant-stride.ll

[RISCV] Move RISCVInsertVSETVLI to after phi elimination (#91440 )

2024-05-15 11:44:32 +08:00

constant-folding-crash.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

constant-folding.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

copyprop.mir

[RISCV] Change more undef passthrus to $noreg in vector tests. NFC

2024-05-07 16:02:18 +08:00

cross-block-cse.ll

[RISCV] Use NoReg in place of IMPLICIT_DEF for undefined passthru operands

2023-08-14 12:57:38 -07:00

ctlz-sdnode.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

ctlz-vp.ll

[LegalizeDAG] Optimize CodeGen for ISD::CTLZ_ZERO_UNDEF (#83039 )

2024-07-08 14:01:32 +01:00

ctpop-sdnode.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

ctpop-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

cttz-sdnode.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

cttz-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

debug-info-rvv-dbg-value.mir

[test] Change llc -march= to -mtriple=

2023-09-11 14:42:37 -07:00

dont-sink-splat-operands.ll

Revert "[RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default" (#98328 )

2024-07-10 15:33:20 +01:00

double-round-conv.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

emergency-slot.mir

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

expand-no-v.ll

…

extload-truncstore.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

extract-subvector.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

extractelt-fp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

extractelt-i1.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

extractelt-int-rv32.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

extractelt-int-rv64.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fceil-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

fceil-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

ffloor-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

ffloor-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

fixed-vector-i8-index-cornercase.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-abd.ll

[RISCV] Enable sub(max, min) lowering for ABDS and ABDU (#86592 )

2024-03-25 20:13:53 -07:00

fixed-vectors-abs-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-abs.ll

[RISCV] Narrow vector absolute value (#82041 )

2024-02-16 19:26:06 -08:00

fixed-vectors-binop-splats.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

fixed-vectors-bitcast-large-vector.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-bitcast.ll

[RISCV] Use BuildPairF64 and SplitF64 for bitcast i64<->f64 on rv32 regardless of Zfa. (#85982 )

2024-03-21 08:52:51 -07:00

fixed-vectors-bitreverse-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-bitreverse.ll

[RISCV] Use NewVL in splatPartsI64WithVL. (#83690 )

2024-03-02 17:08:48 -08:00

fixed-vectors-bswap-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-bswap.ll

[RISCV] Remove -riscv-v-fixed-length-vector-lmul-max from tests. NFC (#78299 )

2024-02-14 16:12:37 +08:00

fixed-vectors-buildvec-of-binop.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-calling-conv-fastcc.ll

[RISCV] Remove x7 from fastcc list. (#96729 )

2024-07-17 08:37:55 +08:00

fixed-vectors-calling-conv.ll

[RISCV] Remove -riscv-v-fixed-length-vector-lmul-max from tests. NFC (#78299 )

2024-02-14 16:12:37 +08:00

fixed-vectors-ceil-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-compressstore-fp.ll

[RISCV] Support llvm.masked.compressstore intrinsic (#83457 )

2024-03-13 15:18:51 -04:00

fixed-vectors-compressstore-int.ll

[RISCV] Support llvm.masked.compressstore intrinsic (#83457 )

2024-03-13 15:18:51 -04:00

fixed-vectors-ctlz-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-ctlz.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

fixed-vectors-ctpop-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-ctpop.ll

[RISCV] Use NewVL in splatPartsI64WithVL. (#83690 )

2024-03-02 17:08:48 -08:00

fixed-vectors-cttz-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-cttz.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

fixed-vectors-deinterleave-load.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-elen.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-emergency-slot.mir

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

fixed-vectors-expandload-fp.ll

[RISCV][InsertVSETVLI] Eliminate the AVLIsIgnored state (#94658 )

2024-06-17 08:20:37 -07:00

fixed-vectors-expandload-int.ll

[RISCV][InsertVSETVLI] Eliminate the AVLIsIgnored state (#94658 )

2024-06-17 08:20:37 -07:00

fixed-vectors-extload-truncstore.ll

[RISCV] Remove -riscv-v-fixed-length-vector-lmul-max from tests. NFC (#78299 )

2024-02-14 16:12:37 +08:00

fixed-vectors-extract-i1.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-extract-subvector.ll

[RISCV] Unify getDemanded between forward and backwards passes in RISCVInsertVSETVLI (#92860 )

2024-05-21 14:11:42 +08:00

fixed-vectors-extract.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-fceil-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

fixed-vectors-ffloor-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

fixed-vectors-floor-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-fmaximum-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-fmaximum.ll

[RISCV] Move V0 to the end of register allocation order (#82967 )

2024-03-01 12:17:56 +08:00

fixed-vectors-fmf.ll

[RISCV] Split widening floating point fused multiple-add pseudo instructions by SEW

2024-04-12 07:06:40 -07:00

fixed-vectors-fminimum-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-fminimum.ll

[RISCV] Move V0 to the end of register allocation order (#82967 )

2024-03-01 12:17:56 +08:00

fixed-vectors-fnearbyint-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

fixed-vectors-fp2i-sat.ll

[RISCV] Use vnclip(u) to handle fp_to_(s/u)int_sat that needs additional narrowing. (#100071 )

2024-07-23 09:09:35 -07:00

fixed-vectors-fp2i.ll

[RISCV] Remove -riscv-v-fixed-length-vector-lmul-max from tests. NFC (#78299 )

2024-02-14 16:12:37 +08:00

fixed-vectors-fp-bitcast.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

fixed-vectors-fp-buildvec.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-fp-conv.ll

[RISCV] Remove -riscv-v-fixed-length-vector-lmul-max from tests. NFC (#78299 )

2024-02-14 16:12:37 +08:00

fixed-vectors-fp-interleave.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-fp-setcc.ll

[RISCV] Promote SETCC and VP_SETCC of f16 vectors when only have zvfhmin (#66866 )

2023-09-27 11:00:19 +08:00

fixed-vectors-fp-shuffles.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-fp-splat.ll

[RISCV] Don't custom legalize vXf16 SPLAT_VECTOR with Zvfhmin without Zfhmin.

2024-07-08 22:44:58 -07:00

fixed-vectors-fp-vrgather.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-fp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-fpext-vp.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-fptosi-vp-mask.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-fptosi-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-fptoui-vp-mask.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-fptoui-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-fptrunc-vp.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-fround-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

fixed-vectors-fround.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-froundeven-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

fixed-vectors-froundeven.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-fshr-fshl-vp.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-ftrunc-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

fixed-vectors-i2fp.ll

[RISCV] Remove hasSideEffects=1 for vsetvli pseudos (#91319 )

2024-05-15 23:37:31 +08:00

fixed-vectors-insert-i1.ll

[RISCV] Reduce LMUL when index is known when lowering insert_vector_elt (#66087 )

2023-09-27 20:26:36 +01:00

fixed-vectors-insert-subvector-shuffle.ll

[RISCV] Fold ops into vmv.v.v as vmerge with all-ones mask

2023-07-19 17:24:42 +01:00

fixed-vectors-insert-subvector.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-insert.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-int-buildvec.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-int-explodevector.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-int-exttrunc.ll

[RISCV] Remove -riscv-v-fixed-length-vector-lmul-max from tests. NFC (#78299 )

2024-02-14 16:12:37 +08:00

fixed-vectors-int-interleave.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-int-setcc.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-int-shuffles.ll

[RISCV] Reorder shuffle operands if one side is an identity (#98534 )

2024-07-11 13:52:41 -07:00

fixed-vectors-int-splat.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-int-vrgather.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-int.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-interleave-store.ll

Move several vector intrinsics out of experimental namespace (#88748 )

2024-04-29 10:16:45 +01:00

fixed-vectors-interleaved-access-zve32x.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-interleaved-access.ll

[RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (#93352 )

2024-05-28 15:05:23 -07:00

fixed-vectors-inttoptr-ptrtoint.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-llrint-vp.ll

[VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (#82627 )

2024-02-26 16:37:41 +08:00

fixed-vectors-llrint.ll

[RISCV][InsertVSETVLI] Eliminate the AVLIsIgnored state (#94658 )

2024-06-17 08:20:37 -07:00

fixed-vectors-load-store.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-load.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-lrint-vp.ll

[RISCV] Fix missing CHECK prefixes in vector lrint test files. NFC

2024-04-08 16:01:18 -07:00

fixed-vectors-lrint.ll

[RISCV][InsertVSETVLI] Eliminate the AVLIsIgnored state (#94658 )

2024-06-17 08:20:37 -07:00

fixed-vectors-marith-vp.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-mask-buildvec.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-mask-load-store.ll

[RISCV] Remove -riscv-v-fixed-length-vector-lmul-max from tests. NFC (#78299 )

2024-02-14 16:12:37 +08:00

fixed-vectors-mask-logic.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-mask-splat.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-masked-gather.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-masked-load-fp.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-masked-load-int.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-masked-scatter.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-masked-store-fp.ll

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038 )"

2023-10-09 12:31:32 +01:00

fixed-vectors-masked-store-int.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-nearbyint-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-non-power-of-2.ll

[RISCV][test] Precommit test for non-power-of-2 VLS type code gen

2024-06-28 14:23:13 +08:00

fixed-vectors-peephole-vmerge-vops.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-reduction-formation.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-reduction-fp-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-reduction-fp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-reduction-int-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-reduction-int.ll

[RISCV] Use EXTLOAD in lowerVECTOR_SHUFFLE. (#97862 )

2024-07-05 19:34:19 -07:00

fixed-vectors-reduction-mask-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-rint-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-round-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-roundeven-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-roundtozero-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-sad.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-segN-load.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-segN-store.ll

[RISCV] Remove unused check prefixes for tests. NFC

2023-07-24 13:42:49 +08:00

fixed-vectors-select-bf16.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-select-fp.ll

[RISCV] Add back some test cases I inadvertently deleted. NFC

2024-06-24 10:01:52 -07:00

fixed-vectors-select-int.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-setcc-fp-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-setcc-int-vp-mask.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-setcc-int-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-sext-vp-mask.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-sext-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-shuffle-concat.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-shuffle-exact-vlen.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-shuffle-extract-subvector.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

fixed-vectors-shuffle-reverse-bitrotate.ll

Move several vector intrinsics out of experimental namespace (#88748 )

2024-04-29 10:16:45 +01:00

fixed-vectors-shuffle-reverse.ll

[RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (#93352 )

2024-05-28 15:05:23 -07:00

fixed-vectors-shuffle-rotate.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

fixed-vectors-shuffle-transpose.ll

[RISCV] Reorder shuffle operands if one side is an identity (#98534 )

2024-07-11 13:52:41 -07:00

fixed-vectors-shuffle-vslide1down.ll

[DAGCombiner] Don't reduce BUILD_VECTOR to BITCAST before LegalizeTypes if VT is legal.

2023-08-19 12:53:50 +08:00

fixed-vectors-shuffle-vslide1up.ll

[RISCV] Move RISCVInsertVSETVLI to after phi elimination (#91440 )

2024-05-15 11:44:32 +08:00

fixed-vectors-shufflevector-vnsrl.ll

[RISCV] Reorder shuffle operands if one side is an identity (#98534 )

2024-07-11 13:52:41 -07:00

fixed-vectors-sitofp-vp-mask.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-sitofp-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-stepvector.ll

[RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (#93352 )

2024-05-28 15:05:23 -07:00

fixed-vectors-store-merge-crash.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-store.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-strided-load-combine.ll

[RISCV] Use VP strided load in concat_vectors combine (#98131 )

2024-07-09 18:36:00 +08:00

fixed-vectors-strided-load-store-asm.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-strided-load-store-negative.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-strided-load-store.ll

[RISCV] Emit VP strided loads/stores in RISCVGatherScatterLowering (#98111 )

2024-07-24 13:56:22 +08:00

fixed-vectors-strided-vpload.ll

[RISCV] Don't expand zero stride vp.strided.load if SEW>XLEN (#98924 )

2024-07-16 10:29:53 +08:00

fixed-vectors-strided-vpstore.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-trunc-sat-clip.ll

[RISCV] Support multiple levels of truncates in combineTruncToVnclip. (#93752 )

2024-05-31 09:09:12 -05:00

fixed-vectors-trunc-vp-mask.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-trunc-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-uitofp-vp-mask.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-uitofp-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-unaligned.ll

[RISCV][InsertVSETVLI] Eliminate the AVLIsIgnored state (#94658 )

2024-06-17 08:20:37 -07:00

fixed-vectors-vaaddu.ll

[RISCV] Select ISD::AVGCEILS/AVGFLOORS as vaadd. (#92839 )

2024-05-20 23:24:22 -07:00

fixed-vectors-vadd-vp-mask.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vadd-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vand-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vcopysign-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vdiv-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vdivu-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vfabs-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vfadd-constrained-sdnode.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vfadd-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfclass-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfclass.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vfcmp-constrained-sdnode.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vfcmps-constrained-sdnode.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vfdiv-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

fixed-vectors-vfdiv-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfma-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vfmacc-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfmadd-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

fixed-vectors-vfmax-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vfmax.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vfmin-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vfmin.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vfmsac-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfmsub-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

fixed-vectors-vfmul-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

fixed-vectors-vfmul-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfmuladd-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vfneg-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vfnmacc-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfnmadd-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

fixed-vectors-vfnmsac-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfnmsub-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

fixed-vectors-vfpext-constrained-sdnode.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-vfptoi-constrained-sdnode.ll

[RISCVInsertVSETVLI] Default to VL=1 for scalar extracts

2023-08-16 07:35:00 -07:00

fixed-vectors-vfptrunc-constrained-sdnode.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-vfrdiv-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfrsub-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfsqrt-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

fixed-vectors-vfsqrt-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vfsub-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

fixed-vectors-vfsub-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vfw-web-simplification.ll

[RISCV] Add FMA support to combineOp_VLToVWOp_VL. (#100454 )

2024-07-26 09:12:40 -07:00

fixed-vectors-vfwadd.ll

[RISCV] Form VFWMUL.VF and VFWADD.VF/WF when fp_extend is scalar and then splatted. (#98590 )

2024-07-15 17:50:23 -07:00

fixed-vectors-vfwmacc.ll

[RISCV] Add FMA support to combineOp_VLToVWOp_VL. (#100454 )

2024-07-26 09:12:40 -07:00

fixed-vectors-vfwmul.ll

[RISCV] Form VFWMUL.VF and VFWADD.VF/WF when fp_extend is scalar and then splatted. (#98590 )

2024-07-15 17:50:23 -07:00

fixed-vectors-vfwsub.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vitofp-constrained-sdnode.ll

[RISCV] Resolve CHECK prefix conflict in fixed-vectors-vitofp-constrained-sdnode.ll. NFC

2024-04-08 16:01:18 -07:00

fixed-vectors-vmacc-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vmax-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vmaxu-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vmin-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vminu-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vmul-vp-mask.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vmul-vp.ll

[DAGCombiner][VP] Add DAGCombine for VP_MUL (#80105 )

2024-05-31 10:17:11 +08:00

fixed-vectors-vnmsac-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vnsra-vnsrl.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vor-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vp-splat.ll

[VP][RISCV] Introduce vp.splat and RISC-V. (#98731 )

2024-07-17 08:40:42 +08:00

fixed-vectors-vpgather.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vpload.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vpmerge-bf16.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-vpmerge.ll

[RISCV] Remove duplicate bf16 testing. NFC

2024-06-13 20:05:24 -07:00

fixed-vectors-vpscatter.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vpstore.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vreductions-mask.ll

[RISCV] Remove -riscv-v-fixed-length-vector-lmul-max from tests. NFC (#78299 )

2024-02-14 16:12:37 +08:00

fixed-vectors-vrem-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vremu-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vrol.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

fixed-vectors-vror.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

fixed-vectors-vrsub-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vsadd-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vsadd.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vsaddu-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vsaddu.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vscale-range.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vselect-vp-bf16.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

fixed-vectors-vselect-vp.ll

[RISCV] Remove duplicate bf16 testing. NFC

2024-06-13 20:05:24 -07:00

fixed-vectors-vselect.ll

[RISCV] Remove hasSideEffects=1 for vsetvli pseudos (#91319 )

2024-05-15 23:37:31 +08:00

fixed-vectors-vshl-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vsra-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vsrl-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fixed-vectors-vssub-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vssub.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vssubu-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vssubu.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vsub-vp-mask.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vsub-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-vw-web-simplification.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vwadd-mask.ll

[RISCV][ISel] Remove redundant vmerge for the vwadd. (#78403 )

2024-01-27 20:03:32 +09:00

fixed-vectors-vwadd.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

fixed-vectors-vwaddu.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-vwmacc.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vwmaccsu.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vwmaccu.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vwmaccus.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

fixed-vectors-vwmul.ll

Re-commit "[RISCV] Use Root instead of N throughout the worklist loop in combineBinOp_VLToVWBinOp_VL. (#99416 )"

2024-07-18 09:10:52 -07:00

fixed-vectors-vwmulsu.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-vwmulu.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fixed-vectors-vwsll.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

fixed-vectors-vwsub-mask.ll

[RISCV][ISel] Remove redundant vmerge for vwsub(u).wv. (#80523 )

2024-02-05 13:59:11 +09:00

fixed-vectors-vwsub.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

fixed-vectors-vwsubu.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

fixed-vectors-vxor-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-xsfvcp-x.ll

[RISCV][SiFive] Reduce intrinsics of SiFive VCIX extension (#79407 )

2024-01-26 11:15:53 +08:00

fixed-vectors-xsfvcp-xv.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

fixed-vectors-xsfvcp-xvv.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

fixed-vectors-xsfvcp-xvw.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

fixed-vectors-zext-vp-mask.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fixed-vectors-zext-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

float-round-conv.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

floor-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fmaximum-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fmaximum-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fminimum-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fminimum-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

fnearbyint-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

fnearbyint-sdnode.ll

[RISCV] Remove hasSideEffects=1 for vsetvli pseudos (#91319 )

2024-05-15 23:37:31 +08:00

fold-binary-reduce.ll

[RISCV] Don't look through EXTRACT_ELEMENT in lowerScalarInsert if the element types are different. (#78668 )

2024-01-18 22:35:24 -08:00

fold-binop-into-select.ll

[DAGCombiner][RISCV] Handle truncating splats in isNeutralConstant (#87338 )

2024-04-04 12:36:15 +08:00

fold-scalar-load-crash.ll

[MachineLICM] Hoist copies of constant physical register (#93285 )

2024-05-29 14:10:01 +08:00

fold-vector-cmp.ll

[RISCV] Start vslide1down sequence with a dependency breaking splat (#72691 )

2023-11-17 12:02:58 -08:00

fold-vp-fadd-and-vp-fmul.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

fold-vp-fsub-and-vp-fmul.ll

…

fpclamptosat_vec.ll

[RISCV] Support (truncate (smin (smax X, C1), C2)) for vnclipu in combineTruncToVnclip. (#93756 )

2024-05-30 15:41:07 -05:00

fptosi-sat.ll

[RISCV] Use vnclip(u) to handle fp_to_(s/u)int_sat that needs additional narrowing. (#100071 )

2024-07-23 09:09:35 -07:00

fptoui-sat.ll

[RISCV] Use vnclip(u) to handle fp_to_(s/u)int_sat that needs additional narrowing. (#100071 )

2024-07-23 09:09:35 -07:00

frameindex-addr.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

frint-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

frm-insert.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

fround-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

fround-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

froundeven-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

froundeven-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

fshr-fshl-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

fshr-fshl.ll

…

ftrunc-constrained-sdnode.ll

[RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (#93356 )

2024-05-28 08:51:42 -07:00

ftrunc-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

get_vector_length.ll

[RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (#82716 )

2024-02-26 10:31:58 -08:00

get-vlen-debugloc.mir

[test] -march -> -mtriple (#67741 )

2023-09-29 10:43:23 -07:00

half-round-conv.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

handle-noreg-with-implicit-def.mir

[CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (#77770 )

2024-02-26 12:12:31 +00:00

implicit-def-copy.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

inline-asm.ll

…

insert-subvector.ll

[RISCV] Convert AVLs with vlenb to VLMAX where possible (#97800 )

2024-07-11 14:22:00 +08:00

insertelt-fp.ll

[RISCV] Reduce LMUL when index is known when lowering insert_vector_elt (#66087 )

2023-09-27 20:26:36 +01:00

insertelt-i1.ll

[RISCV] Reduce LMUL when index is known when lowering insert_vector_elt (#66087 )

2023-09-27 20:26:36 +01:00

insertelt-int-rv32.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

insertelt-int-rv64.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

interleave-crash.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

known-never-zero.ll

[SelectionDAG] Handle VSCALE in isKnownNeverZero (#97789 )

2024-07-05 16:11:06 +08:00

large-rvv-stack-size.mir

[RISCV] Merge machine operand flag MO_PLT into MO_CALL (#77253 )

2024-01-07 12:43:39 -08:00

legalize-load-sdnode.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

legalize-scalable-vectortype.ll

…

legalize-store-sdnode.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

llrint-sdnode.ll

CodeGen/RISCV: increase test coverage of lrint, llrint (#70826 )

2023-10-31 19:16:39 +00:00

llrint-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

load-add-store.ll

[RISCV] Prefer vsetivli for VLMAX when VLEN is exactly known (#75509 )

2024-01-17 12:40:00 -08:00

load-mask.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

localvar.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

lrint-sdnode.ll

[RISCV] Fix missing CHECK prefixes in vector lrint test files. NFC

2024-04-08 16:01:18 -07:00

lrint-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

marith-vp.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

mask-exts-truncs-rv32.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

mask-exts-truncs-rv64.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

mask-reg-alloc.mir

[RISCV] Change more undef passthrus to $noreg in vector tests. NFC

2024-05-07 16:02:18 +08:00

masked-load-fp.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

masked-load-int.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

masked-store-fp.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

masked-store-int.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

masked-tama.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

masked-tamu.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

masked-tuma.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

masked-tumu.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

masked-vslide1down-rv32.ll

…

memcpy-inline.ll

[RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954 )

2024-04-16 15:40:32 -07:00

memory-args.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

memset-inline.ll

[RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954 )

2024-04-16 15:40:32 -07:00

mgather-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

mscatter-combine.ll

[RISCV] Strength reduce mul by 2^N - 2^M (#88983 )

2024-06-20 07:36:48 -07:00

mscatter-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

mul-combine.ll

[RISCV] Combine vXi32 (mul (and (lshr X, 15), 0x10001), 0xffff) -> (bitcast (sra (v2Xi16 (bitcast X)), 15)) (#93565 )

2024-05-28 15:54:44 -07:00

mutate-prior-vsetvli-avl.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

named-vector-shuffle-reverse.ll

Move several vector intrinsics out of experimental namespace (#88748 )

2024-04-29 10:16:45 +01:00

narrow-shift-extend.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

nearbyint-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

no-reserved-frame.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467 )

2024-01-07 12:09:44 -08:00

pass-fast-math-flags-sdnode.ll

[RISCV] Split widening floating point fused multiple-add pseudo instructions by SEW

2024-04-12 07:06:40 -07:00

pr52475.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

pr61561.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

pr63459.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

pr63596.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

pr64588.ll

[RISCV] Truncate constants to EltSize when combine store of BUILD_VECTOR

2023-08-14 10:55:53 +08:00

pr83017.ll

[RISCV] Move exact VLEN VLMAX transform to RISCVVectorPeephole (#100551 )

2024-07-26 07:56:12 +08:00

pr83920.ll

[DAGCombiner] Handle extending EXTRACT_VECTOR_ELTs in calculateByteProvider (#83963 )

2024-03-05 18:31:33 +08:00

pr88576.ll

[LegalizeTypes][RISCV] Support scalable vectors in SplitVecRes_BITCAST/SplitVecOp_BITCAST. (#88590 )

2024-04-13 20:54:09 -07:00

pr88799.ll

[RISCV] Change how MMO is rebuilt in lowerFixedLengthVectorLoadToRVV/lowerFixedLengthVectorStoreToRVV (#88811 )

2024-04-15 22:39:09 -07:00

pr90559.ll

[RISCV] Move exact VLEN VLMAX transform to RISCVVectorPeephole (#100551 )

2024-07-26 07:56:12 +08:00

pr93587.ll

[RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals

2024-06-17 12:05:43 -07:00

pr95865.ll

Revert "[RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default" (#98328 )

2024-07-10 15:33:20 +01:00

pr99782.ll

[RISCV] Update test for #99821 after #100116 . NFC

2024-07-24 12:10:45 +08:00

reg-alloc-reserve-bp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467 )

2024-01-07 12:09:44 -08:00

reg-coalescing.mir

[RISCV] Remove legacy TA/TU pseudo distinction for binary instructions

2023-07-11 10:21:42 -07:00

regalloc-fast-crash.ll

[RISCV] default enable splitting regalloc between RVV and other (#72950 )

2023-11-30 21:12:46 -06:00

remat.ll

[RISCV] Rematerialize vid.v (#97520 )

2024-07-04 11:34:25 +08:00

rint-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

riscv-codegenprepare-asm.ll

[RISCV] Vectorize phi for loop carried @llvm.vector.reduce.fadd (#78244 )

2024-01-18 16:15:20 +07:00

riscv-codegenprepare.ll

[RISCV] Vectorize phi for loop carried @llvm.vector.reduce.fadd (#78244 )

2024-01-18 16:15:20 +07:00

round-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

roundeven-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

roundtozero-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

rv32-spill-vector-csr.ll

[RISCV] Remove unnecessary patterns for tail agnostic FP intrinsics with rounding mode. (#94498 )

2024-06-05 13:11:28 -05:00

rv32-spill-vector.ll

…

rv32-spill-zvlsseg.ll

[RISCV] Move RISCVInsertVSETVLI to after phi elimination (#91440 )

2024-05-15 11:44:32 +08:00

rv64-spill-vector-csr.ll

[RISCV] Remove unnecessary patterns for tail agnostic FP intrinsics with rounding mode. (#94498 )

2024-06-05 13:11:28 -05:00

rv64-spill-vector.ll

…

rv64-spill-zvlsseg.ll

[RISCV] Move RISCVInsertVSETVLI to after phi elimination (#91440 )

2024-05-15 11:44:32 +08:00

rvv-args-by-mem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467 )

2024-01-07 12:09:44 -08:00

rvv-framelayout.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

rvv-out-arguments.ll

[RISCV] Add unit strided load/store to whole register peephole (#100116 )

2024-07-24 11:52:54 +08:00

rvv-peephole-vmerge-masked-vops.ll

[RISCV] Allow folding vmerge into masked ops when mask is the same (#97989 )

2024-07-09 12:12:02 +08:00

rvv-peephole-vmerge-to-vmv.mir

[RISCV] Convert AVLs with vlenb to VLMAX where possible (#97800 )

2024-07-11 14:22:00 +08:00

rvv-peephole-vmerge-vops-mir.ll

[RISCV] Add unit strided load/store to whole register peephole (#100116 )

2024-07-24 11:52:54 +08:00

rvv-peephole-vmerge-vops.ll

[RISCV] Don't fold vmerge.vvm or vmv.v.v into vredsum.vs if AVL changed (#99006 )

2024-07-17 12:50:17 +08:00

rvv-stack-align.mir

[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001 )

2024-03-18 10:37:59 -04:00

rvv-vmerge-to-vmv.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

rvv-vscale.i32.ll

…

rvv-vscale.i64.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

saddo-sdnode.ll

…

scalable-vector-struct.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

scalar-stack-align.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

select-bf16.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

select-fp.ll

[RISCV] Remove duplicate bf16 testing. NFC

2024-06-13 20:05:24 -07:00

select-int.ll

…

select-sra.ll

[RISCV] Strip W suffix from ADDIW (#68425 )

2023-10-06 10:28:01 -07:00

setcc-fp-vp.ll

[RISCV] Strength reduce mul by 2^N - 2^M (#88983 )

2024-06-20 07:36:48 -07:00

setcc-fp.ll

[RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (#83146 )

2024-02-28 10:26:54 +08:00

setcc-int-vp-mask.ll

…

setcc-int-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

setcc-integer.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

sf_vfnrclip_x_f_qf.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

sf_vfnrclip_xu_f_qf.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

sf_vfwmacc_4x4x4.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

sf_vqmacc_2x8x2.ll

[RISCV] Add missing lmul info for SiFive extensions (#76006 )

2023-12-20 14:42:47 +08:00

sf_vqmacc_4x8x4.ll

Recommit [RISCV] Update the interface of sifive vqmaccqoq (#74284 ) (#75768 )

2023-12-26 12:59:00 +08:00

sf_vqmaccsu_2x8x2.ll

[RISCV] Add missing lmul info for SiFive extensions (#76006 )

2023-12-20 14:42:47 +08:00

sf_vqmaccsu_4x8x4.ll

Recommit [RISCV] Update the interface of sifive vqmaccqoq (#74284 ) (#75768 )

2023-12-26 12:59:00 +08:00

sf_vqmaccu_2x8x2.ll

[RISCV] Add missing lmul info for SiFive extensions (#76006 )

2023-12-20 14:42:47 +08:00

sf_vqmaccu_4x8x4.ll

Recommit [RISCV] Update the interface of sifive vqmaccqoq (#74284 ) (#75768 )

2023-12-26 12:59:00 +08:00

sf_vqmaccus_2x8x2.ll

[RISCV] Add missing lmul info for SiFive extensions (#76006 )

2023-12-20 14:42:47 +08:00

sf_vqmaccus_4x8x4.ll

Recommit [RISCV] Update the interface of sifive vqmaccqoq (#74284 ) (#75768 )

2023-12-26 12:59:00 +08:00

shuffle-reverse.ll

[RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (#93352 )

2024-05-28 15:05:23 -07:00

sink-splat-operands-i1.ll

Revert "[LSR][TTI][RISCV] Disable terminator folding for RISC-V."

2024-01-11 13:20:02 -08:00

sink-splat-operands.ll

Revert "[RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default" (#98328 )

2024-07-10 15:33:20 +01:00

smulo-sdnode.ll

…

splat-vector-split-i64-vl-sdnode.ll

[RISCV] Unify getDemanded between forward and backwards passes in RISCVInsertVSETVLI (#92860 )

2024-05-21 14:11:42 +08:00

splat-vectors.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

splats-with-mixed-vl.ll

[DAG] Restrict insert_subvector undef, splat_veector, dontcare transform

2023-08-18 12:44:09 -07:00

sshl_sat_vec.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

stack-coloring-scalablevec.mir

…

stepvector.ll

[RISCV] Strength reduce mul by 2^N - 2^M (#88983 )

2024-06-20 07:36:48 -07:00

strided-load-store.ll

[RISCV] Emit VP strided loads/stores in RISCVGatherScatterLowering (#98111 )

2024-07-24 13:56:22 +08:00

strided-vpload-vpstore-output.ll

[SelectionDAG] Remove pointer from MMO for VP strided load/store. (#82667 )

2024-02-26 16:15:34 -08:00

strided-vpload.ll

[RISCV] Don't expand zero stride vp.strided.load if SEW>XLEN (#98924 )

2024-07-16 10:29:53 +08:00

strided-vpstore.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

subregister-undef-early-clobber.mir

[CodeGen] Remove target SubRegLiveness flags (#95437 )

2024-06-14 08:51:56 +01:00

tail-agnostic-impdef-copy.mir

[NewPM][CodeGen] Port finalize-isel to new pass manager (#94214 )

2024-06-04 09:23:52 +08:00

trunc-sat-clip-sdnode.ll

[RISCV] Support multiple levels of truncates in combineTruncToVnclip. (#93752 )

2024-05-31 09:09:12 -05:00

trunc-select-to-max-usat.ll

[RISCV] Fold (vXi8 (trunc (vselect (setltu, X, 256), X, (sext (setgt X, 0))))) to vmax+vnclipu. (#94720 )

2024-06-07 09:57:03 -07:00

umulo-sdnode.ll

…

unaligned-loads-stores.ll

[RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954 )

2024-04-16 15:40:32 -07:00

undef-earlyclobber-chain.ll

[CodeGen] Remove target SubRegLiveness flags (#95437 )

2024-06-14 08:51:56 +01:00

undef-earlyclobber-chain.mir

[CodeGen] Remove target SubRegLiveness flags (#95437 )

2024-06-14 08:51:56 +01:00

undef-vp-ops.ll

[VP][RISCV] Add vp.reduce.fmaximum/fminimum and its RISC-V codegen (#91782 )

2024-05-10 16:01:47 -07:00

unmasked-ta.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

unmasked-tu.ll

[RISCV] Move RISCVInsertVSETVLI to after phi elimination (#91440 )

2024-05-15 11:44:32 +08:00

urem-seteq-vec.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

ushl_sat_vec.ll

…

vaadd.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vaaddu-sdnode.ll

[RISCV] Select ISD::AVGCEILS/AVGFLOORS as vaadd. (#92839 )

2024-05-20 23:24:22 -07:00

vaaddu.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vadc.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vadd-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vadd-vp-mask.ll

…

vadd-vp.ll

[RISCV] Convert AVLs with vlenb to VLMAX where possible (#97800 )

2024-07-11 14:22:00 +08:00

vadd.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vaesdf.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

vaesdm.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

vaesef.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

vaesem.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

vaeskf1.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vaeskf2.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vaesz.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

vand-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vand-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vand.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vandn-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vandn-vp.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vandn.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

variant-cc.ll

…

vasub.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vasubu.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vbrev8.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vbrev.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vclmul.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vclmulh.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vclz.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vcompress.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vcopysign-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vcpop.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vcpopv.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vctz.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vdiv-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vdiv-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

vdiv.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vdivu-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vdivu-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

vdivu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vec3-setcc-crash.ll

[RISCV] Insert a freeze before converting select to AND/OR. (#84232 )

2024-03-07 15:03:51 -08:00

vector-deinterleave-fixed.ll

[RISCV] Reorder shuffle operands if one side is an identity (#98534 )

2024-07-11 13:52:41 -07:00

vector-deinterleave-load.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vector-deinterleave.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vector-interleave-fixed.ll

Move several vector intrinsics out of experimental namespace (#88748 )

2024-04-29 10:16:45 +01:00

vector-interleave-store.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vector-interleave.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vector-reassociations.ll

[RISCV] Move RISCVInsertVSETVLI to after phi elimination (#91440 )

2024-05-15 11:44:32 +08:00

vector-splice.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vexts-sdnode.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

vfabs-sdnode.ll

[RISCV] Apply promotion for f16 vector ops when only have zvfhmin

2023-08-23 16:49:20 +08:00

vfabs-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfadd-constrained-sdnode.ll

[RISCV] Support Strict FP arithmetic Op when only have Zvfhmin (#68867 )

2023-11-09 09:55:48 +08:00

vfadd-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfadd-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfadd.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfclass-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vfclass-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfclass.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfcmp-constrained-sdnode.ll

[RISCV] Add isCommutable for pseudos without merge operand

2023-08-29 15:51:17 +08:00

vfcmps-constrained-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vfcopysign-sdnode.ll

[RISCV] Apply promotion for f16 vector ops when only have zvfhmin

2023-08-23 16:49:20 +08:00

vfcvt-f-x.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfcvt-f-xu.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfcvt-rtz-x-f.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfcvt-rtz-xu-f.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfcvt-x-f.ll

[RISCV] Match vector fp-int convert intrinsics with specific RTZ rounding mode to the rtz variants (#98120 )

2024-07-10 10:51:20 +08:00

vfcvt-xu-f.ll

[RISCV] Match vector fp-int convert intrinsics with specific RTZ rounding mode to the rtz variants (#98120 )

2024-07-10 10:51:20 +08:00

vfdiv-constrained-sdnode.ll

[RISCV] Support Strict FP arithmetic Op when only have Zvfhmin (#68867 )

2023-11-09 09:55:48 +08:00

vfdiv-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfdiv-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfdiv.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfirst-byte-compare-index.ll

[RISCV][LoopIdiomVectorize] Support VP intrinsics in LoopIdiomVectorize (#94082 )

2024-07-02 18:48:28 -07:00

vfirst.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfma-vp-combine.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

vfma-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfmacc-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfmacc.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfmadd-constrained-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfmadd-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfmadd.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfmax-sdnode.ll

[RISCV] Apply promotion for f16 vector ops when only have zvfhmin

2023-08-23 16:49:20 +08:00

vfmax-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfmax.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfmerge.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfmin-sdnode.ll

[RISCV] Apply promotion for f16 vector ops when only have zvfhmin

2023-08-23 16:49:20 +08:00

vfmin-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfmin.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfmsac-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfmsac.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfmsub-constrained-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfmsub-sdnode.ll

[TwoAddressInstruction] Handle physical registers with LiveIntervals (#66784 )

2023-10-19 16:26:30 +01:00

vfmsub.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfmul-constrained-sdnode.ll

[RISCV] Support Strict FP arithmetic Op when only have Zvfhmin (#68867 )

2023-11-09 09:55:48 +08:00

vfmul-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfmul-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfmul.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfmuladd-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfmv.f.s.ll

[RISCV] Reduce LMUL for vector extracts

2023-08-22 07:36:17 -07:00

vfmv.s.f.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

vfmv.v.f.ll

[RISCV] Remove unnecessary bf16 -mattr from vfmv.v.f.ll. NFC

2024-06-13 21:41:35 -07:00

vfncvt-f-f.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfncvt-f-x.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfncvt-f-xu.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfncvt-rod-f-f.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfncvt-rtz-x-f.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfncvt-rtz-xu-f.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfncvt-x-f.ll

[RISCV] Match vector fp-int convert intrinsics with specific RTZ rounding mode to the rtz variants (#98120 )

2024-07-10 10:51:20 +08:00

vfncvt-xu-f.ll

[RISCV] Match vector fp-int convert intrinsics with specific RTZ rounding mode to the rtz variants (#98120 )

2024-07-10 10:51:20 +08:00

vfncvtbf16-f-f.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vfneg-sdnode.ll

[RISCV] Apply promotion for f16 vector ops when only have zvfhmin

2023-08-23 16:49:20 +08:00

vfneg-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfnmacc-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfnmacc.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfnmadd-constrained-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfnmadd-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vfnmadd.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfnmsac-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfnmsac.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfnmsub-constrained-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfnmsub-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vfnmsub.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfpext-constrained-sdnode.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vfpext-sdnode.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vfpext-vp.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vfptoi-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

vfptoi-sdnode.ll

[RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (#83146 )

2024-02-28 10:26:54 +08:00

vfptosi-vp-mask.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vfptosi-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfptoui-vp-mask.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vfptoui-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfptrunc-constrained-sdnode.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vfptrunc-sdnode.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vfptrunc-vp.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vfrdiv-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfrdiv.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfrec7.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfredmax.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vfredmin.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vfredosum.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vfredusum.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vfrsqrt7.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfrsub-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfrsub.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfsgnj.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfsgnjn.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfsgnjx.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfslide1down.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfslide1up.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfsqrt-constrained-sdnode.ll

[RISCV] Support Strict FP arithmetic Op when only have Zvfhmin (#68867 )

2023-11-09 09:55:48 +08:00

vfsqrt-sdnode.ll

[RISCV] Apply promotion for f16 vector ops when only have zvfhmin

2023-08-23 16:49:20 +08:00

vfsqrt-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfsqrt.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfsub-constrained-sdnode.ll

[RISCV] Support Strict FP arithmetic Op when only have Zvfhmin (#68867 )

2023-11-09 09:55:48 +08:00

vfsub-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfsub-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfsub.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfwadd-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vfwadd-vp.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vfwadd.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfwadd.w.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfwcvt-f-f.ll

[RISCV] Add Zvfhmin extension support for llvm RISCV backend

2023-08-23 16:47:47 +08:00

vfwcvt-f-x.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfwcvt-f-xu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfwcvt-rtz-x-f.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfwcvt-rtz-xu-f.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vfwcvt-x-f.ll

[RISCV] Match vector fp-int convert intrinsics with specific RTZ rounding mode to the rtz variants (#98120 )

2024-07-10 10:51:20 +08:00

vfwcvt-xu-f.ll

[RISCV] Match vector fp-int convert intrinsics with specific RTZ rounding mode to the rtz variants (#98120 )

2024-07-10 10:51:20 +08:00

vfwcvtbf16-f-f.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vfwmacc-sdnode.ll

[RISCV] Apply promotion for f16 vector ops when only have zvfhmin

2023-08-23 16:49:20 +08:00

vfwmacc-vp.ll

[RISCV] Allow folding vmerge into masked ops when mask is the same (#97989 )

2024-07-09 12:12:02 +08:00

vfwmacc.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfwmaccbf16.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vfwmsac-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vfwmsac.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfwmul-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vfwmul.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfwnmacc-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfwnmacc.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfwnmsac-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vfwnmsac.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfwredosum.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vfwredusum.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vfwsub-sdnode.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vfwsub.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vfwsub.w.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vghsh.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vgmul.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vid.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

viota.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vitofp-constrained-sdnode.ll

[FPEnv][RISCV] Correct strictfp tests.

2023-07-20 10:16:56 -04:00

vitofp-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vle_vid-vfcvt.ll

[RISCV] Always use signed APSInt in getExactInteger. (#84070 )

2024-03-05 14:36:37 -08:00

vle.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vleff-vlseg2ff-output.ll

[RISCV] Convert implicit_def tuples to noreg in post-isel peephole (#91173 )

2024-05-08 15:38:13 +08:00

vleff.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vlm.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vlmax-peephole.ll

[RISCV] Convert AVLs with vlenb to VLMAX where possible (#97800 )

2024-07-11 14:22:00 +08:00

vloxei-rv64.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vloxei.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vloxseg-rv32.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vloxseg-rv64.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vlse.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vlseg-rv32.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vlseg-rv64.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vlsegff-rv32-dead.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vlsegff-rv32.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vlsegff-rv64-dead.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vlsegff-rv64.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vlsseg-rv32.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vlsseg-rv64.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vluxei-rv64.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vluxei.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vluxseg-rv32.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vluxseg-rv64.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vmacc-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vmacc.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmadc.carry.in.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmadc.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmadd-sdnode.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vmadd-vp.ll

[RISCV] Allow folding vmerge with implicit passthru when true has tied dest (#78565 )

2024-07-06 12:43:11 +08:00

vmadd.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmand.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmandn.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmarith-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vmax-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vmax-vp.ll

[RISCV] Convert AVLs with vlenb to VLMAX where possible (#97800 )

2024-07-11 14:22:00 +08:00

vmax.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmaxu-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vmaxu-vp.ll

[RISCV] Convert AVLs with vlenb to VLMAX where possible (#97800 )

2024-07-11 14:22:00 +08:00

vmaxu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmclr.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmerge.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmfeq.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmfge.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmfgt.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmfle.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmflt.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmfne.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmin-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vmin-vp.ll

[RISCV] Convert AVLs with vlenb to VLMAX where possible (#97800 )

2024-07-11 14:22:00 +08:00

vmin.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vminu-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vminu-vp.ll

[RISCV] Convert AVLs with vlenb to VLMAX where possible (#97800 )

2024-07-11 14:22:00 +08:00

vminu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmnand.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmnor.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmor.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmorn.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmsbc.borrow.in.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmsbc.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmsbf.ll

[RISCV] Use ForceTailAgnostic for masked vmsbf/vmsif/vmsof.m. (#94532 )

2024-06-05 14:20:38 -07:00

vmseq.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmset.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmsge.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmsgeu.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmsgt.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmsgtu.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmsif.ll

[RISCV] Use ForceTailAgnostic for masked vmsbf/vmsif/vmsof.m. (#94532 )

2024-06-05 14:20:38 -07:00

vmsle.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmsleu.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmslt.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmsltu.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmsne.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vmsof.ll

[RISCV] Use ForceTailAgnostic for masked vmsbf/vmsif/vmsof.m. (#94532 )

2024-06-05 14:20:38 -07:00

vmul-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vmul-vp-mask.ll

…

vmul-vp.ll

[DAGCombiner][VP] Add DAGCombine for VP_MUL (#80105 )

2024-05-31 10:17:11 +08:00

vmul.ll

…

vmulh-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vmulh.ll

…

vmulhsu.ll

…

vmulhu-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vmulhu.ll

…

vmv-copy.mir

[RISCV] Use larger copies when register tuples are aligned

2024-04-08 13:24:57 +08:00

vmv.s.x-rv32.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

vmv.s.x-rv64.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

vmv.v.v-peephole.ll

[RISCV] Update combine-vmv.ll to have more foldable cases. NFC

2024-07-24 19:04:45 +08:00

vmv.v.v-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmv.v.v-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmv.v.x-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmv.v.x-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmv.x.s-rv32.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

vmv.x.s-rv64.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

vmxnor.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vmxor.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vnclip.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vnclipu.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vnmsac-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vnmsac.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vnmsub-sdnode.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vnmsub.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vnsra-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vnsra-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vnsra.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vnsrl-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vnsrl-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vnsrl.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vor-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vor-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vor.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vp-cttz-elts.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vp-inttoptr-ptrtoint.ll

[RISCV] Add missing tests for inttoptr/ptrtoint on scalable vectors (#77857 )

2024-01-12 09:52:07 -08:00

vp-reverse-float-fixed-vectors.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vp-reverse-float.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vp-reverse-int-fixed-vectors.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vp-reverse-int.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vp-reverse-mask-fixed-vectors.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vp-reverse-mask.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vp-splat.ll

[VP][RISCV] Introduce vp.splat and RISC-V. (#98731 )

2024-07-17 08:40:42 +08:00

vp-splice-fixed-vectors.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vp-splice-mask-fixed-vectors.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vp-splice-mask-vectors.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vp-splice.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vpgather-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vpload.ll

[RISCV] Add unit strided load/store to whole register peephole (#100116 )

2024-07-24 11:52:54 +08:00

vpmerge-sdnode-bf16.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vpmerge-sdnode.ll

[RISCV] Remove duplicate bf16 testing. NFC

2024-06-13 20:05:24 -07:00

vpscatter-sdnode.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vpstore.ll

[RISCV] Add unit strided load/store to whole register peephole (#100116 )

2024-07-24 11:52:54 +08:00

vredand.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vredmax.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vredmaxu.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vredmin.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vredminu.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vredor.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vredsum.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vreductions-fp-sdnode.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

vreductions-fp-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vreductions-int-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vreductions-int.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501 )

2024-01-16 13:36:24 +07:00

vreductions-mask-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vreductions-mask.ll

[RISCV] Remove unused check prefixes for tests. NFC

2023-07-24 13:42:49 +08:00

vredxor.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vrem-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vrem-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

vrem.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vremu-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vremu-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

vremu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vrev8.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vrgather-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vrgather-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vrgatherei16-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vrgatherei16-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vrgatherei16-subreg-liveness.ll

[CodeGen] Remove target SubRegLiveness flags (#95437 )

2024-06-14 08:51:56 +01:00

vrol-sdnode.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

vrol.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vror-sdnode.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

vror.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vrsub-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vrsub-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vrsub.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vsadd-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vsadd-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vsadd-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vsadd-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vsaddu-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vsaddu-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vsaddu-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vsaddu-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vsbc.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vscale-power-of-two.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vscale-vw-web-simplification.ll

[DAGCombiner][RISCV] Handle truncating splats in isNeutralConstant (#87338 )

2024-04-04 12:36:15 +08:00

vse.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vselect-bf16.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vselect-fp.ll

[RISCV] Add unit strided load/store to whole register peephole (#100116 )

2024-07-24 11:52:54 +08:00

vselect-int.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vselect-mask.ll

…

vselect-vp-bf16.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vselect-vp.ll

[RISCV] Remove duplicate bf16 testing. NFC

2024-06-13 20:05:24 -07:00

vsetvl-ext.ll

[RISCV][DAG] Teach computeKnownBits consider SEW/LMUL/AVL for vsetvli. (#76158 )

2023-12-25 11:18:22 +08:00

vsetvli-insert-crossbb.ll

[RISCV] Copy AVLs whose LiveIntervals aren't extendable in insertVSETVLI (#98342 )

2024-07-15 13:18:12 +08:00

vsetvli-insert-crossbb.mir

[RISCV] Copy AVLs whose LiveIntervals aren't extendable in insertVSETVLI (#98342 )

2024-07-15 13:18:12 +08:00

vsetvli-insert-O0.ll

[RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals

2024-06-17 12:05:43 -07:00

vsetvli-insert.ll

[RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (#96200 )

2024-06-23 20:20:59 +08:00

vsetvli-insert.mir

[RISCV] Prune dead LI in vsetvli coalescing with trivially dead vsetvli (#98647 )

2024-07-15 08:36:20 -07:00

vsetvli-intrinsics.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vsetvli-regression.ll

[RISCV] Remove hasSideEffects=1 for vsetvli pseudos (#91319 )

2024-05-15 23:37:31 +08:00

vsetvli-valid-elen-fp.ll

[RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (#69788 )

2023-10-27 12:16:28 +01:00

vsetvlmax-ext.ll

[RISCV][DAG] Teach computeKnownBits consider SEW/LMUL/AVL for vsetvli. (#76158 )

2023-12-25 11:18:22 +08:00

vsext-vp-mask.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vsext-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vsext.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vsha2ch.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vsha2cl.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vsha2ms.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vshl-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vshl-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

vsitofp-vp-mask.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vsitofp-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vslide1down-constant-vl-rv32.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

vslide1down-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vslide1down-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vslide1up-constant-vl-rv32.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

vslide1up-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vslide1up-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vslidedown.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vslideup.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vsll.ll

[RISCV] Make the vsll->vadd intrinsic pattern support tail undisturbed intrinsics.

2024-06-05 11:34:41 -07:00

vsm3c.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vsm3me.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vsm4k.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vsm4r.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

vsm.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vsmul-rv32.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vsmul-rv64.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vsoxei-rv64.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vsoxei.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vsoxseg-rv32.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vsoxseg-rv64.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vsplats-bf16.ll

[RISCV] Remove experimental for bf16 extensions (#97996 )

2024-07-09 14:34:03 +08:00

vsplats-fp.ll

[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205 )

2024-07-10 07:35:56 -07:00

vsplats-i1.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vsplats-i64.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vsplats-zfa.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vsra-sdnode.ll

[RISCV] Verify the VL and Mask on the outer TRUNCATE_VECTOR_VL in combineTruncOfSraSext. (#93578 )

2024-05-29 11:53:01 -07:00

vsra-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

vsra.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vsrl-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vsrl-vp.ll

[LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (#92799 )

2024-05-28 12:49:42 -07:00

vsrl.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vsse.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vsseg-rv32.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vsseg-rv64.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vssra-rv32.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vssra-rv64.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vssrl-rv32.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vssrl-rv64.ll

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vssseg-rv32.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vssseg-rv64.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vssub-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vssub-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vssub-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vssub-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vssubu-rv32.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vssubu-rv64.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vssubu-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vssubu-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vsub-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vsub-vp-mask.ll

…

vsub-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vsub.ll

Recommit "[RISCV] Use vadd.vi for tail undisturbe vsub intrinsic with small immediate."

2024-06-05 09:48:49 -07:00

vsuxei-rv64.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vsuxei.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vsuxseg-rv32.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vsuxseg-rv64.ll

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

2023-07-19 10:03:57 -07:00

vtrunc-vp-mask.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vtrunc-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vtruncs-sdnode.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

vuitofp-vp-mask.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vuitofp-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vwadd-mask-sdnode.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vwadd-sdnode.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

vwadd-vp.ll

[RISCV] Don't require mask or VL to be the same in combineBinOp_VLToVWBinOp_VL (#87997 )

2024-04-09 16:04:10 +08:00

vwadd.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwadd.w.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwaddu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwaddu.w.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwmacc-sdnode.ll

…

vwmacc-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vwmacc.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwmaccsu-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vwmaccsu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwmaccu-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vwmaccu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwmaccus.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwmul-sdnode.ll

[RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (#86465 )

2024-03-26 23:28:04 +08:00

vwmul.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwmulsu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwmulu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwredsum.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vwredsumu.ll

[RISCV] Use TU policy for C reduction intrinsics. (#93970 )

2024-05-31 14:03:02 -05:00

vwsll-sdnode.ll

[RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251 )

2024-07-17 12:23:05 -07:00

vwsll-vp.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vwsll.ll

[RISCV] Remove experimental from Vector Crypto extensions (#74213 )

2023-12-18 22:04:22 -08:00

vwsub-mask-sdnode.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vwsub-sdnode.ll

[RISCV] Handle scalable ops with < EEW / 2 narrow types in combineBinOp_VLToVWBinOp_VL (#84158 )

2024-03-22 07:26:29 +08:00

vwsub.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwsub.w.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwsubu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vwsubu.w.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vxor-sdnode.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vxor-vp.ll

[RISCV] Convert more constant splats in tests to splat shorthand. NFC (#87616 )

2024-04-09 15:46:38 +08:00

vxor.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

vxrm-insert.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vxrm.mir

[RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701 )

2024-05-10 14:31:43 +08:00

vzext-vp-mask.ll

[LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().

2024-02-27 13:37:23 +00:00

vzext-vp.ll

[RISCV] Support postRA vsetvl insertion pass (#70549 )

2024-05-21 14:42:55 +08:00

vzext.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

wrong-chain-fixed-load.ll

[RISCV] Remove -riscv-v-vector-bits-min in tests. NFC (#65404 )

2023-09-06 10:43:41 +01:00

wrong-stack-offset-for-rvv-object.mir

[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001 )

2024-03-18 10:37:59 -04:00

wrong-stack-slot-rv32.mir

…

wrong-stack-slot-rv64.mir

…

xsfvcp-x.ll

[RISCV][SiFive] Reduce intrinsics of SiFive VCIX extension (#79407 )

2024-01-26 11:15:53 +08:00

xsfvcp-xv.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

xsfvcp-xvv.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

xsfvcp-xvw.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

xtheadvdot-vmaqa.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

xtheadvdot-vmaqasu.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

xtheadvdot-vmaqau.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

xtheadvdot-vmaqaus.ll

[RISCV] Add a blank line after end of RUN lines. NFC.

2023-08-07 18:38:09 +08:00

zve32-types.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

zvlsseg-copy.mir

[RISCV] Use larger copies when register tuples are aligned

2024-04-08 13:24:57 +08:00

zvlsseg-spill.mir

Reapply "[RISCV] Separate doLocalPostpass into new pass and move to post vector regalloc (#88295 )"

2024-04-25 00:42:30 +08:00

zvlsseg-zero-vl.ll

…