Thomas Symalla 053df6ccaf [NFC][AMDGPU] Pre-commit test for D132837. ...

Pre-commit an additional fmac test for D132837.

2022-09-21 10:16:29 +02:00

..

AArch64

[AArch64] Enable LSLFast for modern OoO cpus

2022-09-20 17:09:14 +01:00

AMDGPU

[NFC][AMDGPU] Pre-commit test for D132837.

2022-09-21 10:16:29 +02:00

ARC

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ARM

[ARM] Add more tests on instructions fusion with comparison with zero; NFC

2022-09-17 11:49:58 +03:00

AVR

[AVR] Only push and clear R1 in interrupts when necessary

2022-08-15 14:29:38 +02:00

BPF

[Clang][BPF] Support record argument with direct values

2022-08-18 19:11:50 -07:00

CSKY

[CSKY] Fix the btsti16 instruction missing in generic processor

2022-07-27 17:39:15 +08:00

DirectX

[DirectX backend] Remove Attribute not for DXIL on CallInst

2022-09-13 13:45:19 -07:00

Generic

[IRBuilder] Use PoisonValue in CreateMasked*

2022-09-19 11:01:41 -07:00

Hexagon

[Hexagon] Implement [SU]INT_TO_FP and FP_TO_[SU]INT for HVX

2022-09-19 11:11:20 -07:00

Inputs

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Lanai

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LoongArch

[LoongArch] Add codegen support for fmaxnum_ieee and fminnum_ieee

2022-09-20 19:22:32 +08:00

M68k

[M68k] Fix the crash of fast register allocator

2022-09-15 09:24:22 +08:00

Mips

[DAGCombiner] More load-store forwarding for big-endian

2022-09-14 15:36:35 -04:00

MIR

[MIR] Support printing and parsing pcsections

2022-09-14 10:30:25 +02:00

MLRegalloc

[mlgo] Add in-development instruction based features for regalloc advisor

2022-09-17 19:54:45 +00:00

MSP430

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NVPTX

[NVPTX] Use MBB.begin() instead MBB.front() in NVPTXFrameLowering::emitPrologue

2022-09-14 08:30:55 +05:30

PowerPC

[PowerPC][NFC] Add virtual call to show redundant spill of vector registers

2022-09-20 21:21:06 -04:00

RISCV

[RISCV] Remove support for the unratified Zbt extension.

2022-09-20 20:26:48 -07:00

SPARC

[Sparc] Don't use SunStyleELFSectionSwitchSyntax

2022-08-17 12:59:29 +02:00

SPIRV

[SPIRV] add IR regularization pass

2022-09-15 15:53:44 +03:00

SystemZ

[SystemZ] Improve handling of vector alignments.

2022-09-08 17:33:05 +02:00

Thumb

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Thumb2

[MachinePipeliner] Fix the interpretation of the scheduling model

2022-09-16 09:51:48 +09:00

VE

VE: Use generated checks for a copy-pasted output test

2022-09-20 16:51:04 -04:00

WebAssembly

[WebAssembly] Improve codegen for shuffles with undefined lane indices

2022-09-13 16:03:18 -07:00

WinCFGuard

[llvm] Mark CFGuard fn ptr symbol as DSO local and add tests for mingw

2022-08-23 23:39:39 +03:00

WinEH

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X86

[X86][GlobalISel] Add support for sret demotion

2022-09-20 11:47:53 +07:00

XCore

Fix CSR update check

2022-08-24 18:09:49 -07:00