e415cb1d61
Print $zero register if operand is zero, otherwise print it normally. Clang is highly compatible [1] with GCC inline assembly extensions, allowing the same set of constraints, modifiers and operands as GCC inline assembly. This patch tries to make it compatible regarding LoongArch specific operand modifiers. GCC supports many modifiers [2], but it seems that only x86 and msp430 are documented [3][4]. I don't know if any other modifiers are being used except the 'z' in Linux [5]. [1]: https://clang.llvm.org/compatibility.html#inline-asm [2]: https://github.com/gcc-mirror/gcc/blob/master/gcc/config/loongarch/loongarch.cc#L4884-L4911 [3]: https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#x86Operandmodifiers [4]: https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#msp430Operandmodifiers [5]: https://github.com/torvalds/linux/blob/master/arch/loongarch/include/asm/cmpxchg.h#L17 Differential Revision: https://reviews.llvm.org/D136841
26 lines
984 B
C
26 lines
984 B
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple loongarch32 -O2 -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -triple loongarch64 -O2 -emit-llvm %s -o - | FileCheck %s
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/// Test LoongArch specific operand modifiers (i.e. operand codes).
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// CHECK-LABEL: @test_z_zero(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "add.w $0, $1, ${2:z}", "=r,r,ri"(i32 [[A:%.*]], i32 0) #[[ATTR1:[0-9]+]], !srcloc !2
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// CHECK-NEXT: ret void
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//
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void test_z_zero(int a) {
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int tmp;
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asm volatile ("add.w %0, %1, %z2" : "=r" (tmp) : "r" (a), "ri" (0));
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}
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// CHECK-LABEL: @test_z_nonzero(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "add.w $0, $1, ${2:z}", "=r,r,ri"(i32 [[A:%.*]], i32 1) #[[ATTR1]], !srcloc !3
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// CHECK-NEXT: ret void
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//
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void test_z_nonzero(int a) {
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int tmp;
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asm volatile ("add.w %0, %1, %z2" : "=r" (tmp) : "r" (a), "ri" (1));
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}
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