899226adac
In order to be compatible with the form of the atomic instruction in GAS that accepts the fourth operand as 0 (i.e. `am* $rd, $rk, $rj, 0`), we need to treat `$rj, 0` as one operand, but only print `$rj`. For this, the number of result operands of inline assembly memory operand `ZB` constraint is modified to 2 (reg + 0). Restrictions on register usage in `am*` instructions have also been adjusted. When `$rd` is equal to `$r0`, the instruction must be considered legal, because of some special usage like `PseudoUNIMP`. Reviewed By: SixWeining, xen0n Differential Revision: https://reviews.llvm.org/D139303
72 lines
2.4 KiB
C++
72 lines
2.4 KiB
C++
//===- LoongArchInstPrinter.cpp - Convert LoongArch MCInst to asm syntax --===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an LoongArch MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#include "LoongArchInstPrinter.h"
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#include "LoongArchBaseInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSymbol.h"
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using namespace llvm;
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#define DEBUG_TYPE "loongarch-asm-printer"
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// Include the auto-generated portion of the assembly writer.
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#define PRINT_ALIAS_INSTR
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#include "LoongArchGenAsmWriter.inc"
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void LoongArchInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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StringRef Annot,
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const MCSubtargetInfo &STI,
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raw_ostream &O) {
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if (!printAliasInstr(MI, Address, STI, O))
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printInstruction(MI, Address, STI, O);
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printAnnotation(O, Annot);
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}
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void LoongArchInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
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O << '$' << getRegisterName(RegNo);
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}
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void LoongArchInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI,
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raw_ostream &O) {
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const MCOperand &MO = MI->getOperand(OpNo);
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if (MO.isReg()) {
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printRegName(O, MO.getReg());
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return;
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}
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if (MO.isImm()) {
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O << MO.getImm();
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return;
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}
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assert(MO.isExpr() && "Unknown operand kind in printOperand");
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MO.getExpr()->print(O, &MAI);
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}
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void LoongArchInstPrinter::printAtomicMemOp(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI,
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raw_ostream &O) {
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const MCOperand &MO = MI->getOperand(OpNo);
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assert(MO.isReg() && "printAtomicMemOp can only print register operands");
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printRegName(O, MO.getReg());
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}
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const char *LoongArchInstPrinter::getRegisterName(unsigned RegNo) {
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// Default print reg alias name
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return getRegisterName(RegNo, LoongArch::RegAliasName);
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}
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