41 lines
2.2 KiB
LLVM
41 lines
2.2 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GCN %s
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; GCN-LABEL: {{^}}shl_base_atomicrmw_global_ptr:
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; GCN-DAG: v_add_co_u32_e32 v[[EXTRA_LO:[0-9]+]], vcc, 0x80, v4
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; GCN-DAG: v_addc_co_u32_e32 v[[EXTRA_HI:[0-9]+]], vcc, 0, v5, vcc
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; GCN-DAG: v_lshlrev_b64 v[[[LO:[0-9]+]]:[[HI:[0-9]+]]], 2, v[4:5]
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; GCN-DAG: v_mov_b32_e32 [[THREE:v[0-9]+]], 3
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; GCN-DAG: global_atomic_and v[[[LO]]:[[HI]]], [[THREE]], off offset:512
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; GCN-DAG: global_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[[[EXTRA_LO]]:[[EXTRA_HI]]]
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define void @shl_base_atomicrmw_global_ptr(ptr addrspace(1) %out, ptr addrspace(1) %extra.use, ptr addrspace(1) %ptr) #0 {
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%arrayidx0 = getelementptr inbounds [512 x i32], ptr addrspace(1) %ptr, i64 0, i64 32
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%cast = ptrtoint ptr addrspace(1) %arrayidx0 to i64
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%shl = shl i64 %cast, 2
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%castback = inttoptr i64 %shl to ptr addrspace(1)
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%val = atomicrmw and ptr addrspace(1) %castback, i32 3 seq_cst
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store volatile i64 %cast, ptr addrspace(1) %extra.use, align 4
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ret void
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}
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; GCN-LABEL: {{^}}shl_base_global_ptr_global_atomic_fadd:
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; GCN-DAG: v_add_co_u32_e32 v[[EXTRA_LO:[0-9]+]], vcc, 0x80, v4
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; GCN-DAG: v_addc_co_u32_e32 v[[EXTRA_HI:[0-9]+]], vcc, 0, v5, vcc
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; GCN-DAG: v_lshlrev_b64 v[[[LO:[0-9]+]]:[[HI:[0-9]+]]], 2, v[4:5]
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; GCN-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0x42c80000
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; GCN-DAG: global_atomic_add_f32 v[[[LO]]:[[HI]]], [[K]], off offset:512
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; GCN-DAG: global_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[[[EXTRA_LO]]:[[EXTRA_HI]]]
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define void @shl_base_global_ptr_global_atomic_fadd(ptr addrspace(1) %out, ptr addrspace(1) %extra.use, ptr addrspace(1) %ptr) #0 {
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%arrayidx0 = getelementptr inbounds [512 x i32], ptr addrspace(1) %ptr, i64 0, i64 32
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%cast = ptrtoint ptr addrspace(1) %arrayidx0 to i64
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%shl = shl i64 %cast, 2
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%castback = inttoptr i64 %shl to ptr addrspace(1)
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call float @llvm.amdgcn.global.atomic.fadd.f32.p1.f32(ptr addrspace(1) %castback, float 100.0)
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store volatile i64 %cast, ptr addrspace(1) %extra.use, align 4
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ret void
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}
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declare float @llvm.amdgcn.global.atomic.fadd.f32.p1.f32(ptr addrspace(1) nocapture, float) #1
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attributes #0 = { nounwind }
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attributes #1 = { argmemonly nounwind willreturn }
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