63d46869ea
Instruction formats: `movgr2fcsr fcsr, rj` `movfcsr2gr rd, fcsr` MOVGR2FCSR modifies the value of the software writable field corresponding to the FCSR (floating-point control and status register) `fcsr` according to the value of the lower 32 bits of the GR (general purpose register) `rj`. MOVFCSR2GR sign extends the 32-bit value of the FCSR `fcsr` and writes it into the GR `rd`. Add "i32 @llvm.loongarch.movfcsr2gr(i32)" intrinsic for MOVFCSR2GR instruction. The argument is FCSR register number. The return value is the value in the FCSR. Add "void @llvm.loongarch.movgr2fcsr(i32, i32)" intrinsic for MOVGR2FCSR instruction. The first argument is the FCSR number, the second argument is the value in GR. Reviewed By: SixWeining, xen0n Differential Revision: https://reviews.llvm.org/D140685
156 lines
4.2 KiB
LLVM
156 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: not llc --mtriple=loongarch32 < %s 2>&1 | FileCheck %s
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; RUN: not llc --mtriple=loongarch64 < %s 2>&1 | FileCheck %s
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declare void @llvm.loongarch.dbar(i32)
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declare void @llvm.loongarch.ibar(i32)
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declare void @llvm.loongarch.break(i32)
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declare void @llvm.loongarch.movgr2fcsr(i32, i32)
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declare i32 @llvm.loongarch.movfcsr2gr(i32)
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declare void @llvm.loongarch.syscall(i32)
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declare i32 @llvm.loongarch.csrrd.w(i32 immarg)
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declare i32 @llvm.loongarch.csrwr.w(i32, i32 immarg)
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declare i32 @llvm.loongarch.csrxchg.w(i32, i32, i32 immarg)
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define void @dbar_imm_out_of_hi_range() #0 {
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; CHECK: argument to 'llvm.loongarch.dbar' out of range
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entry:
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call void @llvm.loongarch.dbar(i32 32769)
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ret void
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}
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define void @dbar_imm_out_of_lo_range() #0 {
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; CHECK: argument to 'llvm.loongarch.dbar' out of range
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entry:
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call void @llvm.loongarch.dbar(i32 -1)
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ret void
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}
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define void @ibar_imm_out_of_hi_range() #0 {
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; CHECK: argument to 'llvm.loongarch.ibar' out of range
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entry:
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call void @llvm.loongarch.ibar(i32 32769)
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ret void
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}
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define void @ibar_imm_out_of_lo_range() #0 {
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; CHECK: argument to 'llvm.loongarch.ibar' out of range
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entry:
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call void @llvm.loongarch.ibar(i32 -1)
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ret void
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}
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define void @break_imm_out_of_hi_range() #0 {
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; CHECK: argument to 'llvm.loongarch.break' out of range
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entry:
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call void @llvm.loongarch.break(i32 32769)
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ret void
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}
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define void @break_imm_out_of_lo_range() #0 {
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; CHECK: argument to 'llvm.loongarch.break' out of range
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entry:
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call void @llvm.loongarch.break(i32 -1)
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ret void
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}
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define void @movgr2fcsr(i32 %a) nounwind {
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; CHECK: llvm.loongarch.movgr2fcsr expects basic f target feature
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entry:
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call void @llvm.loongarch.movgr2fcsr(i32 1, i32 %a)
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ret void
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}
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define void @movgr2fcsr_imm_out_of_hi_range(i32 %a) #0 {
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; CHECK: argument to 'llvm.loongarch.movgr2fcsr' out of range
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entry:
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call void @llvm.loongarch.movgr2fcsr(i32 32, i32 %a)
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ret void
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}
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define void @movgr2fcsr_imm_out_of_lo_range(i32 %a) #0 {
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; CHECK: argument to 'llvm.loongarch.movgr2fcsr' out of range
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entry:
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call void @llvm.loongarch.movgr2fcsr(i32 -1, i32 %a)
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ret void
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}
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define i32 @movfcsr2gr() nounwind {
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; CHECK: llvm.loongarch.movfcsr2gr expects basic f target feature
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entry:
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%res = call i32 @llvm.loongarch.movfcsr2gr(i32 1)
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ret i32 %res
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}
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define i32 @movfcsr2gr_imm_out_of_hi_range() #0 {
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; CHECK: argument to 'llvm.loongarch.movfcsr2gr' out of range
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entry:
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%res = call i32 @llvm.loongarch.movfcsr2gr(i32 32)
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ret i32 %res
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}
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define i32 @movfcsr2gr_imm_out_of_lo_range() #0 {
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; CHECK: argument to 'llvm.loongarch.movfcsr2gr' out of range
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entry:
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%res = call i32 @llvm.loongarch.movfcsr2gr(i32 -1)
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ret i32 %res
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}
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define void @syscall_imm_out_of_hi_range() #0 {
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; CHECK: argument to 'llvm.loongarch.syscall' out of range
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entry:
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call void @llvm.loongarch.syscall(i32 32769)
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ret void
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}
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define void @syscall_imm_out_of_lo_range() #0 {
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; CHECK: argument to 'llvm.loongarch.syscall' out of range
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entry:
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call void @llvm.loongarch.syscall(i32 -1)
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ret void
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}
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define i32 @csrrd_w_imm_out_of_hi_range() #0 {
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; CHECK: argument to 'llvm.loongarch.csrrd.w' out of range
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entry:
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%0 = call i32 @llvm.loongarch.csrrd.w(i32 16384)
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ret i32 %0
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}
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define i32 @csrrd_w_imm_out_of_lo_range() #0 {
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; CHECK: argument to 'llvm.loongarch.csrrd.w' out of range
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entry:
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%0 = call i32 @llvm.loongarch.csrrd.w(i32 -1)
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ret i32 %0
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}
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define i32 @csrwr_w_imm_out_of_hi_range(i32 %a) #0 {
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; CHECK: argument to 'llvm.loongarch.csrwr.w' out of range
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entry:
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%0 = call i32 @llvm.loongarch.csrwr.w(i32 %a, i32 16384)
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ret i32 %0
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}
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define i32 @csrwr_w_imm_out_of_lo_range(i32 %a) #0 {
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; CHECK: argument to 'llvm.loongarch.csrwr.w' out of range
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entry:
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%0 = call i32 @llvm.loongarch.csrwr.w(i32 %a, i32 -1)
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ret i32 %0
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}
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define i32 @csrxchg_w_imm_out_of_hi_range(i32 %a, i32 %b) #0 {
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; CHECK: argument to 'llvm.loongarch.csrxchg.w' out of range
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entry:
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%0 = call i32 @llvm.loongarch.csrxchg.w(i32 %a, i32 %b, i32 16384)
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ret i32 %0
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}
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define i32 @csrxchg_w_imm_out_of_lo_range(i32 %a, i32 %b) #0 {
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; CHECK: argument to 'llvm.loongarch.csrxchg.w' out of range
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entry:
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%0 = call i32 @llvm.loongarch.csrxchg.w(i32 %a, i32 %b, i32 -1)
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ret i32 %0
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}
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attributes #0 = { nounwind "target-features"="+f" }
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