0f1b5f115a
ptxas is a proprietary compiler from Nvidia that can compile PTX to machine code (SASS). It has a lot of diagnostics to catch errors in PTX, which can be used to verify PTX output from llc. Set -DPXTAS_EXECUTABLE=/path/to/ptxas CMake option to enable it. If this option is not set, then ptxas is substituted to true which effectively disables all ptxas RUN lines. LLVM_PTXAS_EXECUTABLE environment variable takes precedence over the CMake option, and allows to override ptxas executable that is used for LIT without complete re-configuration. Differential Revision: https://reviews.llvm.org/D121727
61 lines
1.4 KiB
LLVM
61 lines
1.4 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck --check-prefix=SM20 %s
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; RUN: llc < %s -march=nvptx -mcpu=sm_35 | FileCheck --check-prefix=SM35 %s
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; RUN: %if ptxas %{ llc < %s -march=nvptx -mcpu=sm_20 | %ptxas-verify %}
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; RUN: %if ptxas %{ llc < %s -march=nvptx -mcpu=sm_35 | %ptxas-verify -arch=sm_35 %}
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declare i32 @llvm.nvvm.rotate.b32(i32, i32)
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declare i64 @llvm.nvvm.rotate.b64(i64, i32)
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declare i64 @llvm.nvvm.rotate.right.b64(i64, i32)
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; SM20: rotate32
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; SM35: rotate32
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define i32 @rotate32(i32 %a, i32 %b) {
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; SM20: shl.b32
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; SM20: sub.s32
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; SM20: shr.b32
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; SM20: add.u32
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; SM35: shf.l.wrap.b32
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%val = tail call i32 @llvm.nvvm.rotate.b32(i32 %a, i32 %b)
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ret i32 %val
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}
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; SM20: rotate64
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; SM35: rotate64
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define i64 @rotate64(i64 %a, i32 %b) {
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; SM20: shl.b64
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; SM20: sub.u32
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; SM20: shr.b64
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; SM20: add.u64
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; SM35: shf.l.wrap.b32
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; SM35: shf.l.wrap.b32
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%val = tail call i64 @llvm.nvvm.rotate.b64(i64 %a, i32 %b)
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ret i64 %val
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}
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; SM20: rotateright64
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; SM35: rotateright64
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define i64 @rotateright64(i64 %a, i32 %b) {
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; SM20: shr.b64
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; SM20: sub.u32
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; SM20: shl.b64
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; SM20: add.u64
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; SM35: shf.r.wrap.b32
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; SM35: shf.r.wrap.b32
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%val = tail call i64 @llvm.nvvm.rotate.right.b64(i64 %a, i32 %b)
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ret i64 %val
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}
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; SM20: rotl0
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; SM35: rotl0
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define i32 @rotl0(i32 %x) {
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; SM20: shl.b32
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; SM20: shr.b32
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; SM20: add.u32
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; SM35: shf.l.wrap.b32
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%t0 = shl i32 %x, 8
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%t1 = lshr i32 %x, 24
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%t2 = or i32 %t0, %t1
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ret i32 %t2
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}
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