f0dd12ec5c
The first attempt missed changing test files for tools (update_llc_test_checks.py). Original commit message: This implements the main suggested change from issue #56498. Using the shorter (non-extending) instruction with only -Oz ("minsize") rather than -Os ("optsize") is left as a possible follow-up. As noted in the bug report, the zero-extending load may have shorter latency/better throughput across a wide range of x86 micro-arches, and it avoids a potential false dependency. The cost is an extra instruction byte. This could cause perf ups and downs from secondary effects, but I don't think it is possible to account for those in advance, and that will likely also depend on exact micro-arch. This does bring LLVM x86 codegen more in line with existing gcc codegen, so if problems are exposed they are more likely to occur for both compilers. Differential Revision: https://reviews.llvm.org/D129775
59 lines
1.3 KiB
LLVM
59 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
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define zeroext i1 @f1(ptr %x) {
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; CHECK-LABEL: f1:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movzbl (%rdi), %eax
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; CHECK-NEXT: retq
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entry:
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%0 = load i8, ptr %x, align 1, !range !0
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%tobool = trunc i8 %0 to i1
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ret i1 %tobool
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}
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define zeroext i1 @f2(ptr %x) {
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; CHECK-LABEL: f2:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movzbl (%rdi), %eax
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; CHECK-NEXT: retq
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entry:
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%0 = load i8, ptr %x, align 1, !range !0
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%tobool = icmp ne i8 %0, 0
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ret i1 %tobool
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}
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!0 = !{i8 0, i8 2}
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; check that we don't build a "trunc" from i1 to i1, which would assert.
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define zeroext i1 @f3(i1 %x) {
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; CHECK-LABEL: f3:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: ## kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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entry:
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%tobool = icmp ne i1 %x, 0
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ret i1 %tobool
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}
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; check that we don't build a trunc when other bits are needed
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define zeroext i1 @f4(i32 %x) {
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; CHECK-LABEL: f4:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movzwl %di, %eax
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; CHECK-NEXT: shrl $15, %eax
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; CHECK-NEXT: ## kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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entry:
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%y = and i32 %x, 32768
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%z = icmp ne i32 %y, 0
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ret i1 %z
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}
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