0676acb6fd
Should cover most of the tests for GVN, GVNHoist, GVNSink, GlobalOpt, GlobalSplit, InstCombine, Reassociate, SROA and TailCallElim that had not been updated earlier.
78 lines
2.5 KiB
LLVM
78 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
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; RUN: opt -S -passes=globalopt -opaque-pointers < %s | FileCheck %s
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@g1 = internal global ptr null
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@g2 = internal global ptr null
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@g3 = internal global ptr null
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declare noalias i8* @malloc(i64) allockind("alloc,uninitialized") allocsize(0)
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;.
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; CHECK: @[[G1_BODY_0:[a-zA-Z0-9_$"\\.-]+]] = internal unnamed_addr global i64 undef
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; CHECK: @[[G2_BODY_0:[a-zA-Z0-9_$"\\.-]+]] = internal unnamed_addr global i32 undef
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; CHECK: @[[G2_BODY_1:[a-zA-Z0-9_$"\\.-]+]] = internal unnamed_addr global i32 undef
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; CHECK: @[[G2_BODY_2:[a-zA-Z0-9_$"\\.-]+]] = internal unnamed_addr global i32 undef
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; CHECK: @[[G3_BODY:[a-zA-Z0-9_$"\\.-]+]] = internal unnamed_addr global [8 x i8] undef
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;.
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define void @test_store(i64 %a, i32 %b) {
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; CHECK-LABEL: @test_store(
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; CHECK-NEXT: store i64 [[A:%.*]], ptr @g1.body.0, align 8
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; CHECK-NEXT: store i32 [[B:%.*]], ptr @g2.body.0, align 4
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; CHECK-NEXT: store i32 [[B]], ptr @g2.body.1, align 4
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; CHECK-NEXT: store i32 [[B]], ptr @g2.body.2, align 4
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; CHECK-NEXT: store i64 [[A]], ptr @g3.body, align 4
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; CHECK-NEXT: store i32 [[B]], ptr @g3.body, align 4
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; CHECK-NEXT: ret void
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;
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%m1 = call ptr @malloc(i64 8)
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store ptr %m1, ptr @g1
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%a1 = load ptr, ptr @g1
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%m2 = call ptr @malloc(i64 16)
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store ptr %m2, ptr @g2
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%a2 = load ptr, ptr @g2
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%m3 = call ptr @malloc(i64 8)
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store ptr %m3, ptr @g3
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%a3 = load ptr, ptr @g3
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store i64 %a, ptr %a1
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; Access types at different offsets.
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store i32 %b, ptr %a2
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%a2.4 = getelementptr i8, ptr %a2, i64 4
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store i32 %b, ptr %a2.4
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%a2.10 = getelementptr i8, ptr %a2, i64 10
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store i32 %b, ptr %a2.10, align 2
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; Access two different types at the same offset.
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store i64 %a, ptr %a3
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store i32 %b, ptr %a3
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ret void
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}
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define void @test_load() {
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; CHECK-LABEL: @test_load(
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; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @g1.body.0, align 8
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; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr @g2.body.0, align 4
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; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @g2.body.1, align 4
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; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr @g2.body.2, align 4
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; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr @g3.body, align 4
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; CHECK-NEXT: ret void
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;
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%a1 = load ptr, ptr @g1
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load i64, ptr %a1
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%a2 = load ptr, ptr @g2
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load i32, ptr %a2
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%a2.4 = getelementptr i8, ptr %a2, i64 4
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load i32, ptr %a2.4
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%a2.10 = getelementptr i8, ptr %a2, i64 10
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load i32, ptr %a2.10, align 2
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%a3 = load ptr, ptr @g3
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load i64, ptr %a3
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ret void
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}
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