68469a80cb
This patch adds metadata to disable runtime unrolling to the vectorized loop. If runtime unrolling/interleaving is considered profitable, LV will interleave the loop directly. There should be no need to perform runtime unrolling at a later stage. Note that we already add metadata to disable runtime unrolling to the scalar loop after vectorization. The additional unrolling unnecessarily increases code size and compile time. In addition to that we have several bug reports of unncessary runtime unrolling for vectorized loops, e.g. PR40961 Compile-time improvements: NewPM-O3: -1.04% NewPM-ReleaseThinLTO: -0.59% NewPM-ReleaseLTO-g: -0.97% https://llvm-compile-time-tracker.com/compare.php?from=ce1be13a868d0f8afa367975558c1a6175cce33a&to=78bc2e67f22e9e10e61cdb6cdac4bb857d95eb1b&stat=instructions:u Fixes #40306. Reviewed By: lebedev.ri, nikic Differential Revision: https://reviews.llvm.org/D115261
233 lines
11 KiB
LLVM
233 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes='default<O3>' -S %s | FileCheck %s
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target triple = "arm64-apple-darwin"
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; Make sure we can vectorize a loop that uses a function to clamp a double to
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; be between a given minimum and maximum value.
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define internal double @clamp(double %v) {
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entry:
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%retval = alloca double, align 8
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%v.addr = alloca double, align 8
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store double %v, ptr %v.addr, align 8
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%0 = load double, ptr %v.addr, align 8
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%cmp = fcmp olt double %0, 0.000000e+00
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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store double 0.000000e+00, ptr %retval, align 8
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br label %return
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if.end: ; preds = %entry
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%1 = load double, ptr %v.addr, align 8
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%cmp1 = fcmp ogt double %1, 6.000000e+00
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br i1 %cmp1, label %if.then2, label %if.end3
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if.then2: ; preds = %if.end
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store double 6.000000e+00, ptr %retval, align 8
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br label %return
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if.end3: ; preds = %if.end
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%2 = load double, ptr %v.addr, align 8
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store double %2, ptr %retval, align 8
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br label %return
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return: ; preds = %if.end3, %if.then2, %if.then
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%3 = load double, ptr %retval, align 8
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ret double %3
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}
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define void @loop(ptr %X, ptr %Y) {
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; CHECK-LABEL: @loop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[X5:%.*]] = ptrtoint ptr [[X:%.*]] to i64
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; CHECK-NEXT: [[Y6:%.*]] = ptrtoint ptr [[Y:%.*]] to i64
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; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[X5]], [[Y6]]
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; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
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; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[FOR_BODY:%.*]], label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[INDEX]] to i64
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[Y]], i64 [[TMP1]]
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP2]], align 8
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds double, ptr [[TMP2]], i64 2
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; CHECK-NEXT: [[WIDE_LOAD7:%.*]] = load <2 x double>, ptr [[TMP3]], align 8
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; CHECK-NEXT: [[TMP4:%.*]] = fcmp olt <2 x double> [[WIDE_LOAD]], zeroinitializer
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; CHECK-NEXT: [[TMP5:%.*]] = fcmp olt <2 x double> [[WIDE_LOAD7]], zeroinitializer
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; CHECK-NEXT: [[TMP6:%.*]] = fcmp ogt <2 x double> [[WIDE_LOAD]], <double 6.000000e+00, double 6.000000e+00>
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; CHECK-NEXT: [[TMP7:%.*]] = fcmp ogt <2 x double> [[WIDE_LOAD7]], <double 6.000000e+00, double 6.000000e+00>
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; CHECK-NEXT: [[TMP8:%.*]] = select <2 x i1> [[TMP6]], <2 x double> <double 6.000000e+00, double 6.000000e+00>, <2 x double> [[WIDE_LOAD]]
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; CHECK-NEXT: [[TMP9:%.*]] = select <2 x i1> [[TMP7]], <2 x double> <double 6.000000e+00, double 6.000000e+00>, <2 x double> [[WIDE_LOAD7]]
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; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP4]], <2 x double> zeroinitializer, <2 x double> [[TMP8]]
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; CHECK-NEXT: [[TMP11:%.*]] = select <2 x i1> [[TMP5]], <2 x double> zeroinitializer, <2 x double> [[TMP9]]
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; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds double, ptr [[X]], i64 [[TMP1]]
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; CHECK-NEXT: store <2 x double> [[TMP10]], ptr [[TMP12]], align 8
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; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds double, ptr [[TMP12]], i64 2
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; CHECK-NEXT: store <2 x double> [[TMP11]], ptr [[TMP13]], align 8
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
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; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[INDEX_NEXT]], 20000
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; CHECK-NEXT: br i1 [[TMP14]], label [[FOR_COND_CLEANUP:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: for.cond.cleanup:
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; CHECK-NEXT: ret void
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; CHECK: for.body:
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; CHECK-NEXT: [[I_04:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY]] ]
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; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[I_04]] to i64
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[Y]], i64 [[IDXPROM]]
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; CHECK-NEXT: [[TMP15:%.*]] = load double, ptr [[ARRAYIDX]], align 8
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; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt double [[TMP15]], 0.000000e+00
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; CHECK-NEXT: [[CMP1_I:%.*]] = fcmp ogt double [[TMP15]], 6.000000e+00
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; CHECK-NEXT: [[DOTV_I:%.*]] = select i1 [[CMP1_I]], double 6.000000e+00, double [[TMP15]]
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; CHECK-NEXT: [[RETVAL_0_I:%.*]] = select i1 [[CMP_I]], double 0.000000e+00, double [[DOTV_I]]
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; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[X]], i64 [[IDXPROM]]
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; CHECK-NEXT: store double [[RETVAL_0_I]], ptr [[ARRAYIDX2]], align 8
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; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_04]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[I_04]], 19999
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]], !llvm.loop [[LOOP3:![0-9]+]]
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;
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entry:
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%X.addr = alloca ptr, align 8
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%Y.addr = alloca ptr, align 8
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%i = alloca i32, align 4
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store ptr %X, ptr %X.addr, align 8
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store ptr %Y, ptr %Y.addr, align 8
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call void @llvm.lifetime.start.p0(i64 4, ptr %i) #2
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store i32 0, ptr %i, align 4
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br label %for.cond
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for.cond: ; preds = %for.inc, %entry
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%0 = load i32, ptr %i, align 4
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%cmp = icmp ult i32 %0, 20000
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br i1 %cmp, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond
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call void @llvm.lifetime.end.p0(i64 4, ptr %i) #2
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br label %for.end
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for.body: ; preds = %for.cond
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%1 = load ptr, ptr %Y.addr, align 8
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%2 = load i32, ptr %i, align 4
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%idxprom = zext i32 %2 to i64
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%arrayidx = getelementptr inbounds double, ptr %1, i64 %idxprom
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%3 = load double, ptr %arrayidx, align 8
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%call = call double @clamp(double %3)
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%4 = load ptr, ptr %X.addr, align 8
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%5 = load i32, ptr %i, align 4
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%idxprom1 = zext i32 %5 to i64
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%arrayidx2 = getelementptr inbounds double, ptr %4, i64 %idxprom1
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store double %call, ptr %arrayidx2, align 8
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br label %for.inc
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for.inc: ; preds = %for.body
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%6 = load i32, ptr %i, align 4
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%inc = add i32 %6, 1
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store i32 %inc, ptr %i, align 4
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br label %for.cond
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for.end: ; preds = %for.cond.cleanup
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ret void
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}
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; Test that requires sinking/hoisting of instructions for vectorization.
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define void @loop2(ptr %A, ptr %B, ptr %C, float %x) {
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; CHECK-LABEL: @loop2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, ptr [[B:%.*]], i64 40000
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; CHECK-NEXT: [[UGLYGEP2:%.*]] = getelementptr i8, ptr [[C:%.*]], i64 40000
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; CHECK-NEXT: [[UGLYGEP3:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 40000
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ugt ptr [[UGLYGEP2]], [[B]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ugt ptr [[UGLYGEP]], [[C]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: [[BOUND04:%.*]] = icmp ugt ptr [[UGLYGEP3]], [[B]]
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; CHECK-NEXT: [[BOUND15:%.*]] = icmp ugt ptr [[UGLYGEP]], [[A]]
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; CHECK-NEXT: [[FOUND_CONFLICT6:%.*]] = and i1 [[BOUND04]], [[BOUND15]]
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; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT6]]
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; CHECK-NEXT: br i1 [[CONFLICT_RDX]], label [[LOOP_BODY:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i64 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4, !alias.scope !4
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], <i32 20, i32 20, i32 20, i32 20>
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]]
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; CHECK-NEXT: [[WIDE_LOAD7:%.*]] = load <4 x float>, ptr [[TMP2]], align 4, !alias.scope !7
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; CHECK-NEXT: [[TMP3:%.*]] = fmul <4 x float> [[WIDE_LOAD7]], [[BROADCAST_SPLAT]]
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: [[WIDE_LOAD8:%.*]] = load <4 x float>, ptr [[TMP4]], align 4, !alias.scope !9, !noalias !11
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; CHECK-NEXT: [[TMP5:%.*]] = select <4 x i1> [[TMP1]], <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, <4 x float> [[WIDE_LOAD8]]
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; CHECK-NEXT: [[PREDPHI:%.*]] = fadd <4 x float> [[TMP3]], [[TMP5]]
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; CHECK-NEXT: store <4 x float> [[PREDPHI]], ptr [[TMP4]], align 4, !alias.scope !9, !noalias !11
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10000
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; CHECK-NEXT: br i1 [[TMP6]], label [[EXIT:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
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; CHECK: loop.body:
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; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[C_GEP:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[IV1]]
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; CHECK-NEXT: [[C_LV:%.*]] = load i32, ptr [[C_GEP]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[C_LV]], 20
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; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV1]]
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; CHECK-NEXT: [[A_LV_0:%.*]] = load float, ptr [[A_GEP_0]], align 4
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; CHECK-NEXT: [[MUL2_I81_I:%.*]] = fmul float [[A_LV_0]], [[X]]
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; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV1]]
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; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_LATCH]], label [[ELSE:%.*]]
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; CHECK: else:
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; CHECK-NEXT: [[B_LV:%.*]] = load float, ptr [[B_GEP_0]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = fadd float [[MUL2_I81_I]], [[B_LV]]
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; CHECK-NEXT: br label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[ADD_SINK:%.*]] = phi float [ [[ADD]], [[ELSE]] ], [ [[MUL2_I81_I]], [[LOOP_BODY]] ]
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; CHECK-NEXT: store float [[ADD_SINK]], ptr [[B_GEP_0]], align 4
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1
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; CHECK-NEXT: [[CMP_0:%.*]] = icmp ult i64 [[IV1]], 9999
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; CHECK-NEXT: br i1 [[CMP_0]], label [[LOOP_BODY]], label [[EXIT]], !llvm.loop [[LOOP13:![0-9]+]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]
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%cmp.0 = icmp ult i64 %iv, 10000
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br i1 %cmp.0, label %loop.body, label %exit
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loop.body:
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%C.gep = getelementptr inbounds i32, ptr %C, i64 %iv
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%C.lv = load i32, ptr %C.gep
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%cmp = icmp eq i32 %C.lv, 20
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br i1 %cmp, label %then, label %else
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then:
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%A.gep.0 = getelementptr inbounds float, ptr %A, i64 %iv
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%A.lv.0 = load float, ptr %A.gep.0, align 4
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%mul2.i81.i = fmul float %A.lv.0, %x
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%B.gep.0 = getelementptr inbounds float, ptr %B, i64 %iv
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store float %mul2.i81.i, ptr %B.gep.0, align 4
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br label %loop.latch
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else:
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%A.gep.1 = getelementptr inbounds float, ptr %A, i64 %iv
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%A.lv.1 = load float, ptr %A.gep.1, align 4
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%mul2 = fmul float %A.lv.1, %x
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%B.gep.1 = getelementptr inbounds float, ptr %B, i64 %iv
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%B.lv = load float, ptr %B.gep.1, align 4
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%add = fadd float %mul2, %B.lv
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store float %add, ptr %B.gep.1, align 4
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br label %loop.latch
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loop.latch:
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%iv.next = add nuw nsw i64 %iv, 1
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br label %loop.header
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exit:
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ret void
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}
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declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
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declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
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