llvm-project

History

Simon Pilgrim e16b4f5b16 [X86] Fix SLM uops/resources counts for CMPXCHG instructions

LOCK + CMPXCHG8/CMPXCHG16 variants still need overriding as they are not completely correct - already much better though

Based off llvm-exegesis captures, confirmed with Agner + uops.info

2022-12-20 13:07:03 +00:00

AlderlakeP

[MCA][X86] Add test coverage for XSAVE instructions

2022-11-20 13:56:04 +00:00

Atom

[MCA][X86] Add test coverage for LOOP/LOOPE/LOOPNE instructions

2022-11-20 11:35:21 +00:00

Barcelona

[X86] SandyBridge - fix ADC RMW uop count

2022-12-17 21:52:44 +00:00

BdVer2

[MCA][X86] Add test coverage for XSAVE instructions

2022-11-20 13:56:04 +00:00

Broadwell

[MCA][X86] Add test coverage for XSAVE instructions

2022-11-20 13:56:04 +00:00

BtVer2

[X86][ConstraintFP] Model MXCSR when load/store it

2022-12-08 09:48:30 +08:00

Generic

[X86] SandyBridge - fix ADC RMW uop count

2022-12-17 21:52:44 +00:00

Haswell

[X86][ConstraintFP] Model MXCSR when load/store it

2022-12-08 09:48:30 +08:00

IceLakeServer

[MCA][X86] Add missing knotw test

2022-12-11 15:36:06 +00:00

SandyBridge

[X86] SandyBridge - fix ADC RMW uop count

2022-12-17 21:52:44 +00:00

SkylakeClient

[MCA][X86] Add test coverage for XSAVE instructions

2022-11-20 13:56:04 +00:00

SkylakeServer

[MCA][X86] Add missing knotw test

2022-12-11 15:36:06 +00:00

SLM

[X86] Fix SLM uops/resources counts for CMPXCHG instructions

2022-12-20 13:07:03 +00:00

Znver1

[X86] Fix BMI uop/throughputs on znver1/znver2

2022-12-17 20:38:40 +00:00

Znver2

[X86] Fix BMI uop/throughputs on znver1/znver2

2022-12-17 20:38:40 +00:00

Znver3

[X86] AMD Zen 3 sched model: FMA ops have inverse throughput of 0.5

2022-12-11 21:12:55 +03:00

barrier_output.s

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bextr-read-after-ld.s

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bzhi-read-after-ld.s

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cpus.s

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cv_fpo_directive_no_segfault.s

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default-iterations.s

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directives-handle-crlf.s

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dispatch_width.s

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fma3-read-after-ld-1.s

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fma3-read-after-ld-2.s

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in-order-cpu.s

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intel-syntax.s

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invalid-assembly-sequence.s

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invalid-cpu.s

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invalid-empty-file.s

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lit.local.cfg

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llvm-mca-markers-1.s

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llvm-mca-markers-2.s

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llvm-mca-markers-3.s

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llvm-mca-markers-4.s

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llvm-mca-markers-5.s

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llvm-mca-markers-6.s

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llvm-mca-markers-7.s

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llvm-mca-markers-8.s

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llvm-mca-markers-9.s

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llvm-mca-markers-10.s

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llvm-mca-markers-11.s

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llvm-mca-markers-12.s

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no-sched-model.s

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option-all-stats-1.s

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option-all-stats-2.s

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option-all-views-1.s

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option-all-views-2.s

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option-no-stats-1.s

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print-imm-hex-1.s

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print-imm-hex-2.s

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read-after-ld-1.s

[X86] Fix fdiv throughput/latency/uops counts

2022-09-03 15:23:46 +01:00

read-after-ld-2.s

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read-after-ld-3.s

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scheduler-queue-usage.s

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show-encoding.s

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sqrt-rsqrt-rcp-memop.s

[CostModel][X86] Add CostKinds handling for sqrt intrinsicc

2022-09-04 18:39:21 +01:00

uop-queue.s

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variable-blend-read-after-ld-1.s

[X86] Fix bdver2 128-bit shuffles throughputs

2022-09-10 17:34:40 +01:00

variable-blend-read-after-ld-2.s

[X86] Fix bdver2 128-bit shuffles throughputs

2022-09-10 17:34:40 +01:00