0a1569a400
This is generated by running ``` sed --in-place 's/[[:space:]]\+$//' mlir/**/*.td sed --in-place 's/[[:space:]]\+$//' mlir/**/*.mlir ``` Reviewed By: rriddle, dcaballe Differential Revision: https://reviews.llvm.org/D138866
181 lines
8.3 KiB
MLIR
181 lines
8.3 KiB
MLIR
// RUN: mlir-opt -split-input-file -verify-diagnostics %s
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func.func @ldmatrix_address_space_f16_x4(%arg0: memref<128x128xf16, 2>) -> vector<4x1xf16> {
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%c0 = arith.constant 0 : index
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// expected-error @+1 {{expected nvgpu.ldmatrix srcMemref must have memory space 3}}
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%a = nvgpu.ldmatrix %arg0[%c0, %c0] {transpose = false, numTiles = 4 : i32} : memref<128x128xf16, 2> -> vector<4x1xf16>
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return %a : vector<4x1xf16>
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}
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// -----
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func.func @ldmatrix_num_elements_f16_x4(%arg0: memref<128x128xf16, 3>) -> vector<4x1xf16> {
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%c0 = arith.constant 0 : index
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// expected-error @+1 {{expected vector register shape[1] = 2}}
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%a = nvgpu.ldmatrix %arg0[%c0, %c0] {transpose = false, numTiles = 4 : i32} : memref<128x128xf16, 3> -> vector<4x1xf16>
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return %a : vector<4x1xf16>
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}
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// -----
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func.func @ldmatrix_num_tiles_f16_x4(%arg0: memref<128x128xf16, 3>) -> vector<2x2xf16> {
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%c0 = arith.constant 0 : index
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// expected-error @+1 {{expected vector register shape[0] and numTiles to match}}
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%a = nvgpu.ldmatrix %arg0[%c0, %c0] {transpose = false, numTiles = 4 : i32} : memref<128x128xf16, 3> -> vector<2x2xf16>
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return %a : vector<2x2xf16>
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}
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// -----
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func.func @ldmatrix_num_tiles_f32_x4(%arg0: memref<128x128xf32, 3>) -> vector<4x2xf32> {
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%c0 = arith.constant 0 : index
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// expected-error @+1 {{expected vector register shape[1] = 1}}
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%a = nvgpu.ldmatrix %arg0[%c0, %c0] {transpose = false, numTiles = 4 : i32} : memref<128x128xf32, 3> -> vector<4x2xf32>
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return %a : vector<4x2xf32>
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}
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// -----
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func.func @ldmatrix_trans_f32_x4(%arg0: memref<128x128xf32, 3>) -> vector<4x1xf32> {
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%c0 = arith.constant 0 : index
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// expected-error @+1 {{nvgpu.ldmatrix transpose works only at 16b granularity}}
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%a = nvgpu.ldmatrix %arg0[%c0, %c0] {transpose = true, numTiles = 4 : i32} : memref<128x128xf32, 3> -> vector<4x1xf32>
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return %a : vector<4x1xf32>
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}
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// -----
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func.func @ldmatrix_type_x4(%arg0: memref<128x128xf32, 3>) -> vector<4x2xf16> {
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%c0 = arith.constant 0 : index
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// expected-error @+1 {{'nvgpu.ldmatrix' op failed to verify that srcMemref and res have same element type}}
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%a = nvgpu.ldmatrix %arg0[%c0, %c0] {transpose = false, numTiles = 4 : i32} : memref<128x128xf32, 3> -> vector<4x2xf16>
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return %a : vector<4x2xf16>
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}
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// -----
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func.func @m16n8k16_fp16_vector_shape_a(%arg0: vector<4x4xf16>, %arg1: vector<2x2xf16>, %arg2: vector<2x2xf16>) -> vector<2x2xf16> {
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// expected-error @+1 {{expected 256 warp-wide matrix A elements}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [16, 8, 16]} : (vector<4x4xf16>, vector<2x2xf16>, vector<2x2xf16>) -> vector<2x2xf16>
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return %d : vector<2x2xf16>
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}
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// -----
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func.func @m16n8k16_fp16_vector_shape_b(%arg0: vector<4x2xf16>, %arg1: vector<2x4xf16>, %arg2: vector<2x2xf16>) -> vector<2x2xf16> {
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// expected-error @+1 {{expected 128 warp-wide matrix B elements}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [16, 8, 16]} : (vector<4x2xf16>, vector<2x4xf16>, vector<2x2xf16>) -> vector<2x2xf16>
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return %d : vector<2x2xf16>
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}
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// -----
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func.func @m16n8k16_fp16_vector_shape_c(%arg0: vector<4x2xf16>, %arg1: vector<2x2xf16>, %arg2: vector<2x4xf16>) -> vector<2x4xf16> {
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// expected-error @+1 {{expected 128 warp-wide matrix C elements}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [16, 8, 16]} : (vector<4x2xf16>, vector<2x2xf16>, vector<2x4xf16>) -> vector<2x4xf16>
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return %d : vector<2x4xf16>
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}
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// -----
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func.func @m16n8k16_fp16_vector_shape_a_extended(%arg0: vector<2x4xf16>, %arg1: vector<2x2xf16>, %arg2: vector<2x2xf16>) -> vector<2x2xf16> {
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// expected-error @+1 {{expected matrix A to be shaped (4 x 2)}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [16, 8, 16]} : (vector<2x4xf16>, vector<2x2xf16>, vector<2x2xf16>) -> vector<2x2xf16>
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return %d : vector<2x2xf16>
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}
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// -----
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func.func @m16n8k16_fp16_tf32Enabled(%arg0: vector<4x2xf16>, %arg1: vector<2x2xf16>, %arg2: vector<2x2xf16>) -> vector<2x2xf16> {
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// expected-error @+1 {{expected tf32 tensor cores only for F32 operands}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [16, 8, 16], tf32Enabled} : (vector<4x2xf16>, vector<2x2xf16>, vector<2x2xf16>) -> vector<2x2xf16>
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return %d : vector<2x2xf16>
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}
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// -----
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func.func @m16n8k8_fp32_vector_shape_a(%arg0: vector<4x2xf32>, %arg1: vector<2x1xf32>, %arg2: vector<2x2xf32>) -> vector<2x2xf32> {
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// expected-error @+1 {{expected 128 warp-wide matrix A elements}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [16, 8, 8]} : (vector<4x2xf32>, vector<2x1xf32>, vector<2x2xf32>) -> vector<2x2xf32>
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return %d : vector<2x2xf32>
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}
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// -----
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func.func @m16n8k8_fp32_vector_shape_a_extended(%arg0: vector<1x4xf32>, %arg1: vector<2x1xf32>, %arg2: vector<2x2xf32>) -> vector<2x2xf32> {
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// expected-error @+1 {{expected matrix A to be shaped (4 x 1)}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [16, 8, 8]} : (vector<1x4xf32>, vector<2x1xf32>, vector<2x2xf32>) -> vector<2x2xf32>
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return %d : vector<2x2xf32>
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}
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// -----
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func.func @m8n8k4_fp64_vector_shape_a(%arg0: vector<1x2xf64>, %arg1: vector<1x1xf64>, %arg2: vector<1x2xf64>) -> vector<1x2xf64> {
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// expected-error @+1 {{expected 32 warp-wide matrix A elements}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [8, 8, 4]} : (vector<1x2xf64>, vector<1x1xf64>, vector<1x2xf64>) -> vector<1x2xf64>
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return %d : vector<1x2xf64>
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}
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// -----
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func.func @m8n8k4_fp64_vector_shape_c_extended(%arg0: vector<1x1xf64>, %arg1: vector<1x1xf64>, %arg2: vector<2x1xf64>) -> vector<2x1xf64> {
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// expected-error @+1 {{expected matrix C to be shaped (1 x 2)}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [8, 8, 4]} : (vector<1x1xf64>, vector<1x1xf64>, vector<2x1xf64>) -> vector<2x1xf64>
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return %d : vector<2x1xf64>
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}
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// -----
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func.func @m16n8k32_int8_vector_shape_b(%arg0: vector<4x4xi8>, %arg1: vector<4x4xi8>, %arg2: vector<2x2xi32>) -> vector<2x2xi32> {
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// expected-error @+1 {{expected 256 warp-wide matrix B elements}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [16, 8, 32]} : (vector<4x4xi8>, vector<4x4xi8>, vector<2x2xi32>) -> vector<2x2xi32>
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return %d : vector<2x2xi32>
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}
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// -----
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func.func @m16n8k32_int32_datatype(%arg0: vector<4x4xi32>, %arg1: vector<2x4xi8>, %arg2: vector<2x2xi32>) -> vector<2x2xi32> {
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// expected-error @+1 {{op failed to verify that matrixA and matrixB have same element type}}
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%d = nvgpu.mma.sync (%arg0, %arg1, %arg2) {mmaShape = [16, 8, 32]} : (vector<4x4xi32>, vector<2x4xi8>, vector<2x2xi32>) -> vector<2x2xi32>
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return %d : vector<2x2xi32>
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}
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// -----
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func.func @async_cp_memory_space(%dst : memref<16xf32>, %src : memref<16xf32>, %i : index) -> () {
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// expected-error @+1 {{destination memref must have memory space 3}}
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nvgpu.device_async_copy %src[%i], %dst[%i], 16 : memref<16xf32> to memref<16xf32>
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return
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}
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// -----
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func.func @async_cp_memref_type(%dst : memref<16xi32, 3>, %src : memref<16xf32>, %i : index) -> () {
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// expected-error @+1 {{source and destination must have the same element type}}
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nvgpu.device_async_copy %src[%i], %dst[%i], 16 : memref<16xf32> to memref<16xi32, 3>
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return
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}
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// -----
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func.func @async_cp_num_src_indices(%dst : memref<16xf32, 3>, %src : memref<16x16xf32>, %i : index) -> () {
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// expected-error @+1 {{expected 2 source indices, got 1}}
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nvgpu.device_async_copy %src[%i], %dst[%i], 16 : memref<16x16xf32> to memref<16xf32, 3>
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return
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}
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// -----
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func.func @async_cp_num_dst_indices(%dst : memref<16x16xf32, 3>, %src : memref<16xf32>, %i : index) -> () {
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// expected-error @+1 {{expected 2 destination indices, got 1}}
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nvgpu.device_async_copy %src[%i], %dst[%i], 16 : memref<16xf32> to memref<16x16xf32, 3>
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return
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}
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// -----
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func.func @async_cp_num_src_stride(
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%dst : memref<200x100xf32, 3>,
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%src : memref<200x100xf32, affine_map<(d0, d1) -> (200*d0 + 2*d1)>>,
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%i : index) -> () {
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// expected-error @+1 {{source memref most minor dim must have unit stride}}
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nvgpu.device_async_copy %src[%i, %i], %dst[%i, %i], 16 :
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memref<200x100xf32, affine_map<(d0, d1) -> (200*d0 + 2*d1)>> to memref<200x100xf32, 3>
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return
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}
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// -----
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func.func @async_cp_num_dst_stride(
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%dst : memref<200x100xf32, affine_map<(d0, d1) -> (200*d0 + 2*d1)>, 3>,
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%src : memref<200x100xf32>,
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%i : index) -> () {
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// expected-error @+1 {{destination memref most minor dim must have unit stride}}
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nvgpu.device_async_copy %src[%i, %i], %dst[%i, %i], 16 :
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memref<200x100xf32> to memref<200x100xf32, affine_map<(d0, d1) -> (200*d0 + 2*d1)>, 3>
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return
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}
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