ab9cdf09f4
This commit refactors the syntax of "ugly" attribute/type formats to not use strings for wrapping. This means that moving forward attirbutes and type formats will always need to be in some recognizable form, i.e. if they use incompatible characters they will need to manually wrap those in a string, the framework will no longer do it automatically. This has the benefit of greatly simplifying how parsing attributes/types work, given that we currently rely on some extremely complicated nested parser logic which is quite problematic for a myriad of reasons; unecessary complexity(we create a nested source manager/lexer/etc.), diagnostic locations can be off/wrong given string escaping, etc. Differential Revision: https://reviews.llvm.org/D118505
727 lines
30 KiB
MLIR
727 lines
30 KiB
MLIR
// RUN: mlir-opt -split-input-file %s | FileCheck %s
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// Verify the printed output can be parsed.
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// RUN: mlir-opt -split-input-file %s | mlir-opt -split-input-file | FileCheck %s
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// Verify the generic form can be parsed.
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// RUN: mlir-opt -split-input-file -mlir-print-op-generic %s | mlir-opt -split-input-file | FileCheck %s
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func.func @compute1(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x10xf32>) -> memref<10x10xf32> {
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%c0 = arith.constant 0 : index
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%c10 = arith.constant 10 : index
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%c1 = arith.constant 1 : index
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%async = arith.constant 1 : i64
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acc.parallel async(%async: i64) {
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acc.loop gang vector {
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scf.for %arg3 = %c0 to %c10 step %c1 {
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scf.for %arg4 = %c0 to %c10 step %c1 {
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scf.for %arg5 = %c0 to %c10 step %c1 {
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%a = memref.load %A[%arg3, %arg5] : memref<10x10xf32>
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%b = memref.load %B[%arg5, %arg4] : memref<10x10xf32>
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%cij = memref.load %C[%arg3, %arg4] : memref<10x10xf32>
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%p = arith.mulf %a, %b : f32
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%co = arith.addf %cij, %p : f32
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memref.store %co, %C[%arg3, %arg4] : memref<10x10xf32>
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}
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}
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}
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acc.yield
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} attributes { collapse = 3 }
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acc.yield
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}
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return %C : memref<10x10xf32>
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}
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// CHECK-LABEL: func @compute1(
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// CHECK-NEXT: %{{.*}} = arith.constant 0 : index
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// CHECK-NEXT: %{{.*}} = arith.constant 10 : index
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// CHECK-NEXT: %{{.*}} = arith.constant 1 : index
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// CHECK-NEXT: [[ASYNC:%.*]] = arith.constant 1 : i64
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// CHECK-NEXT: acc.parallel async([[ASYNC]]: i64) {
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// CHECK-NEXT: acc.loop gang vector {
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// CHECK-NEXT: scf.for %{{.*}} = %{{.*}} to %{{.*}} step %{{.*}} {
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// CHECK-NEXT: scf.for %{{.*}} = %{{.*}} to %{{.*}} step %{{.*}} {
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// CHECK-NEXT: scf.for %{{.*}} = %{{.*}} to %{{.*}} step %{{.*}} {
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: %{{.*}} = arith.mulf %{{.*}}, %{{.*}} : f32
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// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
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// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: } attributes {collapse = 3 : i64}
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK-NEXT: return %{{.*}} : memref<10x10xf32>
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// CHECK-NEXT: }
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// -----
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func.func @compute2(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x10xf32>) -> memref<10x10xf32> {
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%c0 = arith.constant 0 : index
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%c10 = arith.constant 10 : index
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%c1 = arith.constant 1 : index
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acc.parallel {
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acc.loop {
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scf.for %arg3 = %c0 to %c10 step %c1 {
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scf.for %arg4 = %c0 to %c10 step %c1 {
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scf.for %arg5 = %c0 to %c10 step %c1 {
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%a = memref.load %A[%arg3, %arg5] : memref<10x10xf32>
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%b = memref.load %B[%arg5, %arg4] : memref<10x10xf32>
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%cij = memref.load %C[%arg3, %arg4] : memref<10x10xf32>
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%p = arith.mulf %a, %b : f32
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%co = arith.addf %cij, %p : f32
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memref.store %co, %C[%arg3, %arg4] : memref<10x10xf32>
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}
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}
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}
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acc.yield
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} attributes {seq}
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acc.yield
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}
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return %C : memref<10x10xf32>
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}
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// CHECK-LABEL: func @compute2(
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// CHECK-NEXT: %{{.*}} = arith.constant 0 : index
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// CHECK-NEXT: %{{.*}} = arith.constant 10 : index
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// CHECK-NEXT: %{{.*}} = arith.constant 1 : index
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// CHECK-NEXT: acc.parallel {
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// CHECK-NEXT: acc.loop {
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// CHECK-NEXT: scf.for %{{.*}} = %{{.*}} to %{{.*}} step %{{.*}} {
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// CHECK-NEXT: scf.for %{{.*}} = %{{.*}} to %{{.*}} step %{{.*}} {
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// CHECK-NEXT: scf.for %{{.*}} = %{{.*}} to %{{.*}} step %{{.*}} {
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: %{{.*}} = arith.mulf %{{.*}}, %{{.*}} : f32
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// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
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// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: } attributes {seq}
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK-NEXT: return %{{.*}} : memref<10x10xf32>
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// CHECK-NEXT: }
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// -----
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func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10xf32>, %d: memref<10xf32>) -> memref<10xf32> {
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%lb = arith.constant 0 : index
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%st = arith.constant 1 : index
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%c10 = arith.constant 10 : index
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%numGangs = arith.constant 10 : i64
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%numWorkers = arith.constant 10 : i64
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acc.data present(%a, %b, %c, %d: memref<10x10xf32>, memref<10x10xf32>, memref<10xf32>, memref<10xf32>) {
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acc.parallel num_gangs(%numGangs: i64) num_workers(%numWorkers: i64) private(%c : memref<10xf32>) {
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acc.loop gang {
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scf.for %x = %lb to %c10 step %st {
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acc.loop worker {
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scf.for %y = %lb to %c10 step %st {
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%axy = memref.load %a[%x, %y] : memref<10x10xf32>
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%bxy = memref.load %b[%x, %y] : memref<10x10xf32>
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%tmp = arith.addf %axy, %bxy : f32
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memref.store %tmp, %c[%y] : memref<10xf32>
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}
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acc.yield
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}
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acc.loop {
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// for i = 0 to 10 step 1
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// d[x] += c[i]
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scf.for %i = %lb to %c10 step %st {
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%ci = memref.load %c[%i] : memref<10xf32>
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%dx = memref.load %d[%x] : memref<10xf32>
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%z = arith.addf %ci, %dx : f32
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memref.store %z, %d[%x] : memref<10xf32>
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}
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acc.yield
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} attributes {seq}
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}
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acc.yield
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}
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acc.yield
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}
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acc.terminator
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}
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return %d : memref<10xf32>
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}
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// CHECK: func @compute3({{.*}}: memref<10x10xf32>, {{.*}}: memref<10x10xf32>, [[ARG2:%.*]]: memref<10xf32>, {{.*}}: memref<10xf32>) -> memref<10xf32> {
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// CHECK-NEXT: [[C0:%.*]] = arith.constant 0 : index
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// CHECK-NEXT: [[C1:%.*]] = arith.constant 1 : index
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// CHECK-NEXT: [[C10:%.*]] = arith.constant 10 : index
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// CHECK-NEXT: [[NUMGANG:%.*]] = arith.constant 10 : i64
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// CHECK-NEXT: [[NUMWORKERS:%.*]] = arith.constant 10 : i64
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// CHECK-NEXT: acc.data present(%{{.*}}, %{{.*}}, %{{.*}}, %{{.*}} : memref<10x10xf32>, memref<10x10xf32>, memref<10xf32>, memref<10xf32>) {
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// CHECK-NEXT: acc.parallel num_gangs([[NUMGANG]]: i64) num_workers([[NUMWORKERS]]: i64) private([[ARG2]]: memref<10xf32>) {
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// CHECK-NEXT: acc.loop gang {
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// CHECK-NEXT: scf.for %{{.*}} = [[C0]] to [[C10]] step [[C1]] {
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// CHECK-NEXT: acc.loop worker {
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// CHECK-NEXT: scf.for %{{.*}} = [[C0]] to [[C10]] step [[C1]] {
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
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// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
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// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}] : memref<10xf32>
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// CHECK-NEXT: }
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK-NEXT: acc.loop {
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// CHECK-NEXT: scf.for %{{.*}} = [[C0]] to [[C10]] step [[C1]] {
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}] : memref<10xf32>
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// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}] : memref<10xf32>
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// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
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// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}] : memref<10xf32>
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// CHECK-NEXT: }
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: } attributes {seq}
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// CHECK-NEXT: }
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK-NEXT: acc.terminator
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// CHECK-NEXT: }
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// CHECK-NEXT: return %{{.*}} : memref<10xf32>
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// CHECK-NEXT: }
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// -----
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func.func @testloopop() -> () {
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%i64Value = arith.constant 1 : i64
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%i32Value = arith.constant 128 : i32
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%idxValue = arith.constant 8 : index
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acc.loop gang worker vector {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop gang(num=%i64Value: i64) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop gang(static=%i64Value: i64) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop worker(%i64Value: i64) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop worker(%i32Value: i32) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop worker(%idxValue: index) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop vector(%i64Value: i64) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop vector(%i32Value: i32) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop vector(%idxValue: index) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop gang(num=%i64Value: i64) worker vector {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop gang(num=%i64Value: i64, static=%i64Value: i64) worker(%i64Value: i64) vector(%i64Value: i64) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop gang(num=%i32Value: i32, static=%idxValue: index) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop tile(%i64Value: i64, %i64Value: i64) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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acc.loop tile(%i32Value: i32, %i32Value: i32) {
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"test.openacc_dummy_op"() : () -> ()
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acc.yield
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}
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return
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}
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// CHECK: [[I64VALUE:%.*]] = arith.constant 1 : i64
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// CHECK-NEXT: [[I32VALUE:%.*]] = arith.constant 128 : i32
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// CHECK-NEXT: [[IDXVALUE:%.*]] = arith.constant 8 : index
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// CHECK: acc.loop gang worker vector {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop gang(num=[[I64VALUE]]: i64) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop gang(static=[[I64VALUE]]: i64) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop worker([[I64VALUE]]: i64) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop worker([[I32VALUE]]: i32) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop worker([[IDXVALUE]]: index) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop vector([[I64VALUE]]: i64) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop vector([[I32VALUE]]: i32) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop vector([[IDXVALUE]]: index) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop gang(num=[[I64VALUE]]: i64) worker vector {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop gang(num=[[I64VALUE]]: i64, static=[[I64VALUE]]: i64) worker([[I64VALUE]]: i64) vector([[I64VALUE]]: i64) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop gang(num=[[I32VALUE]]: i32, static=[[IDXVALUE]]: index) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop tile([[I64VALUE]]: i64, [[I64VALUE]]: i64) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// CHECK: acc.loop tile([[I32VALUE]]: i32, [[I32VALUE]]: i32) {
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// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: }
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// -----
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func.func @testparallelop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>) -> () {
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%i64value = arith.constant 1 : i64
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%i32value = arith.constant 1 : i32
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%idxValue = arith.constant 1 : index
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acc.parallel async(%i64value: i64) {
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}
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acc.parallel async(%i32value: i32) {
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}
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acc.parallel async(%idxValue: index) {
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}
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acc.parallel wait(%i64value: i64) {
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}
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acc.parallel wait(%i32value: i32) {
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}
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acc.parallel wait(%idxValue: index) {
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}
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acc.parallel wait(%i64value: i64, %i32value: i32, %idxValue: index) {
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}
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acc.parallel num_gangs(%i64value: i64) {
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}
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acc.parallel num_gangs(%i32value: i32) {
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}
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acc.parallel num_gangs(%idxValue: index) {
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}
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acc.parallel num_workers(%i64value: i64) {
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}
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acc.parallel num_workers(%i32value: i32) {
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}
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acc.parallel num_workers(%idxValue: index) {
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}
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acc.parallel vector_length(%i64value: i64) {
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}
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acc.parallel vector_length(%i32value: i32) {
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}
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acc.parallel vector_length(%idxValue: index) {
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}
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acc.parallel copyin(%a: memref<10xf32>, %b: memref<10xf32>) {
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}
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acc.parallel copyin_readonly(%a: memref<10xf32>, %b: memref<10xf32>) {
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}
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acc.parallel copyin(%a: memref<10xf32>) copyout_zero(%b: memref<10xf32>, %c: memref<10x10xf32>) {
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}
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acc.parallel copyout(%b: memref<10xf32>, %c: memref<10x10xf32>) create(%a: memref<10xf32>) {
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}
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acc.parallel copyout_zero(%b: memref<10xf32>, %c: memref<10x10xf32>) create_zero(%a: memref<10xf32>) {
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}
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acc.parallel no_create(%a: memref<10xf32>) present(%b: memref<10xf32>, %c: memref<10x10xf32>) {
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}
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acc.parallel deviceptr(%a: memref<10xf32>) attach(%b: memref<10xf32>, %c: memref<10x10xf32>) {
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}
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acc.parallel private(%a: memref<10xf32>, %c: memref<10x10xf32>) firstprivate(%b: memref<10xf32>) {
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}
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acc.parallel {
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} attributes {defaultAttr = #acc<defaultvalue none>}
|
|
acc.parallel {
|
|
} attributes {defaultAttr = #acc<defaultvalue present>}
|
|
acc.parallel {
|
|
} attributes {asyncAttr}
|
|
acc.parallel {
|
|
} attributes {waitAttr}
|
|
acc.parallel {
|
|
} attributes {selfAttr}
|
|
return
|
|
}
|
|
|
|
// CHECK: func @testparallelop([[ARGA:%.*]]: memref<10xf32>, [[ARGB:%.*]]: memref<10xf32>, [[ARGC:%.*]]: memref<10x10xf32>) {
|
|
// CHECK: [[I64VALUE:%.*]] = arith.constant 1 : i64
|
|
// CHECK: [[I32VALUE:%.*]] = arith.constant 1 : i32
|
|
// CHECK: [[IDXVALUE:%.*]] = arith.constant 1 : index
|
|
// CHECK: acc.parallel async([[I64VALUE]]: i64) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel async([[I32VALUE]]: i32) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel async([[IDXVALUE]]: index) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel wait([[I64VALUE]]: i64) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel wait([[I32VALUE]]: i32) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel wait([[IDXVALUE]]: index) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel wait([[I64VALUE]]: i64, [[I32VALUE]]: i32, [[IDXVALUE]]: index) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel num_gangs([[I64VALUE]]: i64) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel num_gangs([[I32VALUE]]: i32) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel num_gangs([[IDXVALUE]]: index) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel num_workers([[I64VALUE]]: i64) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel num_workers([[I32VALUE]]: i32) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel num_workers([[IDXVALUE]]: index) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel vector_length([[I64VALUE]]: i64) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel vector_length([[I32VALUE]]: i32) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel vector_length([[IDXVALUE]]: index) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel copyin([[ARGA]]: memref<10xf32>, [[ARGB]]: memref<10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel copyin_readonly([[ARGA]]: memref<10xf32>, [[ARGB]]: memref<10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel copyin([[ARGA]]: memref<10xf32>) copyout_zero([[ARGB]]: memref<10xf32>, [[ARGC]]: memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel copyout([[ARGB]]: memref<10xf32>, [[ARGC]]: memref<10x10xf32>) create([[ARGA]]: memref<10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel copyout_zero([[ARGB]]: memref<10xf32>, [[ARGC]]: memref<10x10xf32>) create_zero([[ARGA]]: memref<10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel no_create([[ARGA]]: memref<10xf32>) present([[ARGB]]: memref<10xf32>, [[ARGC]]: memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel deviceptr([[ARGA]]: memref<10xf32>) attach([[ARGB]]: memref<10xf32>, [[ARGC]]: memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel private([[ARGA]]: memref<10xf32>, [[ARGC]]: memref<10x10xf32>) firstprivate([[ARGB]]: memref<10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.parallel {
|
|
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
|
|
// CHECK: acc.parallel {
|
|
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue present>}
|
|
// CHECK: acc.parallel {
|
|
// CHECK-NEXT: } attributes {asyncAttr}
|
|
// CHECK: acc.parallel {
|
|
// CHECK-NEXT: } attributes {waitAttr}
|
|
// CHECK: acc.parallel {
|
|
// CHECK-NEXT: } attributes {selfAttr}
|
|
|
|
// -----
|
|
|
|
func.func @testdataop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>) -> () {
|
|
%ifCond = arith.constant true
|
|
acc.data if(%ifCond) present(%a : memref<10xf32>) {
|
|
}
|
|
acc.data present(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data copy(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data copyin(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data copyin_readonly(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data copyout(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data copyout_zero(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data create(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data create_zero(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data no_create(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data deviceptr(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data attach(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
}
|
|
acc.data copyin(%b: memref<10xf32>) copyout(%c: memref<10x10xf32>) present(%a: memref<10xf32>) {
|
|
}
|
|
acc.data present(%a : memref<10xf32>) {
|
|
} attributes { defaultAttr = #acc<defaultvalue none> }
|
|
acc.data present(%a : memref<10xf32>) {
|
|
} attributes { defaultAttr = #acc<defaultvalue present> }
|
|
acc.data {
|
|
} attributes { defaultAttr = #acc<defaultvalue none> }
|
|
return
|
|
}
|
|
|
|
// CHECK: func @testdataop([[ARGA:%.*]]: memref<10xf32>, [[ARGB:%.*]]: memref<10xf32>, [[ARGC:%.*]]: memref<10x10xf32>) {
|
|
// CHECK: [[IFCOND1:%.*]] = arith.constant true
|
|
// CHECK: acc.data if([[IFCOND1]]) present([[ARGA]] : memref<10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data present([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data copy([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data copyin([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data copyin_readonly([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data copyout([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data copyout_zero([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data create([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data create_zero([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data no_create([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data deviceptr([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data attach([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data copyin([[ARGB]] : memref<10xf32>) copyout([[ARGC]] : memref<10x10xf32>) present([[ARGA]] : memref<10xf32>) {
|
|
// CHECK-NEXT: }
|
|
// CHECK: acc.data present([[ARGA]] : memref<10xf32>) {
|
|
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
|
|
// CHECK: acc.data present([[ARGA]] : memref<10xf32>) {
|
|
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue present>}
|
|
// CHECK: acc.data {
|
|
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
|
|
|
|
// -----
|
|
|
|
func.func @testupdateop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>) -> () {
|
|
%i64Value = arith.constant 1 : i64
|
|
%i32Value = arith.constant 1 : i32
|
|
%idxValue = arith.constant 1 : index
|
|
%ifCond = arith.constant true
|
|
acc.update async(%i64Value: i64) host(%a: memref<10xf32>)
|
|
acc.update async(%i32Value: i32) host(%a: memref<10xf32>)
|
|
acc.update async(%idxValue: index) host(%a: memref<10xf32>)
|
|
acc.update wait_devnum(%i64Value: i64) wait(%i32Value, %idxValue : i32, index) host(%a: memref<10xf32>)
|
|
acc.update if(%ifCond) host(%a: memref<10xf32>)
|
|
acc.update device_type(%i32Value : i32) host(%a: memref<10xf32>)
|
|
acc.update host(%a: memref<10xf32>) device(%b, %c : memref<10xf32>, memref<10x10xf32>)
|
|
acc.update host(%a: memref<10xf32>) device(%b, %c : memref<10xf32>, memref<10x10xf32>) attributes {async}
|
|
acc.update host(%a: memref<10xf32>) device(%b, %c : memref<10xf32>, memref<10x10xf32>) attributes {wait}
|
|
acc.update host(%a: memref<10xf32>) device(%b, %c : memref<10xf32>, memref<10x10xf32>) attributes {ifPresent}
|
|
return
|
|
}
|
|
|
|
// CHECK: func @testupdateop([[ARGA:%.*]]: memref<10xf32>, [[ARGB:%.*]]: memref<10xf32>, [[ARGC:%.*]]: memref<10x10xf32>) {
|
|
// CHECK: [[I64VALUE:%.*]] = arith.constant 1 : i64
|
|
// CHECK: [[I32VALUE:%.*]] = arith.constant 1 : i32
|
|
// CHECK: [[IDXVALUE:%.*]] = arith.constant 1 : index
|
|
// CHECK: [[IFCOND:%.*]] = arith.constant true
|
|
// CHECK: acc.update async([[I64VALUE]] : i64) host([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.update async([[I32VALUE]] : i32) host([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.update async([[IDXVALUE]] : index) host([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.update wait_devnum([[I64VALUE]] : i64) wait([[I32VALUE]], [[IDXVALUE]] : i32, index) host([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.update if([[IFCOND]]) host([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.update device_type([[I32VALUE]] : i32) host([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.update host([[ARGA]] : memref<10xf32>) device([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>)
|
|
// CHECK: acc.update host([[ARGA]] : memref<10xf32>) device([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>) attributes {async}
|
|
// CHECK: acc.update host([[ARGA]] : memref<10xf32>) device([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>) attributes {wait}
|
|
// CHECK: acc.update host([[ARGA]] : memref<10xf32>) device([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>) attributes {ifPresent}
|
|
|
|
// -----
|
|
|
|
%i64Value = arith.constant 1 : i64
|
|
%i32Value = arith.constant 1 : i32
|
|
%idxValue = arith.constant 1 : index
|
|
%ifCond = arith.constant true
|
|
acc.wait
|
|
acc.wait(%i64Value: i64)
|
|
acc.wait(%i32Value: i32)
|
|
acc.wait(%idxValue: index)
|
|
acc.wait(%i32Value, %idxValue : i32, index)
|
|
acc.wait async(%i64Value: i64)
|
|
acc.wait async(%i32Value: i32)
|
|
acc.wait async(%idxValue: index)
|
|
acc.wait(%i32Value: i32) async(%idxValue: index)
|
|
acc.wait(%i64Value: i64) wait_devnum(%i32Value: i32)
|
|
acc.wait attributes {async}
|
|
acc.wait(%i64Value: i64) async(%idxValue: index) wait_devnum(%i32Value: i32)
|
|
acc.wait if(%ifCond)
|
|
|
|
// CHECK: [[I64VALUE:%.*]] = arith.constant 1 : i64
|
|
// CHECK: [[I32VALUE:%.*]] = arith.constant 1 : i32
|
|
// CHECK: [[IDXVALUE:%.*]] = arith.constant 1 : index
|
|
// CHECK: [[IFCOND:%.*]] = arith.constant true
|
|
// CHECK: acc.wait
|
|
// CHECK: acc.wait([[I64VALUE]] : i64)
|
|
// CHECK: acc.wait([[I32VALUE]] : i32)
|
|
// CHECK: acc.wait([[IDXVALUE]] : index)
|
|
// CHECK: acc.wait([[I32VALUE]], [[IDXVALUE]] : i32, index)
|
|
// CHECK: acc.wait async([[I64VALUE]] : i64)
|
|
// CHECK: acc.wait async([[I32VALUE]] : i32)
|
|
// CHECK: acc.wait async([[IDXVALUE]] : index)
|
|
// CHECK: acc.wait([[I32VALUE]] : i32) async([[IDXVALUE]] : index)
|
|
// CHECK: acc.wait([[I64VALUE]] : i64) wait_devnum([[I32VALUE]] : i32)
|
|
// CHECK: acc.wait attributes {async}
|
|
// CHECK: acc.wait([[I64VALUE]] : i64) async([[IDXVALUE]] : index) wait_devnum([[I32VALUE]] : i32)
|
|
// CHECK: acc.wait if([[IFCOND]])
|
|
|
|
// -----
|
|
|
|
%i64Value = arith.constant 1 : i64
|
|
%i32Value = arith.constant 1 : i32
|
|
%i32Value2 = arith.constant 2 : i32
|
|
%idxValue = arith.constant 1 : index
|
|
%ifCond = arith.constant true
|
|
acc.init
|
|
acc.init device_type(%i32Value : i32)
|
|
acc.init device_type(%i32Value, %i32Value2 : i32, i32)
|
|
acc.init device_num(%i64Value : i64)
|
|
acc.init device_num(%i32Value : i32)
|
|
acc.init device_num(%idxValue : index)
|
|
acc.init if(%ifCond)
|
|
|
|
// CHECK: [[I64VALUE:%.*]] = arith.constant 1 : i64
|
|
// CHECK: [[I32VALUE:%.*]] = arith.constant 1 : i32
|
|
// CHECK: [[I32VALUE2:%.*]] = arith.constant 2 : i32
|
|
// CHECK: [[IDXVALUE:%.*]] = arith.constant 1 : index
|
|
// CHECK: [[IFCOND:%.*]] = arith.constant true
|
|
// CHECK: acc.init
|
|
// CHECK: acc.init device_type([[I32VALUE]] : i32)
|
|
// CHECK: acc.init device_type([[I32VALUE]], [[I32VALUE2]] : i32, i32)
|
|
// CHECK: acc.init device_num([[I64VALUE]] : i64)
|
|
// CHECK: acc.init device_num([[I32VALUE]] : i32)
|
|
// CHECK: acc.init device_num([[IDXVALUE]] : index)
|
|
// CHECK: acc.init if([[IFCOND]])
|
|
|
|
// -----
|
|
|
|
%i64Value = arith.constant 1 : i64
|
|
%i32Value = arith.constant 1 : i32
|
|
%i32Value2 = arith.constant 2 : i32
|
|
%idxValue = arith.constant 1 : index
|
|
%ifCond = arith.constant true
|
|
acc.shutdown
|
|
acc.shutdown device_type(%i32Value : i32)
|
|
acc.shutdown device_type(%i32Value, %i32Value2 : i32, i32)
|
|
acc.shutdown device_num(%i64Value : i64)
|
|
acc.shutdown device_num(%i32Value : i32)
|
|
acc.shutdown device_num(%idxValue : index)
|
|
acc.shutdown if(%ifCond)
|
|
|
|
// CHECK: [[I64VALUE:%.*]] = arith.constant 1 : i64
|
|
// CHECK: [[I32VALUE:%.*]] = arith.constant 1 : i32
|
|
// CHECK: [[I32VALUE2:%.*]] = arith.constant 2 : i32
|
|
// CHECK: [[IDXVALUE:%.*]] = arith.constant 1 : index
|
|
// CHECK: [[IFCOND:%.*]] = arith.constant true
|
|
// CHECK: acc.shutdown
|
|
// CHECK: acc.shutdown device_type([[I32VALUE]] : i32)
|
|
// CHECK: acc.shutdown device_type([[I32VALUE]], [[I32VALUE2]] : i32, i32)
|
|
// CHECK: acc.shutdown device_num([[I64VALUE]] : i64)
|
|
// CHECK: acc.shutdown device_num([[I32VALUE]] : i32)
|
|
// CHECK: acc.shutdown device_num([[IDXVALUE]] : index)
|
|
// CHECK: acc.shutdown if([[IFCOND]])
|
|
|
|
// -----
|
|
|
|
func.func @testexitdataop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>) -> () {
|
|
%ifCond = arith.constant true
|
|
%i64Value = arith.constant 1 : i64
|
|
%i32Value = arith.constant 1 : i32
|
|
%idxValue = arith.constant 1 : index
|
|
|
|
acc.exit_data copyout(%a : memref<10xf32>)
|
|
acc.exit_data delete(%a : memref<10xf32>)
|
|
acc.exit_data delete(%a : memref<10xf32>) attributes {async,finalize}
|
|
acc.exit_data detach(%a : memref<10xf32>)
|
|
acc.exit_data copyout(%a : memref<10xf32>) attributes {async}
|
|
acc.exit_data delete(%a : memref<10xf32>) attributes {wait}
|
|
acc.exit_data async(%i64Value : i64) copyout(%a : memref<10xf32>)
|
|
acc.exit_data if(%ifCond) copyout(%a : memref<10xf32>)
|
|
acc.exit_data wait_devnum(%i64Value: i64) wait(%i32Value, %idxValue : i32, index) copyout(%a : memref<10xf32>)
|
|
|
|
return
|
|
}
|
|
|
|
// CHECK: func @testexitdataop([[ARGA:%.*]]: memref<10xf32>, [[ARGB:%.*]]: memref<10xf32>, [[ARGC:%.*]]: memref<10x10xf32>) {
|
|
// CHECK: [[IFCOND1:%.*]] = arith.constant true
|
|
// CHECK: [[I64VALUE:%.*]] = arith.constant 1 : i64
|
|
// CHECK: [[I32VALUE:%.*]] = arith.constant 1 : i32
|
|
// CHECK: [[IDXVALUE:%.*]] = arith.constant 1 : index
|
|
// CHECK: acc.exit_data copyout([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.exit_data delete([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.exit_data delete([[ARGA]] : memref<10xf32>) attributes {async, finalize}
|
|
// CHECK: acc.exit_data detach([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.exit_data copyout([[ARGA]] : memref<10xf32>) attributes {async}
|
|
// CHECK: acc.exit_data delete([[ARGA]] : memref<10xf32>) attributes {wait}
|
|
// CHECK: acc.exit_data async([[I64VALUE]] : i64) copyout([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.exit_data if([[IFCOND]]) copyout([[ARGA]] : memref<10xf32>)
|
|
// CHECK: acc.exit_data wait_devnum([[I64VALUE]] : i64) wait([[I32VALUE]], [[IDXVALUE]] : i32, index) copyout([[ARGA]] : memref<10xf32>)
|
|
// -----
|
|
|
|
|
|
func.func @testenterdataop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>) -> () {
|
|
%ifCond = arith.constant true
|
|
%i64Value = arith.constant 1 : i64
|
|
%i32Value = arith.constant 1 : i32
|
|
%idxValue = arith.constant 1 : index
|
|
|
|
acc.enter_data copyin(%a : memref<10xf32>)
|
|
acc.enter_data create(%a : memref<10xf32>) create_zero(%b, %c : memref<10xf32>, memref<10x10xf32>)
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acc.enter_data attach(%a : memref<10xf32>)
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acc.enter_data copyin(%a : memref<10xf32>) attributes {async}
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acc.enter_data create(%a : memref<10xf32>) attributes {wait}
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acc.enter_data async(%i64Value : i64) copyin(%a : memref<10xf32>)
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acc.enter_data if(%ifCond) copyin(%a : memref<10xf32>)
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acc.enter_data wait_devnum(%i64Value: i64) wait(%i32Value, %idxValue : i32, index) copyin(%a : memref<10xf32>)
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return
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}
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// CHECK: func @testenterdataop([[ARGA:%.*]]: memref<10xf32>, [[ARGB:%.*]]: memref<10xf32>, [[ARGC:%.*]]: memref<10x10xf32>) {
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// CHECK: [[IFCOND1:%.*]] = arith.constant true
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// CHECK: [[I64VALUE:%.*]] = arith.constant 1 : i64
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// CHECK: [[I32VALUE:%.*]] = arith.constant 1 : i32
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// CHECK: [[IDXVALUE:%.*]] = arith.constant 1 : index
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// CHECK: acc.enter_data copyin([[ARGA]] : memref<10xf32>)
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// CHECK: acc.enter_data create([[ARGA]] : memref<10xf32>) create_zero([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>)
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// CHECK: acc.enter_data attach([[ARGA]] : memref<10xf32>)
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// CHECK: acc.enter_data copyin([[ARGA]] : memref<10xf32>) attributes {async}
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// CHECK: acc.enter_data create([[ARGA]] : memref<10xf32>) attributes {wait}
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// CHECK: acc.enter_data async([[I64VALUE]] : i64) copyin([[ARGA]] : memref<10xf32>)
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// CHECK: acc.enter_data if([[IFCOND]]) copyin([[ARGA]] : memref<10xf32>)
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// CHECK: acc.enter_data wait_devnum([[I64VALUE]] : i64) wait([[I32VALUE]], [[IDXVALUE]] : i32, index) copyin([[ARGA]] : memref<10xf32>)
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