Justin Holewinski 3e037d98e6 [NVPTX] Rename registers %fl -> %fd and %rl -> %rd ...

This matches the internal behavior of NVIDIA tools like libnvvm.

llvm-svn: 213168

2014-07-16 16:26:58 +00:00

..

AArch64

AArch64: fall back to generic code for out of range extract/insert.

2014-07-15 10:00:26 +00:00

ARM

[RegisterCoalescer] Add new subtarget hook allowing targets to opt-out of coalescing.

2014-07-15 17:18:41 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.

2014-06-05 19:29:43 +00:00

Hexagon

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

Inputs

Debug Info: update testing cases to specify the debug info version number.

2013-11-22 21:49:45 +00:00

Mips

[mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1.

2014-07-14 13:08:14 +00:00

MSP430

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

NVPTX

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

PowerPC

[PowerPC] Fix invalid displacement created by LocalStackAlloc

2014-07-11 17:19:31 +00:00

R600

R600/SI: Allow using f32 rcp / rsq when denormals not handled.

2014-07-15 23:50:10 +00:00

SPARC

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

SystemZ

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Thumb

ARM: Fix fastcc calling convention for Thumb1

2014-06-13 08:33:03 +00:00

Thumb2

ARM: Fix TPsoft for Thumb mode

2014-06-24 15:45:59 +00:00

X86

Convert test to CHECK-LABEL

2014-07-16 15:37:08 +00:00

XCore

llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.

2014-07-04 11:58:03 +00:00