David Green 070e129304

[AArch64][GlobalISel] Add disjoint handling for add_and_or_is_add. (#123594) ...

This allows us to easily detect, without known-bits, that the or in a
fshl/fshr is disjoint allowing us to use usra under aarch64.

2025-02-02 21:01:49 +00:00

..

AArch64

[AArch64][GlobalISel] Add disjoint handling for add_and_or_is_add. (#123594)

2025-02-02 21:01:49 +00:00

AMDGPU

[AArch64][GlobalISel] Add disjoint handling for add_and_or_is_add. (#123594)

2025-02-02 21:01:49 +00:00

ARC

[ARC,test] Change llc -march= to -mtriple=

2024-12-15 12:29:53 -08:00

ARM

[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)

2025-02-01 20:40:50 +03:00

AVR

[AVR] Force relocations for non-encodable jumps (#121498)

2025-01-20 09:23:57 +08:00

BPF

[IR] Convert from nocapture to captures(none) (#123181)

2025-01-29 16:56:47 +01:00

CSKY

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DirectX

[HLSL][SPIRV][DXIL] Implement WaveActiveMax intrinsic (#123428)

2025-01-27 23:26:56 -08:00

Generic

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Hexagon

[IR] Convert from nocapture to captures(none) (#123181)

2025-01-29 16:56:47 +01:00

Inputs

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Lanai

[test] Remove redundant -march= when target triple is specified in IR

2024-12-15 12:42:17 -08:00

LoongArch

[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables

2025-01-31 14:05:34 -08:00

M68k

[M68k] always use movem for register spills (#106715)

2025-01-31 19:42:40 -06:00

Mips

[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables

2025-01-31 14:05:34 -08:00

MIR

[Clang] Cleanup docs and comments relating to -fextend-variable-liveness (#124767)

2025-01-28 18:25:32 +00:00

MLRegAlloc

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MSP430

[M68k,MSP430,test] Change llc -march= to -mtriple=

2024-12-15 10:09:30 -08:00

NVPTX

[NVPTX] Fix ptxas failures (NFC) (#125147)

2025-02-01 16:44:37 -08:00

PowerPC

[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)

2025-02-01 20:40:50 +03:00

RISCV

[AArch64][GlobalISel] Add disjoint handling for add_and_or_is_add. (#123594)

2025-02-02 21:01:49 +00:00

SPARC

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)

2025-01-23 12:49:35 -08:00

SPIRV

[HLSL][SPIRV][DXIL] Implement WaveActiveMax intrinsic (#123428)

2025-01-27 23:26:56 -08:00

SystemZ

[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables

2025-01-31 14:05:34 -08:00

Thumb

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)

2025-01-23 12:49:35 -08:00

Thumb2

[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)

2025-02-01 20:40:50 +03:00

VE

[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables

2025-01-31 14:05:34 -08:00

WebAssembly

[WebAssembly] getMemoryOpCost and getCastInstrCost (#122896)

2025-01-31 10:33:31 +00:00

WinCFGuard

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WinEH

[WinEH] Take musttail calls into account when unlinking eh records (#119702)

2024-12-13 09:16:52 +01:00

X86

[llvm][aarch64] Add support for the MS qualifiers __ptr32, __ptr64, _sptr, __uptr (#112793)

2025-01-31 10:39:53 -08:00

XCore

[XCore,test] Change llc -march= to -mtriple=

2024-12-15 10:31:38 -08:00

Xtensa

[CodeGen] Clean up tests that depend on implicit .text in MCAsmStreamer

2024-12-22 21:11:32 -08:00