9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
126 lines
3.5 KiB
YAML
126 lines
3.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -o - -run-pass=block-placement -mcpu=gfx1010 -mattr=-inst-fwd-prefetch-bug -verify-machineinstrs %s | FileCheck -check-prefixes=GFX10 %s
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# RUN: llc -mtriple=amdgcn -o - -run-pass=block-placement -mcpu=gfx1100 -mattr=-inst-fwd-prefetch-bug -verify-machineinstrs %s | FileCheck -check-prefixes=GFX11 %s
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# Used to fail with
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# Assertion `Out && "Header of loop has no predecessors from outside loop?"
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---
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name: loop_header_nopred
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body: |
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; GFX10-LABEL: name: loop_header_nopred
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; GFX10: bb.0:
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; GFX10-NEXT: successors: %bb.2(0x80000000)
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: S_BRANCH %bb.2
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.1 (align 64):
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; GFX10-NEXT: successors: %bb.7(0x04000000), %bb.2(0x7c000000)
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: S_CBRANCH_VCCNZ %bb.7, implicit $vcc_lo
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.2:
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; GFX10-NEXT: successors: %bb.5(0x40000000), %bb.1(0x40000000)
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.5:
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; GFX10-NEXT: successors: %bb.1(0x04000000), %bb.5(0x7c000000)
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_NOP 0
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; GFX10-NEXT: S_CBRANCH_EXECZ %bb.5, implicit $exec
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; GFX10-NEXT: S_BRANCH %bb.1
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.7:
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; GFX10-NEXT: S_ENDPGM 0
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; GFX11-LABEL: name: loop_header_nopred
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; GFX11: bb.0:
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; GFX11-NEXT: successors: %bb.2(0x80000000)
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: S_BRANCH %bb.2
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: bb.1:
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; GFX11-NEXT: successors: %bb.7(0x04000000), %bb.2(0x7c000000)
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: S_CBRANCH_VCCNZ %bb.7, implicit $vcc_lo
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: bb.2:
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; GFX11-NEXT: successors: %bb.5(0x40000000), %bb.1(0x40000000)
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: bb.5:
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; GFX11-NEXT: successors: %bb.1(0x04000000), %bb.5(0x7c000000)
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_NOP 0
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; GFX11-NEXT: S_CBRANCH_EXECZ %bb.5, implicit $exec
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; GFX11-NEXT: S_BRANCH %bb.1
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: bb.7:
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; GFX11-NEXT: S_ENDPGM 0
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bb.0:
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successors: %bb.1(0x80000000)
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bb.1:
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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S_CBRANCH_VCCZ %bb.3, implicit $vcc
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S_BRANCH %bb.2
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bb.2:
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successors: %bb.3(0x80000000)
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bb.3:
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successors: %bb.4(0x40000000), %bb.6(0x40000000)
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S_CBRANCH_EXECZ %bb.6, implicit $exec
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S_BRANCH %bb.4
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bb.4:
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successors: %bb.5(0x04000000), %bb.4(0x7c000000)
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_CBRANCH_EXECZ %bb.4, implicit $exec
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bb.5:
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successors: %bb.6(0x80000000)
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bb.6:
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successors: %bb.7(0x04000000), %bb.1(0x7c000000)
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S_CBRANCH_VCCZ %bb.1, implicit $vcc
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bb.7:
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S_ENDPGM 0
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...
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