Craig Topper 07c8bcc21d [AArch64] Narrow G_SEXT_INREG to s64 before lowering. ...

This avoids narrowing after it has been expanded to shifts. The
G_SEXT_INREG narrowing can use the second operand of the instruction to
optimize the narrowing.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D157172

2023-08-07 14:34:21 -07:00

..

AArch64

[AArch64] Narrow G_SEXT_INREG to s64 before lowering.

2023-08-07 14:34:21 -07:00

AMDGPU

[MachineScheduler] Track physical register dependencies per-regunit

2023-08-07 15:41:40 +01:00

ARC

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ARM

[ARM] Improve generation of thumb stack accesses

2023-08-07 17:53:32 +01:00

AVR

[CodeGen] Add machine verification to some tests

2023-07-24 11:04:10 +01:00

BPF

[BPF] Don't crash on missing line info

2023-08-03 09:18:12 -04:00

CSKY

[CSKY][NFC] Fix broken tests in eac78fdf68f58e113b2cf18a14baccb8f5ebcf50

2023-08-04 22:01:44 +08:00

DirectX

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Generic

Reland "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)"

2023-06-16 00:49:59 +02:00

Hexagon

[AggressiveAntiDepBreaker] Tweak the fix for renaming a subregister of a live register

2023-08-07 15:41:40 +01:00

Inputs

[IR] Make stack protector symbol dso_local according to -f[no-]direct-access-external-data

2023-05-23 09:49:57 -07:00

Lanai

[InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold

2023-06-15 14:17:58 +02:00

LoongArch

Revert "Reland "[LoongArch] Support -march=native and -mtune=""

2023-07-31 16:57:06 -07:00

M68k

[CodeGen] Add machine verification to some tests

2023-07-24 11:04:10 +01:00

Mips

Reapply "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"

2023-07-31 20:15:45 -04:00

MIR

[AMDGPU] Change syncscopes.mir not to use undefined cpol bits. NFC.

2023-08-04 11:19:12 -07:00

MLRegalloc

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MSP430

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NVPTX

[NVPTX] Expand select_cc on bfloat16 type

2023-07-24 17:01:31 +02:00

PowerPC

[XCOFF] Do not put MergeableCStrings in their own section

2023-07-29 03:24:21 +00:00

RISCV

[RISCV] Add back handling of X > -1 to ISD::SETCC lowering.

2023-08-07 13:00:57 -07:00

SPARC

[DAG] More aggressively (extract_vector_elt (build_vector x, y), c) iff element is zero constant

2023-07-18 17:31:34 +01:00

SPIRV

[SPIRV] Add support for SPV_INTEL_optnone

2023-08-01 12:53:54 +02:00

SystemZ

[MachineScheduler] Track physical register dependencies per-regunit

2023-08-07 15:41:40 +01:00

Thumb

[ARM] Improve generation of thumb stack accesses

2023-08-07 17:53:32 +01:00

Thumb2

[MachineScheduler] Track physical register dependencies per-regunit

2023-08-07 15:41:40 +01:00

VE

[SelectionDAG] Improve expansion of wide min/max

2023-06-26 10:45:41 -07:00

WebAssembly

[PEI][WebAssembly] Switch to backwards frame index elimination

2023-08-03 10:21:43 +01:00

WinCFGuard

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WinEH

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X86

[X86] truncateVectorWithPACK - ensure we don't truncate to <1 x iXX> vector types

2023-08-07 14:11:42 +01:00

XCore

[XCore] Use backwards scavenging in frame index elimination

2023-05-18 09:58:53 +01:00