df856e4977
When doing estimation for vectorization of gathered loads, need to estimate the cost of the pointer (vectorization), as it is done for the actual vectorized loads. Otherwise may be too optimistic about the cost of the gathered loads. Reviewers: preames Reviewed By: preames Pull Request: https://github.com/llvm/llvm-project/pull/80867
782 lines
47 KiB
LLVM
782 lines
47 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
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; RUN: opt -S -mtriple riscv64-unknown-linux-gnu < %s --passes=slp-vectorizer -mattr=+v -slp-threshold=-80 | FileCheck %s
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define i32 @test(ptr %pix1, ptr %pix2, i64 %idx.ext, i64 %idx.ext63, ptr %add.ptr, ptr %add.ptr64) {
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; CHECK-LABEL: define i32 @test(
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; CHECK-SAME: ptr [[PIX1:%.*]], ptr [[PIX2:%.*]], i64 [[IDX_EXT:%.*]], i64 [[IDX_EXT63:%.*]], ptr [[ADD_PTR:%.*]], ptr [[ADD_PTR64:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x ptr> poison, ptr [[PIX1]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x ptr> [[TMP0]], <2 x ptr> poison, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, <2 x ptr> [[TMP1]], <2 x i64> <i64 4, i64 6>
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; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x ptr> poison, ptr [[PIX2]], i32 0
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; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x ptr> [[TMP3]], <2 x ptr> poison, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, <2 x ptr> [[TMP4]], <2 x i64> <i64 4, i64 6>
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; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, <2 x ptr> [[TMP4]], <2 x i64> <i64 1, i64 3>
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; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, <2 x ptr> [[TMP1]], <2 x i64> <i64 5, i64 7>
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; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, <2 x ptr> [[TMP4]], <2 x i64> <i64 5, i64 7>
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; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr i8, ptr [[PIX1]], i64 2
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; CHECK-NEXT: [[ARRAYIDX22:%.*]] = getelementptr i8, ptr [[PIX2]], i64 2
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; CHECK-NEXT: [[ADD_PTR3:%.*]] = getelementptr i8, ptr [[PIX1]], i64 [[IDX_EXT]]
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; CHECK-NEXT: [[TMP9:%.*]] = load i8, ptr [[ADD_PTR3]], align 1
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; CHECK-NEXT: [[CONV_1:%.*]] = zext i8 [[TMP9]] to i32
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; CHECK-NEXT: [[ARRAYIDX8_1:%.*]] = getelementptr i8, ptr [[ADD_PTR3]], i64 1
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; CHECK-NEXT: [[ARRAYIDX32_1:%.*]] = getelementptr i8, ptr [[ADD_PTR3]], i64 3
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; CHECK-NEXT: [[TMP10:%.*]] = load i8, ptr [[ARRAYIDX32_1]], align 1
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; CHECK-NEXT: [[CONV33_1:%.*]] = zext i8 [[TMP10]] to i32
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; CHECK-NEXT: [[ADD_PTR_1:%.*]] = getelementptr i8, ptr [[ADD_PTR]], i64 [[IDX_EXT]]
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; CHECK-NEXT: [[ADD_PTR64_1:%.*]] = getelementptr i8, ptr [[ADD_PTR64]], i64 [[IDX_EXT63]]
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; CHECK-NEXT: [[ARRAYIDX20_2:%.*]] = getelementptr i8, ptr [[ADD_PTR_1]], i64 2
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; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x ptr> poison, ptr [[ADD_PTR_1]], i32 0
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; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x ptr> [[TMP11]], ptr [[ARRAYIDX20_2]], i32 1
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; CHECK-NEXT: [[TMP13:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP12]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP14:%.*]] = zext <2 x i8> [[TMP13]] to <2 x i32>
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; CHECK-NEXT: [[ARRAYIDX22_2:%.*]] = getelementptr i8, ptr [[ADD_PTR64_1]], i64 2
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; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x ptr> poison, ptr [[ADD_PTR64_1]], i32 0
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; CHECK-NEXT: [[TMP16:%.*]] = insertelement <2 x ptr> [[TMP15]], ptr [[ARRAYIDX22_2]], i32 1
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; CHECK-NEXT: [[TMP17:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP16]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP18:%.*]] = zext <2 x i8> [[TMP17]] to <2 x i32>
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; CHECK-NEXT: [[TMP19:%.*]] = sub <2 x i32> [[TMP14]], [[TMP18]]
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; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <2 x ptr> [[TMP12]], <2 x ptr> poison, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP21:%.*]] = getelementptr i8, <2 x ptr> [[TMP20]], <2 x i64> <i64 4, i64 6>
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; CHECK-NEXT: [[TMP22:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP21]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP23:%.*]] = zext <2 x i8> [[TMP22]] to <2 x i32>
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; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <2 x ptr> [[TMP16]], <2 x ptr> poison, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, <2 x ptr> [[TMP24]], <2 x i64> <i64 4, i64 6>
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; CHECK-NEXT: [[TMP26:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP25]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP27:%.*]] = zext <2 x i8> [[TMP26]] to <2 x i32>
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; CHECK-NEXT: [[TMP28:%.*]] = sub <2 x i32> [[TMP23]], [[TMP27]]
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; CHECK-NEXT: [[TMP29:%.*]] = shl <2 x i32> [[TMP28]], <i32 16, i32 16>
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; CHECK-NEXT: [[TMP30:%.*]] = add <2 x i32> [[TMP29]], [[TMP19]]
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; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, <2 x ptr> [[TMP20]], <2 x i64> <i64 1, i64 3>
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; CHECK-NEXT: [[TMP32:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP31]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP33:%.*]] = zext <2 x i8> [[TMP32]] to <2 x i32>
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; CHECK-NEXT: [[TMP34:%.*]] = getelementptr i8, <2 x ptr> [[TMP24]], <2 x i64> <i64 1, i64 3>
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; CHECK-NEXT: [[TMP35:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP34]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP36:%.*]] = zext <2 x i8> [[TMP35]] to <2 x i32>
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; CHECK-NEXT: [[TMP37:%.*]] = sub <2 x i32> [[TMP33]], [[TMP36]]
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; CHECK-NEXT: [[TMP38:%.*]] = getelementptr i8, <2 x ptr> [[TMP20]], <2 x i64> <i64 5, i64 7>
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; CHECK-NEXT: [[TMP39:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP38]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP40:%.*]] = zext <2 x i8> [[TMP39]] to <2 x i32>
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; CHECK-NEXT: [[TMP41:%.*]] = getelementptr i8, <2 x ptr> [[TMP24]], <2 x i64> <i64 5, i64 7>
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; CHECK-NEXT: [[TMP42:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP41]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP43:%.*]] = zext <2 x i8> [[TMP42]] to <2 x i32>
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; CHECK-NEXT: [[TMP44:%.*]] = sub <2 x i32> [[TMP40]], [[TMP43]]
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; CHECK-NEXT: [[TMP45:%.*]] = shl <2 x i32> [[TMP44]], <i32 16, i32 16>
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; CHECK-NEXT: [[TMP46:%.*]] = add <2 x i32> [[TMP45]], [[TMP37]]
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; CHECK-NEXT: [[TMP47:%.*]] = sub <2 x i32> [[TMP30]], [[TMP46]]
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; CHECK-NEXT: [[TMP48:%.*]] = extractelement <2 x i32> [[TMP47]], i32 0
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; CHECK-NEXT: [[TMP49:%.*]] = extractelement <2 x i32> [[TMP47]], i32 1
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; CHECK-NEXT: [[SUB59_2:%.*]] = sub i32 [[TMP48]], [[TMP49]]
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; CHECK-NEXT: [[ARRAYIDX3_3:%.*]] = getelementptr i8, ptr null, i64 4
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; CHECK-NEXT: [[TMP50:%.*]] = load i8, ptr null, align 1
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; CHECK-NEXT: [[ARRAYIDX20_3:%.*]] = getelementptr i8, ptr null, i64 2
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; CHECK-NEXT: [[ARRAYIDX22_3:%.*]] = getelementptr i8, ptr null, i64 2
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; CHECK-NEXT: [[TMP51:%.*]] = load i8, ptr null, align 1
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; CHECK-NEXT: [[TMP52:%.*]] = insertelement <2 x ptr> <ptr null, ptr poison>, ptr [[ARRAYIDX20_3]], i32 1
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; CHECK-NEXT: [[TMP53:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP52]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP54:%.*]] = zext <2 x i8> [[TMP53]] to <2 x i32>
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; CHECK-NEXT: [[TMP55:%.*]] = insertelement <2 x ptr> <ptr null, ptr poison>, ptr [[ARRAYIDX22_3]], i32 1
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; CHECK-NEXT: [[TMP56:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP55]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP57:%.*]] = zext <2 x i8> [[TMP56]] to <2 x i32>
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; CHECK-NEXT: [[TMP58:%.*]] = sub <2 x i32> [[TMP54]], [[TMP57]]
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; CHECK-NEXT: [[TMP59:%.*]] = insertelement <2 x ptr> <ptr poison, ptr null>, ptr [[ARRAYIDX3_3]], i32 0
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; CHECK-NEXT: [[TMP60:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP59]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP61:%.*]] = zext <2 x i8> [[TMP60]] to <2 x i32>
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; CHECK-NEXT: [[TMP62:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> getelementptr (i8, <2 x ptr> zeroinitializer, <2 x i64> <i64 4, i64 6>), i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP63:%.*]] = zext <2 x i8> [[TMP62]] to <2 x i32>
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; CHECK-NEXT: [[TMP64:%.*]] = sub <2 x i32> [[TMP61]], [[TMP63]]
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; CHECK-NEXT: [[TMP65:%.*]] = shl <2 x i32> [[TMP64]], <i32 16, i32 16>
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; CHECK-NEXT: [[TMP66:%.*]] = add <2 x i32> [[TMP65]], [[TMP58]]
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; CHECK-NEXT: [[TMP67:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> getelementptr (i8, <2 x ptr> zeroinitializer, <2 x i64> <i64 1, i64 3>), i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP68:%.*]] = zext <2 x i8> [[TMP67]] to <2 x i32>
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; CHECK-NEXT: [[TMP69:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> getelementptr (i8, <2 x ptr> zeroinitializer, <2 x i64> <i64 1, i64 3>), i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP70:%.*]] = zext <2 x i8> [[TMP69]] to <2 x i32>
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; CHECK-NEXT: [[TMP71:%.*]] = sub <2 x i32> [[TMP68]], [[TMP70]]
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; CHECK-NEXT: [[TMP72:%.*]] = insertelement <2 x i8> poison, i8 [[TMP50]], i32 0
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; CHECK-NEXT: [[TMP73:%.*]] = insertelement <2 x i8> [[TMP72]], i8 [[TMP51]], i32 1
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; CHECK-NEXT: [[TMP74:%.*]] = zext <2 x i8> [[TMP73]] to <2 x i32>
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; CHECK-NEXT: [[TMP75:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> getelementptr (i8, <2 x ptr> zeroinitializer, <2 x i64> <i64 5, i64 7>), i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP76:%.*]] = zext <2 x i8> [[TMP75]] to <2 x i32>
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; CHECK-NEXT: [[TMP77:%.*]] = sub <2 x i32> [[TMP74]], [[TMP76]]
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; CHECK-NEXT: [[TMP78:%.*]] = shl <2 x i32> [[TMP77]], <i32 16, i32 16>
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; CHECK-NEXT: [[TMP79:%.*]] = add <2 x i32> [[TMP78]], [[TMP71]]
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; CHECK-NEXT: [[TMP80:%.*]] = sub <2 x i32> [[TMP66]], [[TMP79]]
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; CHECK-NEXT: [[TMP81:%.*]] = shufflevector <2 x i32> [[TMP79]], <2 x i32> [[TMP46]], <2 x i32> <i32 0, i32 2>
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; CHECK-NEXT: [[TMP82:%.*]] = shufflevector <2 x i32> [[TMP66]], <2 x i32> [[TMP30]], <2 x i32> <i32 0, i32 2>
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; CHECK-NEXT: [[TMP83:%.*]] = add <2 x i32> [[TMP81]], [[TMP82]]
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; CHECK-NEXT: [[TMP84:%.*]] = shufflevector <2 x i32> [[TMP79]], <2 x i32> [[TMP46]], <2 x i32> <i32 1, i32 3>
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; CHECK-NEXT: [[TMP85:%.*]] = shufflevector <2 x i32> [[TMP66]], <2 x i32> [[TMP30]], <2 x i32> <i32 1, i32 3>
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; CHECK-NEXT: [[TMP86:%.*]] = add <2 x i32> [[TMP84]], [[TMP85]]
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; CHECK-NEXT: [[TMP87:%.*]] = add <2 x i32> [[TMP86]], [[TMP83]]
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; CHECK-NEXT: [[TMP88:%.*]] = sub <2 x i32> [[TMP83]], [[TMP86]]
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; CHECK-NEXT: [[TMP89:%.*]] = extractelement <2 x i32> [[TMP80]], i32 0
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; CHECK-NEXT: [[TMP90:%.*]] = extractelement <2 x i32> [[TMP80]], i32 1
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; CHECK-NEXT: [[SUB59_3:%.*]] = sub i32 [[TMP89]], [[TMP90]]
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; CHECK-NEXT: [[TMP91:%.*]] = extractelement <2 x i32> [[TMP87]], i32 0
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; CHECK-NEXT: [[TMP92:%.*]] = extractelement <2 x i32> [[TMP87]], i32 1
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; CHECK-NEXT: [[ADD94:%.*]] = add i32 [[TMP91]], [[TMP92]]
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; CHECK-NEXT: [[SUB102:%.*]] = sub i32 [[TMP92]], [[TMP91]]
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; CHECK-NEXT: [[TMP93:%.*]] = extractelement <2 x i32> [[TMP54]], i32 0
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; CHECK-NEXT: [[SHR_I:%.*]] = lshr i32 [[TMP93]], 15
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; CHECK-NEXT: [[AND_I:%.*]] = and i32 [[SHR_I]], 65537
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; CHECK-NEXT: [[MUL_I:%.*]] = mul i32 [[AND_I]], 65535
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; CHECK-NEXT: [[TMP94:%.*]] = extractelement <2 x i32> [[TMP86]], i32 1
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; CHECK-NEXT: [[SHR_I49:%.*]] = lshr i32 [[TMP94]], 15
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; CHECK-NEXT: [[AND_I50:%.*]] = and i32 [[SHR_I49]], 65537
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; CHECK-NEXT: [[MUL_I51:%.*]] = mul i32 [[AND_I50]], 65535
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; CHECK-NEXT: [[TMP95:%.*]] = extractelement <2 x i32> [[TMP88]], i32 0
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; CHECK-NEXT: [[TMP96:%.*]] = extractelement <2 x i32> [[TMP88]], i32 1
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; CHECK-NEXT: [[ADD94_2:%.*]] = add i32 [[TMP95]], [[TMP96]]
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; CHECK-NEXT: [[TMP97:%.*]] = load <2 x i8>, ptr [[ARRAYIDX20]], align 1
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; CHECK-NEXT: [[TMP98:%.*]] = zext <2 x i8> [[TMP97]] to <2 x i32>
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; CHECK-NEXT: [[TMP99:%.*]] = insertelement <2 x i32> poison, i32 [[SUB59_2]], i32 0
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; CHECK-NEXT: [[TMP100:%.*]] = shufflevector <2 x i32> [[TMP99]], <2 x i32> poison, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP101:%.*]] = insertelement <2 x i32> poison, i32 [[SUB59_3]], i32 0
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; CHECK-NEXT: [[TMP102:%.*]] = shufflevector <2 x i32> [[TMP101]], <2 x i32> poison, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP103:%.*]] = add <2 x i32> [[TMP100]], [[TMP102]]
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; CHECK-NEXT: [[TMP104:%.*]] = sub <2 x i32> [[TMP100]], [[TMP102]]
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; CHECK-NEXT: [[TMP105:%.*]] = shufflevector <2 x i32> [[TMP103]], <2 x i32> [[TMP104]], <2 x i32> <i32 0, i32 3>
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; CHECK-NEXT: [[TMP106:%.*]] = load <2 x i8>, ptr [[PIX1]], align 1
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; CHECK-NEXT: [[TMP107:%.*]] = zext <2 x i8> [[TMP106]] to <2 x i32>
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; CHECK-NEXT: [[TMP108:%.*]] = shufflevector <2 x i32> [[TMP107]], <2 x i32> poison, <2 x i32> <i32 1, i32 0>
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; CHECK-NEXT: [[TMP109:%.*]] = insertelement <2 x ptr> [[TMP4]], ptr [[ARRAYIDX22]], i32 1
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; CHECK-NEXT: [[TMP110:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP109]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP111:%.*]] = zext <2 x i8> [[TMP110]] to <2 x i32>
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; CHECK-NEXT: [[TMP112:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP2]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP113:%.*]] = zext <2 x i8> [[TMP112]] to <2 x i32>
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; CHECK-NEXT: [[TMP114:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP5]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP115:%.*]] = zext <2 x i8> [[TMP114]] to <2 x i32>
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; CHECK-NEXT: [[TMP116:%.*]] = sub <2 x i32> [[TMP113]], [[TMP115]]
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; CHECK-NEXT: [[TMP117:%.*]] = shl <2 x i32> [[TMP116]], <i32 16, i32 16>
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; CHECK-NEXT: [[TMP118:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP6]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP119:%.*]] = zext <2 x i8> [[TMP118]] to <2 x i32>
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; CHECK-NEXT: [[TMP120:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP7]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP121:%.*]] = zext <2 x i8> [[TMP120]] to <2 x i32>
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; CHECK-NEXT: [[TMP122:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP8]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
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; CHECK-NEXT: [[TMP123:%.*]] = zext <2 x i8> [[TMP122]] to <2 x i32>
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; CHECK-NEXT: [[TMP124:%.*]] = sub <2 x i32> [[TMP121]], [[TMP123]]
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; CHECK-NEXT: [[TMP125:%.*]] = shl <2 x i32> [[TMP124]], <i32 16, i32 16>
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; CHECK-NEXT: [[TMP126:%.*]] = shufflevector <2 x i32> [[TMP107]], <2 x i32> [[TMP98]], <2 x i32> <i32 0, i32 2>
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; CHECK-NEXT: [[TMP127:%.*]] = sub <2 x i32> [[TMP126]], [[TMP111]]
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; CHECK-NEXT: [[TMP128:%.*]] = add <2 x i32> [[TMP117]], [[TMP127]]
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; CHECK-NEXT: [[TMP129:%.*]] = shufflevector <2 x i32> [[TMP108]], <2 x i32> [[TMP98]], <2 x i32> <i32 0, i32 3>
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; CHECK-NEXT: [[TMP130:%.*]] = sub <2 x i32> [[TMP129]], [[TMP119]]
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; CHECK-NEXT: [[TMP131:%.*]] = add <2 x i32> [[TMP125]], [[TMP130]]
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; CHECK-NEXT: [[TMP132:%.*]] = extractelement <2 x i32> [[TMP128]], i32 1
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; CHECK-NEXT: [[TMP133:%.*]] = extractelement <2 x i32> [[TMP131]], i32 1
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; CHECK-NEXT: [[ADD46:%.*]] = add i32 [[TMP133]], [[TMP132]]
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; CHECK-NEXT: [[TMP134:%.*]] = sub <2 x i32> [[TMP128]], [[TMP131]]
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; CHECK-NEXT: [[TMP135:%.*]] = extractelement <2 x i32> [[TMP128]], i32 0
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; CHECK-NEXT: [[TMP136:%.*]] = extractelement <2 x i32> [[TMP131]], i32 0
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; CHECK-NEXT: [[ADD44:%.*]] = add i32 [[TMP136]], [[TMP135]]
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; CHECK-NEXT: [[TMP137:%.*]] = lshr <2 x i32> [[TMP108]], <i32 15, i32 15>
|
|
; CHECK-NEXT: [[TMP138:%.*]] = and <2 x i32> [[TMP137]], <i32 65537, i32 65537>
|
|
; CHECK-NEXT: [[TMP139:%.*]] = mul <2 x i32> [[TMP138]], <i32 65535, i32 65535>
|
|
; CHECK-NEXT: [[TMP140:%.*]] = extractelement <2 x i32> [[TMP134]], i32 0
|
|
; CHECK-NEXT: [[TMP141:%.*]] = extractelement <2 x i32> [[TMP134]], i32 1
|
|
; CHECK-NEXT: [[SUB59:%.*]] = sub i32 [[TMP140]], [[TMP141]]
|
|
; CHECK-NEXT: [[TMP142:%.*]] = load <2 x i8>, ptr [[ARRAYIDX8_1]], align 1
|
|
; CHECK-NEXT: [[TMP143:%.*]] = zext <2 x i8> [[TMP142]] to <2 x i32>
|
|
; CHECK-NEXT: [[ADD_PTR644:%.*]] = getelementptr i8, ptr [[PIX2]], i64 [[IDX_EXT63]]
|
|
; CHECK-NEXT: [[ARRAYIDX22_1:%.*]] = getelementptr i8, ptr [[ADD_PTR644]], i64 2
|
|
; CHECK-NEXT: [[TMP144:%.*]] = insertelement <2 x ptr> poison, ptr [[ADD_PTR644]], i32 0
|
|
; CHECK-NEXT: [[TMP145:%.*]] = insertelement <2 x ptr> [[TMP144]], ptr [[ARRAYIDX22_1]], i32 1
|
|
; CHECK-NEXT: [[TMP146:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP145]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
|
|
; CHECK-NEXT: [[TMP147:%.*]] = zext <2 x i8> [[TMP146]] to <2 x i32>
|
|
; CHECK-NEXT: [[TMP148:%.*]] = insertelement <2 x ptr> poison, ptr [[ADD_PTR3]], i32 0
|
|
; CHECK-NEXT: [[TMP149:%.*]] = shufflevector <2 x ptr> [[TMP148]], <2 x ptr> poison, <2 x i32> zeroinitializer
|
|
; CHECK-NEXT: [[TMP150:%.*]] = getelementptr i8, <2 x ptr> [[TMP149]], <2 x i64> <i64 4, i64 6>
|
|
; CHECK-NEXT: [[TMP151:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP150]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
|
|
; CHECK-NEXT: [[TMP152:%.*]] = zext <2 x i8> [[TMP151]] to <2 x i32>
|
|
; CHECK-NEXT: [[TMP153:%.*]] = shufflevector <2 x ptr> [[TMP145]], <2 x ptr> poison, <2 x i32> zeroinitializer
|
|
; CHECK-NEXT: [[TMP154:%.*]] = getelementptr i8, <2 x ptr> [[TMP153]], <2 x i64> <i64 4, i64 6>
|
|
; CHECK-NEXT: [[TMP155:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP154]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
|
|
; CHECK-NEXT: [[TMP156:%.*]] = zext <2 x i8> [[TMP155]] to <2 x i32>
|
|
; CHECK-NEXT: [[TMP157:%.*]] = sub <2 x i32> [[TMP152]], [[TMP156]]
|
|
; CHECK-NEXT: [[TMP158:%.*]] = shl <2 x i32> [[TMP157]], <i32 16, i32 16>
|
|
; CHECK-NEXT: [[TMP159:%.*]] = getelementptr i8, <2 x ptr> [[TMP153]], <2 x i64> <i64 1, i64 3>
|
|
; CHECK-NEXT: [[TMP160:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP159]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
|
|
; CHECK-NEXT: [[TMP161:%.*]] = zext <2 x i8> [[TMP160]] to <2 x i32>
|
|
; CHECK-NEXT: [[TMP162:%.*]] = getelementptr i8, <2 x ptr> [[TMP149]], <2 x i64> <i64 5, i64 7>
|
|
; CHECK-NEXT: [[TMP163:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP162]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
|
|
; CHECK-NEXT: [[TMP164:%.*]] = zext <2 x i8> [[TMP163]] to <2 x i32>
|
|
; CHECK-NEXT: [[TMP165:%.*]] = getelementptr i8, <2 x ptr> [[TMP153]], <2 x i64> <i64 5, i64 7>
|
|
; CHECK-NEXT: [[TMP166:%.*]] = call <2 x i8> @llvm.masked.gather.v2i8.v2p0(<2 x ptr> [[TMP165]], i32 1, <2 x i1> <i1 true, i1 true>, <2 x i8> poison)
|
|
; CHECK-NEXT: [[TMP167:%.*]] = zext <2 x i8> [[TMP166]] to <2 x i32>
|
|
; CHECK-NEXT: [[TMP168:%.*]] = sub <2 x i32> [[TMP164]], [[TMP167]]
|
|
; CHECK-NEXT: [[TMP169:%.*]] = shl <2 x i32> [[TMP168]], <i32 16, i32 16>
|
|
; CHECK-NEXT: [[TMP170:%.*]] = insertelement <2 x i32> [[TMP143]], i32 [[CONV33_1]], i32 1
|
|
; CHECK-NEXT: [[TMP171:%.*]] = sub <2 x i32> [[TMP170]], [[TMP161]]
|
|
; CHECK-NEXT: [[TMP172:%.*]] = add <2 x i32> [[TMP169]], [[TMP171]]
|
|
; CHECK-NEXT: [[TMP173:%.*]] = insertelement <2 x i32> [[TMP143]], i32 [[CONV_1]], i32 0
|
|
; CHECK-NEXT: [[TMP174:%.*]] = sub <2 x i32> [[TMP173]], [[TMP147]]
|
|
; CHECK-NEXT: [[TMP175:%.*]] = add <2 x i32> [[TMP158]], [[TMP174]]
|
|
; CHECK-NEXT: [[TMP176:%.*]] = add <2 x i32> [[TMP172]], [[TMP175]]
|
|
; CHECK-NEXT: [[TMP177:%.*]] = sub <2 x i32> [[TMP175]], [[TMP172]]
|
|
; CHECK-NEXT: [[TMP178:%.*]] = extractelement <2 x i32> [[TMP176]], i32 0
|
|
; CHECK-NEXT: [[TMP179:%.*]] = extractelement <2 x i32> [[TMP176]], i32 1
|
|
; CHECK-NEXT: [[SUB51_1:%.*]] = sub i32 [[TMP178]], [[TMP179]]
|
|
; CHECK-NEXT: [[TMP180:%.*]] = shufflevector <2 x i32> [[TMP177]], <2 x i32> [[TMP134]], <2 x i32> <i32 1, i32 3>
|
|
; CHECK-NEXT: [[TMP181:%.*]] = shufflevector <2 x i32> [[TMP177]], <2 x i32> [[TMP134]], <2 x i32> <i32 0, i32 2>
|
|
; CHECK-NEXT: [[TMP182:%.*]] = add <2 x i32> [[TMP180]], [[TMP181]]
|
|
; CHECK-NEXT: [[TMP183:%.*]] = extractelement <2 x i32> [[TMP177]], i32 0
|
|
; CHECK-NEXT: [[TMP184:%.*]] = extractelement <2 x i32> [[TMP177]], i32 1
|
|
; CHECK-NEXT: [[SUB59_1:%.*]] = sub i32 [[TMP183]], [[TMP184]]
|
|
; CHECK-NEXT: [[SHR_I54:%.*]] = lshr i32 [[TMP179]], 15
|
|
; CHECK-NEXT: [[AND_I55:%.*]] = and i32 [[SHR_I54]], 65537
|
|
; CHECK-NEXT: [[MUL_I56:%.*]] = mul i32 [[AND_I55]], 65535
|
|
; CHECK-NEXT: [[TMP185:%.*]] = lshr <2 x i32> [[TMP143]], <i32 15, i32 15>
|
|
; CHECK-NEXT: [[TMP186:%.*]] = and <2 x i32> [[TMP185]], <i32 65537, i32 65537>
|
|
; CHECK-NEXT: [[TMP187:%.*]] = mul <2 x i32> [[TMP186]], <i32 65535, i32 65535>
|
|
; CHECK-NEXT: [[TMP188:%.*]] = insertelement <2 x i32> poison, i32 [[SUB59_1]], i32 0
|
|
; CHECK-NEXT: [[TMP189:%.*]] = shufflevector <2 x i32> [[TMP188]], <2 x i32> poison, <2 x i32> zeroinitializer
|
|
; CHECK-NEXT: [[TMP190:%.*]] = extractelement <2 x i32> [[TMP182]], i32 0
|
|
; CHECK-NEXT: [[TMP191:%.*]] = extractelement <2 x i32> [[TMP182]], i32 1
|
|
; CHECK-NEXT: [[ADD78_1:%.*]] = add i32 [[TMP190]], [[TMP191]]
|
|
; CHECK-NEXT: [[TMP192:%.*]] = shufflevector <2 x i32> [[TMP33]], <2 x i32> [[TMP177]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP193:%.*]] = lshr <2 x i32> [[TMP192]], <i32 15, i32 15>
|
|
; CHECK-NEXT: [[TMP194:%.*]] = and <2 x i32> [[TMP193]], <i32 65537, i32 65537>
|
|
; CHECK-NEXT: [[TMP195:%.*]] = mul <2 x i32> [[TMP194]], <i32 65535, i32 65535>
|
|
; CHECK-NEXT: [[TMP196:%.*]] = insertelement <2 x i32> poison, i32 [[ADD78_1]], i32 0
|
|
; CHECK-NEXT: [[TMP197:%.*]] = shufflevector <2 x i32> [[TMP196]], <2 x i32> poison, <2 x i32> zeroinitializer
|
|
; CHECK-NEXT: [[TMP198:%.*]] = insertelement <2 x i32> poison, i32 [[ADD94_2]], i32 0
|
|
; CHECK-NEXT: [[TMP199:%.*]] = shufflevector <2 x i32> [[TMP198]], <2 x i32> poison, <2 x i32> zeroinitializer
|
|
; CHECK-NEXT: [[TMP200:%.*]] = insertelement <2 x i32> poison, i32 [[ADD44]], i32 0
|
|
; CHECK-NEXT: [[TMP201:%.*]] = shufflevector <2 x i32> [[TMP200]], <2 x i32> poison, <2 x i32> zeroinitializer
|
|
; CHECK-NEXT: [[TMP202:%.*]] = insertelement <2 x i32> <i32 15, i32 poison>, i32 [[ADD46]], i32 1
|
|
; CHECK-NEXT: [[TMP203:%.*]] = lshr <2 x i32> [[TMP201]], [[TMP202]]
|
|
; CHECK-NEXT: [[TMP204:%.*]] = sub <2 x i32> [[TMP201]], [[TMP202]]
|
|
; CHECK-NEXT: [[TMP205:%.*]] = shufflevector <2 x i32> [[TMP203]], <2 x i32> [[TMP204]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP206:%.*]] = extractelement <2 x i32> [[TMP205]], i32 1
|
|
; CHECK-NEXT: [[ADD78_2:%.*]] = add i32 [[SUB51_1]], [[TMP206]]
|
|
; CHECK-NEXT: [[TMP207:%.*]] = insertelement <2 x i32> <i32 65537, i32 poison>, i32 [[SUB51_1]], i32 1
|
|
; CHECK-NEXT: [[TMP208:%.*]] = and <2 x i32> [[TMP205]], [[TMP207]]
|
|
; CHECK-NEXT: [[TMP209:%.*]] = sub <2 x i32> [[TMP205]], [[TMP207]]
|
|
; CHECK-NEXT: [[TMP210:%.*]] = shufflevector <2 x i32> [[TMP208]], <2 x i32> [[TMP209]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP211:%.*]] = insertelement <2 x i32> poison, i32 [[ADD78_2]], i32 0
|
|
; CHECK-NEXT: [[TMP212:%.*]] = shufflevector <2 x i32> [[TMP211]], <2 x i32> poison, <2 x i32> zeroinitializer
|
|
; CHECK-NEXT: [[TMP213:%.*]] = add <2 x i32> [[TMP212]], [[TMP199]]
|
|
; CHECK-NEXT: [[TMP214:%.*]] = sub <2 x i32> [[TMP212]], [[TMP199]]
|
|
; CHECK-NEXT: [[TMP215:%.*]] = shufflevector <2 x i32> [[TMP213]], <2 x i32> [[TMP214]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP216:%.*]] = insertelement <2 x i32> [[TMP134]], i32 [[CONV_1]], i32 0
|
|
; CHECK-NEXT: [[TMP217:%.*]] = lshr <2 x i32> [[TMP216]], <i32 15, i32 15>
|
|
; CHECK-NEXT: [[TMP218:%.*]] = and <2 x i32> [[TMP217]], <i32 65537, i32 65537>
|
|
; CHECK-NEXT: [[TMP219:%.*]] = mul <2 x i32> [[TMP218]], <i32 65535, i32 65535>
|
|
; CHECK-NEXT: [[TMP220:%.*]] = shufflevector <2 x i32> [[TMP88]], <2 x i32> poison, <2 x i32> <i32 1, i32 poison>
|
|
; CHECK-NEXT: [[TMP221:%.*]] = shufflevector <2 x i32> [[TMP220]], <2 x i32> [[TMP182]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP222:%.*]] = shufflevector <2 x i32> [[TMP88]], <2 x i32> [[TMP182]], <2 x i32> <i32 0, i32 2>
|
|
; CHECK-NEXT: [[TMP223:%.*]] = sub <2 x i32> [[TMP221]], [[TMP222]]
|
|
; CHECK-NEXT: [[TMP224:%.*]] = shufflevector <2 x i32> [[TMP47]], <2 x i32> poison, <2 x i32> <i32 1, i32 poison>
|
|
; CHECK-NEXT: [[TMP225:%.*]] = insertelement <2 x i32> [[TMP224]], i32 [[ADD46]], i32 1
|
|
; CHECK-NEXT: [[TMP226:%.*]] = insertelement <2 x i32> [[TMP47]], i32 [[ADD44]], i32 1
|
|
; CHECK-NEXT: [[TMP227:%.*]] = add <2 x i32> [[TMP225]], [[TMP226]]
|
|
; CHECK-NEXT: [[TMP228:%.*]] = shufflevector <2 x i32> [[TMP80]], <2 x i32> [[TMP176]], <2 x i32> <i32 1, i32 3>
|
|
; CHECK-NEXT: [[TMP229:%.*]] = shufflevector <2 x i32> [[TMP80]], <2 x i32> [[TMP176]], <2 x i32> <i32 0, i32 2>
|
|
; CHECK-NEXT: [[TMP230:%.*]] = add <2 x i32> [[TMP228]], [[TMP229]]
|
|
; CHECK-NEXT: [[TMP231:%.*]] = extractelement <2 x i32> [[TMP227]], i32 0
|
|
; CHECK-NEXT: [[TMP232:%.*]] = extractelement <2 x i32> [[TMP230]], i32 0
|
|
; CHECK-NEXT: [[ADD94_1:%.*]] = add i32 [[TMP232]], [[TMP231]]
|
|
; CHECK-NEXT: [[TMP233:%.*]] = insertelement <2 x i32> [[TMP14]], i32 [[ADD46]], i32 1
|
|
; CHECK-NEXT: [[TMP234:%.*]] = lshr <2 x i32> [[TMP233]], <i32 15, i32 15>
|
|
; CHECK-NEXT: [[TMP235:%.*]] = and <2 x i32> [[TMP234]], <i32 65537, i32 65537>
|
|
; CHECK-NEXT: [[TMP236:%.*]] = mul <2 x i32> [[TMP235]], <i32 65535, i32 65535>
|
|
; CHECK-NEXT: [[TMP237:%.*]] = extractelement <2 x i32> [[TMP227]], i32 1
|
|
; CHECK-NEXT: [[TMP238:%.*]] = extractelement <2 x i32> [[TMP230]], i32 1
|
|
; CHECK-NEXT: [[ADD78:%.*]] = add i32 [[TMP238]], [[TMP237]]
|
|
; CHECK-NEXT: [[TMP239:%.*]] = sub <2 x i32> [[TMP227]], [[TMP230]]
|
|
; CHECK-NEXT: [[ADD103:%.*]] = add i32 [[ADD94]], [[ADD78]]
|
|
; CHECK-NEXT: [[SUB104:%.*]] = sub i32 [[ADD78]], [[ADD94]]
|
|
; CHECK-NEXT: [[TMP240:%.*]] = extractelement <2 x i32> [[TMP239]], i32 1
|
|
; CHECK-NEXT: [[ADD105:%.*]] = add i32 [[SUB102]], [[TMP240]]
|
|
; CHECK-NEXT: [[ADD_I:%.*]] = add i32 [[MUL_I]], [[ADD103]]
|
|
; CHECK-NEXT: [[XOR_I:%.*]] = xor i32 [[ADD_I]], [[TMP93]]
|
|
; CHECK-NEXT: [[ADD_I52:%.*]] = add i32 [[MUL_I51]], [[ADD105]]
|
|
; CHECK-NEXT: [[XOR_I53:%.*]] = xor i32 [[ADD_I52]], [[TMP94]]
|
|
; CHECK-NEXT: [[ADD_I57:%.*]] = add i32 [[MUL_I56]], [[SUB104]]
|
|
; CHECK-NEXT: [[XOR_I58:%.*]] = xor i32 [[ADD_I57]], [[TMP179]]
|
|
; CHECK-NEXT: [[ADD110:%.*]] = add i32 [[XOR_I53]], [[XOR_I]]
|
|
; CHECK-NEXT: [[ADD112:%.*]] = add i32 [[ADD110]], [[XOR_I58]]
|
|
; CHECK-NEXT: [[TMP241:%.*]] = shufflevector <2 x i32> [[TMP223]], <2 x i32> poison, <2 x i32> <i32 1, i32 poison>
|
|
; CHECK-NEXT: [[TMP242:%.*]] = insertelement <2 x i32> [[TMP241]], i32 [[SUB102]], i32 1
|
|
; CHECK-NEXT: [[TMP243:%.*]] = add <2 x i32> [[TMP239]], [[TMP242]]
|
|
; CHECK-NEXT: [[TMP244:%.*]] = sub <2 x i32> [[TMP239]], [[TMP242]]
|
|
; CHECK-NEXT: [[TMP245:%.*]] = shufflevector <2 x i32> [[TMP243]], <2 x i32> [[TMP244]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP246:%.*]] = add <2 x i32> [[TMP236]], [[TMP245]]
|
|
; CHECK-NEXT: [[TMP247:%.*]] = xor <2 x i32> [[TMP246]], [[TMP233]]
|
|
; CHECK-NEXT: [[TMP248:%.*]] = extractelement <2 x i32> [[TMP247]], i32 1
|
|
; CHECK-NEXT: [[ADD113:%.*]] = add i32 [[ADD112]], [[TMP248]]
|
|
; CHECK-NEXT: [[TMP249:%.*]] = insertelement <2 x i32> poison, i32 [[ADD94_1]], i32 0
|
|
; CHECK-NEXT: [[TMP250:%.*]] = shufflevector <2 x i32> [[TMP249]], <2 x i32> poison, <2 x i32> zeroinitializer
|
|
; CHECK-NEXT: [[TMP251:%.*]] = add <2 x i32> [[TMP197]], [[TMP250]]
|
|
; CHECK-NEXT: [[TMP252:%.*]] = sub <2 x i32> [[TMP197]], [[TMP250]]
|
|
; CHECK-NEXT: [[TMP253:%.*]] = shufflevector <2 x i32> [[TMP251]], <2 x i32> [[TMP252]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP254:%.*]] = add <2 x i32> [[TMP195]], [[TMP253]]
|
|
; CHECK-NEXT: [[TMP255:%.*]] = xor <2 x i32> [[TMP254]], [[TMP192]]
|
|
; CHECK-NEXT: [[TMP256:%.*]] = extractelement <2 x i32> [[TMP247]], i32 0
|
|
; CHECK-NEXT: [[ADD108_1:%.*]] = add i32 [[TMP256]], [[ADD113]]
|
|
; CHECK-NEXT: [[TMP257:%.*]] = extractelement <2 x i32> [[TMP255]], i32 0
|
|
; CHECK-NEXT: [[ADD110_1:%.*]] = add i32 [[ADD108_1]], [[TMP257]]
|
|
; CHECK-NEXT: [[TMP258:%.*]] = extractelement <2 x i32> [[TMP255]], i32 1
|
|
; CHECK-NEXT: [[ADD112_1:%.*]] = add i32 [[ADD110_1]], [[TMP258]]
|
|
; CHECK-NEXT: [[TMP259:%.*]] = shufflevector <2 x i32> [[TMP210]], <2 x i32> poison, <2 x i32> <i32 1, i32 poison>
|
|
; CHECK-NEXT: [[TMP260:%.*]] = shufflevector <2 x i32> [[TMP259]], <2 x i32> [[TMP239]], <2 x i32> <i32 0, i32 2>
|
|
; CHECK-NEXT: [[TMP261:%.*]] = add <2 x i32> [[TMP223]], [[TMP260]]
|
|
; CHECK-NEXT: [[TMP262:%.*]] = sub <2 x i32> [[TMP223]], [[TMP260]]
|
|
; CHECK-NEXT: [[TMP263:%.*]] = shufflevector <2 x i32> [[TMP261]], <2 x i32> [[TMP262]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP264:%.*]] = add <2 x i32> [[TMP219]], [[TMP263]]
|
|
; CHECK-NEXT: [[TMP265:%.*]] = xor <2 x i32> [[TMP264]], [[TMP216]]
|
|
; CHECK-NEXT: [[TMP266:%.*]] = extractelement <2 x i32> [[TMP265]], i32 1
|
|
; CHECK-NEXT: [[ADD113_1:%.*]] = add i32 [[ADD112_1]], [[TMP266]]
|
|
; CHECK-NEXT: [[TMP267:%.*]] = shufflevector <2 x i32> <i32 65535, i32 poison>, <2 x i32> [[TMP223]], <2 x i32> <i32 0, i32 2>
|
|
; CHECK-NEXT: [[TMP268:%.*]] = mul <2 x i32> [[TMP210]], [[TMP267]]
|
|
; CHECK-NEXT: [[TMP269:%.*]] = sub <2 x i32> [[TMP210]], [[TMP267]]
|
|
; CHECK-NEXT: [[TMP270:%.*]] = shufflevector <2 x i32> [[TMP268]], <2 x i32> [[TMP269]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP271:%.*]] = add <2 x i32> [[TMP187]], [[TMP215]]
|
|
; CHECK-NEXT: [[TMP272:%.*]] = xor <2 x i32> [[TMP271]], [[TMP143]]
|
|
; CHECK-NEXT: [[TMP273:%.*]] = extractelement <2 x i32> [[TMP270]], i32 0
|
|
; CHECK-NEXT: [[TMP274:%.*]] = extractelement <2 x i32> [[TMP270]], i32 1
|
|
; CHECK-NEXT: [[ADD_I62_2:%.*]] = add i32 [[TMP273]], [[TMP274]]
|
|
; CHECK-NEXT: [[XOR_I63_2:%.*]] = xor i32 [[ADD_I62_2]], [[ADD44]]
|
|
; CHECK-NEXT: [[TMP275:%.*]] = extractelement <2 x i32> [[TMP265]], i32 0
|
|
; CHECK-NEXT: [[ADD108_2:%.*]] = add i32 [[TMP275]], [[ADD113_1]]
|
|
; CHECK-NEXT: [[TMP276:%.*]] = extractelement <2 x i32> [[TMP272]], i32 0
|
|
; CHECK-NEXT: [[ADD110_2:%.*]] = add i32 [[ADD108_2]], [[TMP276]]
|
|
; CHECK-NEXT: [[TMP277:%.*]] = extractelement <2 x i32> [[TMP272]], i32 1
|
|
; CHECK-NEXT: [[ADD112_2:%.*]] = add i32 [[ADD110_2]], [[TMP277]]
|
|
; CHECK-NEXT: [[ADD113_2:%.*]] = add i32 [[ADD112_2]], [[XOR_I63_2]]
|
|
; CHECK-NEXT: [[TMP278:%.*]] = insertelement <2 x i32> poison, i32 [[SUB59]], i32 0
|
|
; CHECK-NEXT: [[TMP279:%.*]] = shufflevector <2 x i32> [[TMP278]], <2 x i32> poison, <2 x i32> zeroinitializer
|
|
; CHECK-NEXT: [[TMP280:%.*]] = add <2 x i32> [[TMP279]], [[TMP189]]
|
|
; CHECK-NEXT: [[TMP281:%.*]] = sub <2 x i32> [[TMP279]], [[TMP189]]
|
|
; CHECK-NEXT: [[TMP282:%.*]] = shufflevector <2 x i32> [[TMP280]], <2 x i32> [[TMP281]], <2 x i32> <i32 0, i32 3>
|
|
; CHECK-NEXT: [[TMP283:%.*]] = add <2 x i32> [[TMP105]], [[TMP282]]
|
|
; CHECK-NEXT: [[TMP284:%.*]] = sub <2 x i32> [[TMP282]], [[TMP105]]
|
|
; CHECK-NEXT: [[TMP285:%.*]] = add <2 x i32> [[TMP139]], [[TMP283]]
|
|
; CHECK-NEXT: [[TMP286:%.*]] = xor <2 x i32> [[TMP285]], [[TMP108]]
|
|
; CHECK-NEXT: [[TMP287:%.*]] = lshr <2 x i32> [[TMP98]], <i32 15, i32 15>
|
|
; CHECK-NEXT: [[TMP288:%.*]] = and <2 x i32> [[TMP287]], <i32 65537, i32 65537>
|
|
; CHECK-NEXT: [[TMP289:%.*]] = mul <2 x i32> [[TMP288]], <i32 65535, i32 65535>
|
|
; CHECK-NEXT: [[TMP290:%.*]] = add <2 x i32> [[TMP289]], [[TMP284]]
|
|
; CHECK-NEXT: [[TMP291:%.*]] = xor <2 x i32> [[TMP290]], [[TMP98]]
|
|
; CHECK-NEXT: [[TMP292:%.*]] = extractelement <2 x i32> [[TMP286]], i32 1
|
|
; CHECK-NEXT: [[ADD108_3:%.*]] = add i32 [[TMP292]], [[ADD113_2]]
|
|
; CHECK-NEXT: [[TMP293:%.*]] = extractelement <2 x i32> [[TMP286]], i32 0
|
|
; CHECK-NEXT: [[ADD110_3:%.*]] = add i32 [[ADD108_3]], [[TMP293]]
|
|
; CHECK-NEXT: [[TMP294:%.*]] = extractelement <2 x i32> [[TMP291]], i32 0
|
|
; CHECK-NEXT: [[ADD112_3:%.*]] = add i32 [[ADD110_3]], [[TMP294]]
|
|
; CHECK-NEXT: [[TMP295:%.*]] = extractelement <2 x i32> [[TMP291]], i32 1
|
|
; CHECK-NEXT: [[ADD113_3:%.*]] = add i32 [[ADD112_3]], [[TMP295]]
|
|
; CHECK-NEXT: ret i32 [[ADD113_3]]
|
|
;
|
|
entry:
|
|
%0 = load i8, ptr %pix1, align 1
|
|
%conv = zext i8 %0 to i32
|
|
%1 = load i8, ptr %pix2, align 1
|
|
%conv2 = zext i8 %1 to i32
|
|
%sub = sub i32 %conv, %conv2
|
|
%arrayidx3 = getelementptr i8, ptr %pix1, i64 4
|
|
%2 = load i8, ptr %arrayidx3, align 1
|
|
%conv4 = zext i8 %2 to i32
|
|
%arrayidx5 = getelementptr i8, ptr %pix2, i64 4
|
|
%3 = load i8, ptr %arrayidx5, align 1
|
|
%conv6 = zext i8 %3 to i32
|
|
%sub7 = sub i32 %conv4, %conv6
|
|
%shl = shl i32 %sub7, 16
|
|
%add = add i32 %shl, %sub
|
|
%arrayidx8 = getelementptr i8, ptr %pix1, i64 1
|
|
%4 = load i8, ptr %arrayidx8, align 1
|
|
%conv9 = zext i8 %4 to i32
|
|
%arrayidx10 = getelementptr i8, ptr %pix2, i64 1
|
|
%5 = load i8, ptr %arrayidx10, align 1
|
|
%conv11 = zext i8 %5 to i32
|
|
%sub12 = sub i32 %conv9, %conv11
|
|
%arrayidx13 = getelementptr i8, ptr %pix1, i64 5
|
|
%6 = load i8, ptr %arrayidx13, align 1
|
|
%conv14 = zext i8 %6 to i32
|
|
%arrayidx15 = getelementptr i8, ptr %pix2, i64 5
|
|
%7 = load i8, ptr %arrayidx15, align 1
|
|
%conv16 = zext i8 %7 to i32
|
|
%sub17 = sub i32 %conv14, %conv16
|
|
%shl18 = shl i32 %sub17, 16
|
|
%add19 = add i32 %shl18, %sub12
|
|
%arrayidx20 = getelementptr i8, ptr %pix1, i64 2
|
|
%8 = load i8, ptr %arrayidx20, align 1
|
|
%conv21 = zext i8 %8 to i32
|
|
%arrayidx22 = getelementptr i8, ptr %pix2, i64 2
|
|
%9 = load i8, ptr %arrayidx22, align 1
|
|
%conv23 = zext i8 %9 to i32
|
|
%sub24 = sub i32 %conv21, %conv23
|
|
%arrayidx25 = getelementptr i8, ptr %pix1, i64 6
|
|
%10 = load i8, ptr %arrayidx25, align 1
|
|
%conv26 = zext i8 %10 to i32
|
|
%arrayidx27 = getelementptr i8, ptr %pix2, i64 6
|
|
%11 = load i8, ptr %arrayidx27, align 1
|
|
%conv28 = zext i8 %11 to i32
|
|
%sub29 = sub i32 %conv26, %conv28
|
|
%shl30 = shl i32 %sub29, 16
|
|
%add31 = add i32 %shl30, %sub24
|
|
%arrayidx32 = getelementptr i8, ptr %pix1, i64 3
|
|
%12 = load i8, ptr %arrayidx32, align 1
|
|
%conv33 = zext i8 %12 to i32
|
|
%arrayidx34 = getelementptr i8, ptr %pix2, i64 3
|
|
%13 = load i8, ptr %arrayidx34, align 1
|
|
%conv35 = zext i8 %13 to i32
|
|
%sub36 = sub i32 %conv33, %conv35
|
|
%arrayidx37 = getelementptr i8, ptr %pix1, i64 7
|
|
%14 = load i8, ptr %arrayidx37, align 1
|
|
%conv38 = zext i8 %14 to i32
|
|
%arrayidx39 = getelementptr i8, ptr %pix2, i64 7
|
|
%15 = load i8, ptr %arrayidx39, align 1
|
|
%conv40 = zext i8 %15 to i32
|
|
%sub41 = sub i32 %conv38, %conv40
|
|
%shl42 = shl i32 %sub41, 16
|
|
%add43 = add i32 %shl42, %sub36
|
|
%add44 = add i32 %add19, %add
|
|
%sub45 = sub i32 %add, %add19
|
|
%add46 = add i32 %add43, %add31
|
|
%sub47 = sub i32 %add31, %add43
|
|
%add48 = add i32 %add46, %add44
|
|
%sub51 = sub i32 %add44, %add46
|
|
%add55 = add i32 %sub47, %sub45
|
|
%sub59 = sub i32 %sub45, %sub47
|
|
%add.ptr3 = getelementptr i8, ptr %pix1, i64 %idx.ext
|
|
%add.ptr644 = getelementptr i8, ptr %pix2, i64 %idx.ext63
|
|
%16 = load i8, ptr %add.ptr3, align 1
|
|
%conv.1 = zext i8 %16 to i32
|
|
%17 = load i8, ptr %add.ptr644, align 1
|
|
%conv2.1 = zext i8 %17 to i32
|
|
%sub.1 = sub i32 %conv.1, %conv2.1
|
|
%arrayidx3.1 = getelementptr i8, ptr %add.ptr3, i64 4
|
|
%18 = load i8, ptr %arrayidx3.1, align 1
|
|
%conv4.1 = zext i8 %18 to i32
|
|
%arrayidx5.1 = getelementptr i8, ptr %add.ptr644, i64 4
|
|
%19 = load i8, ptr %arrayidx5.1, align 1
|
|
%conv6.1 = zext i8 %19 to i32
|
|
%sub7.1 = sub i32 %conv4.1, %conv6.1
|
|
%shl.1 = shl i32 %sub7.1, 16
|
|
%add.1 = add i32 %shl.1, %sub.1
|
|
%arrayidx8.1 = getelementptr i8, ptr %add.ptr3, i64 1
|
|
%20 = load i8, ptr %arrayidx8.1, align 1
|
|
%conv9.1 = zext i8 %20 to i32
|
|
%arrayidx10.1 = getelementptr i8, ptr %add.ptr644, i64 1
|
|
%21 = load i8, ptr %arrayidx10.1, align 1
|
|
%conv11.1 = zext i8 %21 to i32
|
|
%sub12.1 = sub i32 %conv9.1, %conv11.1
|
|
%arrayidx13.1 = getelementptr i8, ptr %add.ptr3, i64 5
|
|
%22 = load i8, ptr %arrayidx13.1, align 1
|
|
%conv14.1 = zext i8 %22 to i32
|
|
%arrayidx15.1 = getelementptr i8, ptr %add.ptr644, i64 5
|
|
%23 = load i8, ptr %arrayidx15.1, align 1
|
|
%conv16.1 = zext i8 %23 to i32
|
|
%sub17.1 = sub i32 %conv14.1, %conv16.1
|
|
%shl18.1 = shl i32 %sub17.1, 16
|
|
%add19.1 = add i32 %shl18.1, %sub12.1
|
|
%arrayidx20.1 = getelementptr i8, ptr %add.ptr3, i64 2
|
|
%24 = load i8, ptr %arrayidx20.1, align 1
|
|
%conv21.1 = zext i8 %24 to i32
|
|
%arrayidx22.1 = getelementptr i8, ptr %add.ptr644, i64 2
|
|
%25 = load i8, ptr %arrayidx22.1, align 1
|
|
%conv23.1 = zext i8 %25 to i32
|
|
%sub24.1 = sub i32 %conv21.1, %conv23.1
|
|
%arrayidx25.1 = getelementptr i8, ptr %add.ptr3, i64 6
|
|
%26 = load i8, ptr %arrayidx25.1, align 1
|
|
%conv26.1 = zext i8 %26 to i32
|
|
%arrayidx27.1 = getelementptr i8, ptr %add.ptr644, i64 6
|
|
%27 = load i8, ptr %arrayidx27.1, align 1
|
|
%conv28.1 = zext i8 %27 to i32
|
|
%sub29.1 = sub i32 %conv26.1, %conv28.1
|
|
%shl30.1 = shl i32 %sub29.1, 16
|
|
%add31.1 = add i32 %shl30.1, %sub24.1
|
|
%arrayidx32.1 = getelementptr i8, ptr %add.ptr3, i64 3
|
|
%28 = load i8, ptr %arrayidx32.1, align 1
|
|
%conv33.1 = zext i8 %28 to i32
|
|
%arrayidx34.1 = getelementptr i8, ptr %add.ptr644, i64 3
|
|
%29 = load i8, ptr %arrayidx34.1, align 1
|
|
%conv35.1 = zext i8 %29 to i32
|
|
%sub36.1 = sub i32 %conv33.1, %conv35.1
|
|
%arrayidx37.1 = getelementptr i8, ptr %add.ptr3, i64 7
|
|
%30 = load i8, ptr %arrayidx37.1, align 1
|
|
%conv38.1 = zext i8 %30 to i32
|
|
%arrayidx39.1 = getelementptr i8, ptr %add.ptr644, i64 7
|
|
%31 = load i8, ptr %arrayidx39.1, align 1
|
|
%conv40.1 = zext i8 %31 to i32
|
|
%sub41.1 = sub i32 %conv38.1, %conv40.1
|
|
%shl42.1 = shl i32 %sub41.1, 16
|
|
%add43.1 = add i32 %shl42.1, %sub36.1
|
|
%add44.1 = add i32 %add19.1, %add.1
|
|
%sub45.1 = sub i32 %add.1, %add19.1
|
|
%add46.1 = add i32 %add43.1, %add31.1
|
|
%sub47.1 = sub i32 %add31.1, %add43.1
|
|
%add48.1 = add i32 %add46.1, %add44.1
|
|
%sub51.1 = sub i32 %add44.1, %add46.1
|
|
%add55.1 = add i32 %sub47.1, %sub45.1
|
|
%sub59.1 = sub i32 %sub45.1, %sub47.1
|
|
%add.ptr.1 = getelementptr i8, ptr %add.ptr, i64 %idx.ext
|
|
%add.ptr64.1 = getelementptr i8, ptr %add.ptr64, i64 %idx.ext63
|
|
%32 = load i8, ptr %add.ptr.1, align 1
|
|
%conv.2 = zext i8 %32 to i32
|
|
%33 = load i8, ptr %add.ptr64.1, align 1
|
|
%conv2.2 = zext i8 %33 to i32
|
|
%sub.2 = sub i32 %conv.2, %conv2.2
|
|
%arrayidx3.2 = getelementptr i8, ptr %add.ptr.1, i64 4
|
|
%34 = load i8, ptr %arrayidx3.2, align 1
|
|
%conv4.2 = zext i8 %34 to i32
|
|
%arrayidx5.2 = getelementptr i8, ptr %add.ptr64.1, i64 4
|
|
%35 = load i8, ptr %arrayidx5.2, align 1
|
|
%conv6.2 = zext i8 %35 to i32
|
|
%sub7.2 = sub i32 %conv4.2, %conv6.2
|
|
%shl.2 = shl i32 %sub7.2, 16
|
|
%add.2 = add i32 %shl.2, %sub.2
|
|
%arrayidx8.2 = getelementptr i8, ptr %add.ptr.1, i64 1
|
|
%36 = load i8, ptr %arrayidx8.2, align 1
|
|
%conv9.2 = zext i8 %36 to i32
|
|
%arrayidx10.2 = getelementptr i8, ptr %add.ptr64.1, i64 1
|
|
%37 = load i8, ptr %arrayidx10.2, align 1
|
|
%conv11.2 = zext i8 %37 to i32
|
|
%sub12.2 = sub i32 %conv9.2, %conv11.2
|
|
%arrayidx13.2 = getelementptr i8, ptr %add.ptr.1, i64 5
|
|
%38 = load i8, ptr %arrayidx13.2, align 1
|
|
%conv14.2 = zext i8 %38 to i32
|
|
%arrayidx15.2 = getelementptr i8, ptr %add.ptr64.1, i64 5
|
|
%39 = load i8, ptr %arrayidx15.2, align 1
|
|
%conv16.2 = zext i8 %39 to i32
|
|
%sub17.2 = sub i32 %conv14.2, %conv16.2
|
|
%shl18.2 = shl i32 %sub17.2, 16
|
|
%add19.2 = add i32 %shl18.2, %sub12.2
|
|
%arrayidx20.2 = getelementptr i8, ptr %add.ptr.1, i64 2
|
|
%40 = load i8, ptr %arrayidx20.2, align 1
|
|
%conv21.2 = zext i8 %40 to i32
|
|
%arrayidx22.2 = getelementptr i8, ptr %add.ptr64.1, i64 2
|
|
%41 = load i8, ptr %arrayidx22.2, align 1
|
|
%conv23.2 = zext i8 %41 to i32
|
|
%sub24.2 = sub i32 %conv21.2, %conv23.2
|
|
%arrayidx25.2 = getelementptr i8, ptr %add.ptr.1, i64 6
|
|
%42 = load i8, ptr %arrayidx25.2, align 1
|
|
%conv26.2 = zext i8 %42 to i32
|
|
%arrayidx27.2 = getelementptr i8, ptr %add.ptr64.1, i64 6
|
|
%43 = load i8, ptr %arrayidx27.2, align 1
|
|
%conv28.2 = zext i8 %43 to i32
|
|
%sub29.2 = sub i32 %conv26.2, %conv28.2
|
|
%shl30.2 = shl i32 %sub29.2, 16
|
|
%add31.2 = add i32 %shl30.2, %sub24.2
|
|
%arrayidx32.2 = getelementptr i8, ptr %add.ptr.1, i64 3
|
|
%44 = load i8, ptr %arrayidx32.2, align 1
|
|
%conv33.2 = zext i8 %44 to i32
|
|
%arrayidx34.2 = getelementptr i8, ptr %add.ptr64.1, i64 3
|
|
%45 = load i8, ptr %arrayidx34.2, align 1
|
|
%conv35.2 = zext i8 %45 to i32
|
|
%sub36.2 = sub i32 %conv33.2, %conv35.2
|
|
%arrayidx37.2 = getelementptr i8, ptr %add.ptr.1, i64 7
|
|
%46 = load i8, ptr %arrayidx37.2, align 1
|
|
%conv38.2 = zext i8 %46 to i32
|
|
%arrayidx39.2 = getelementptr i8, ptr %add.ptr64.1, i64 7
|
|
%47 = load i8, ptr %arrayidx39.2, align 1
|
|
%conv40.2 = zext i8 %47 to i32
|
|
%sub41.2 = sub i32 %conv38.2, %conv40.2
|
|
%shl42.2 = shl i32 %sub41.2, 16
|
|
%add43.2 = add i32 %shl42.2, %sub36.2
|
|
%add44.2 = add i32 %add19.2, %add.2
|
|
%sub45.2 = sub i32 %add.2, %add19.2
|
|
%add46.2 = add i32 %add43.2, %add31.2
|
|
%sub47.2 = sub i32 %add31.2, %add43.2
|
|
%add48.2 = add i32 %add46.2, %add44.2
|
|
%sub51.2 = sub i32 %add44.2, %add46.2
|
|
%add55.2 = add i32 %sub47.2, %sub45.2
|
|
%sub59.2 = sub i32 %sub45.2, %sub47.2
|
|
%48 = load i8, ptr null, align 1
|
|
%conv.3 = zext i8 %48 to i32
|
|
%49 = load i8, ptr null, align 1
|
|
%conv2.3 = zext i8 %49 to i32
|
|
%sub.3 = sub i32 %conv.3, %conv2.3
|
|
%arrayidx3.3 = getelementptr i8, ptr null, i64 4
|
|
%50 = load i8, ptr %arrayidx3.3, align 1
|
|
%conv4.3 = zext i8 %50 to i32
|
|
%arrayidx5.3 = getelementptr i8, ptr null, i64 4
|
|
%51 = load i8, ptr %arrayidx5.3, align 1
|
|
%conv6.3 = zext i8 %51 to i32
|
|
%sub7.3 = sub i32 %conv4.3, %conv6.3
|
|
%shl.3 = shl i32 %sub7.3, 16
|
|
%add.3 = add i32 %shl.3, %sub.3
|
|
%arrayidx8.3 = getelementptr i8, ptr null, i64 1
|
|
%52 = load i8, ptr %arrayidx8.3, align 1
|
|
%conv9.3 = zext i8 %52 to i32
|
|
%arrayidx10.3 = getelementptr i8, ptr null, i64 1
|
|
%53 = load i8, ptr %arrayidx10.3, align 1
|
|
%conv11.3 = zext i8 %53 to i32
|
|
%sub12.3 = sub i32 %conv9.3, %conv11.3
|
|
%54 = load i8, ptr null, align 1
|
|
%conv14.3 = zext i8 %54 to i32
|
|
%arrayidx15.3 = getelementptr i8, ptr null, i64 5
|
|
%55 = load i8, ptr %arrayidx15.3, align 1
|
|
%conv16.3 = zext i8 %55 to i32
|
|
%sub17.3 = sub i32 %conv14.3, %conv16.3
|
|
%shl18.3 = shl i32 %sub17.3, 16
|
|
%add19.3 = add i32 %shl18.3, %sub12.3
|
|
%arrayidx20.3 = getelementptr i8, ptr null, i64 2
|
|
%56 = load i8, ptr %arrayidx20.3, align 1
|
|
%conv21.3 = zext i8 %56 to i32
|
|
%arrayidx22.3 = getelementptr i8, ptr null, i64 2
|
|
%57 = load i8, ptr %arrayidx22.3, align 1
|
|
%conv23.3 = zext i8 %57 to i32
|
|
%sub24.3 = sub i32 %conv21.3, %conv23.3
|
|
%58 = load i8, ptr null, align 1
|
|
%conv26.3 = zext i8 %58 to i32
|
|
%arrayidx27.3 = getelementptr i8, ptr null, i64 6
|
|
%59 = load i8, ptr %arrayidx27.3, align 1
|
|
%conv28.3 = zext i8 %59 to i32
|
|
%sub29.3 = sub i32 %conv26.3, %conv28.3
|
|
%shl30.3 = shl i32 %sub29.3, 16
|
|
%add31.3 = add i32 %shl30.3, %sub24.3
|
|
%arrayidx32.3 = getelementptr i8, ptr null, i64 3
|
|
%60 = load i8, ptr %arrayidx32.3, align 1
|
|
%conv33.3 = zext i8 %60 to i32
|
|
%arrayidx34.3 = getelementptr i8, ptr null, i64 3
|
|
%61 = load i8, ptr %arrayidx34.3, align 1
|
|
%conv35.3 = zext i8 %61 to i32
|
|
%sub36.3 = sub i32 %conv33.3, %conv35.3
|
|
%62 = load i8, ptr null, align 1
|
|
%conv38.3 = zext i8 %62 to i32
|
|
%arrayidx39.3 = getelementptr i8, ptr null, i64 7
|
|
%63 = load i8, ptr %arrayidx39.3, align 1
|
|
%conv40.3 = zext i8 %63 to i32
|
|
%sub41.3 = sub i32 %conv38.3, %conv40.3
|
|
%shl42.3 = shl i32 %sub41.3, 16
|
|
%add43.3 = add i32 %shl42.3, %sub36.3
|
|
%add44.3 = add i32 %add19.3, %add.3
|
|
%sub45.3 = sub i32 %add.3, %add19.3
|
|
%add46.3 = add i32 %add43.3, %add31.3
|
|
%sub47.3 = sub i32 %add31.3, %add43.3
|
|
%add48.3 = add i32 %add46.3, %add44.3
|
|
%sub51.3 = sub i32 %add44.3, %add46.3
|
|
%add55.3 = add i32 %sub47.3, %sub45.3
|
|
%sub59.3 = sub i32 %sub45.3, %sub47.3
|
|
%add78 = add i32 %add48.1, %add48
|
|
%sub86 = sub i32 %add48, %add48.1
|
|
%add94 = add i32 %add48.3, %add48.2
|
|
%sub102 = sub i32 %add48.2, %add48.3
|
|
%add103 = add i32 %add94, %add78
|
|
%sub104 = sub i32 %add78, %add94
|
|
%add105 = add i32 %sub102, %sub86
|
|
%sub106 = sub i32 %sub86, %sub102
|
|
%shr.i = lshr i32 %conv.3, 15
|
|
%and.i = and i32 %shr.i, 65537
|
|
%mul.i = mul i32 %and.i, 65535
|
|
%add.i = add i32 %mul.i, %add103
|
|
%xor.i = xor i32 %add.i, %conv.3
|
|
%shr.i49 = lshr i32 %add46.2, 15
|
|
%and.i50 = and i32 %shr.i49, 65537
|
|
%mul.i51 = mul i32 %and.i50, 65535
|
|
%add.i52 = add i32 %mul.i51, %add105
|
|
%xor.i53 = xor i32 %add.i52, %add46.2
|
|
%shr.i54 = lshr i32 %add46.1, 15
|
|
%and.i55 = and i32 %shr.i54, 65537
|
|
%mul.i56 = mul i32 %and.i55, 65535
|
|
%add.i57 = add i32 %mul.i56, %sub104
|
|
%xor.i58 = xor i32 %add.i57, %add46.1
|
|
%shr.i59 = lshr i32 %add46, 15
|
|
%and.i60 = and i32 %shr.i59, 65537
|
|
%mul.i61 = mul i32 %and.i60, 65535
|
|
%add.i62 = add i32 %mul.i61, %sub106
|
|
%xor.i63 = xor i32 %add.i62, %add46
|
|
%add110 = add i32 %xor.i53, %xor.i
|
|
%add112 = add i32 %add110, %xor.i58
|
|
%add113 = add i32 %add112, %xor.i63
|
|
%add78.1 = add i32 %add55.1, %add55
|
|
%sub86.1 = sub i32 %add55, %add55.1
|
|
%add94.1 = add i32 %add55.3, %add55.2
|
|
%sub102.1 = sub i32 %add55.2, %add55.3
|
|
%add103.1 = add i32 %add94.1, %add78.1
|
|
%sub104.1 = sub i32 %add78.1, %add94.1
|
|
%add105.1 = add i32 %sub102.1, %sub86.1
|
|
%sub106.1 = sub i32 %sub86.1, %sub102.1
|
|
%shr.i.1 = lshr i32 %conv9.2, 15
|
|
%and.i.1 = and i32 %shr.i.1, 65537
|
|
%mul.i.1 = mul i32 %and.i.1, 65535
|
|
%add.i.1 = add i32 %mul.i.1, %add103.1
|
|
%xor.i.1 = xor i32 %add.i.1, %conv9.2
|
|
%shr.i49.1 = lshr i32 %conv.2, 15
|
|
%and.i50.1 = and i32 %shr.i49.1, 65537
|
|
%mul.i51.1 = mul i32 %and.i50.1, 65535
|
|
%add.i52.1 = add i32 %mul.i51.1, %add105.1
|
|
%xor.i53.1 = xor i32 %add.i52.1, %conv.2
|
|
%shr.i54.1 = lshr i32 %sub47.1, 15
|
|
%and.i55.1 = and i32 %shr.i54.1, 65537
|
|
%mul.i56.1 = mul i32 %and.i55.1, 65535
|
|
%add.i57.1 = add i32 %mul.i56.1, %sub104.1
|
|
%xor.i58.1 = xor i32 %add.i57.1, %sub47.1
|
|
%shr.i59.1 = lshr i32 %sub47, 15
|
|
%and.i60.1 = and i32 %shr.i59.1, 65537
|
|
%mul.i61.1 = mul i32 %and.i60.1, 65535
|
|
%add.i62.1 = add i32 %mul.i61.1, %sub106.1
|
|
%xor.i63.1 = xor i32 %add.i62.1, %sub47
|
|
%add108.1 = add i32 %xor.i53.1, %add113
|
|
%add110.1 = add i32 %add108.1, %xor.i.1
|
|
%add112.1 = add i32 %add110.1, %xor.i58.1
|
|
%add113.1 = add i32 %add112.1, %xor.i63.1
|
|
%add78.2 = add i32 %sub51.1, %sub51
|
|
%sub86.2 = sub i32 %sub51, %sub51.1
|
|
%add94.2 = add i32 %sub51.3, %sub51.2
|
|
%sub102.2 = sub i32 %sub51.2, %sub51.3
|
|
%add103.2 = add i32 %add94.2, %add78.2
|
|
%sub104.2 = sub i32 %add78.2, %add94.2
|
|
%add105.2 = add i32 %sub102.2, %sub86.2
|
|
%sub106.2 = sub i32 %sub86.2, %sub102.2
|
|
%shr.i.2 = lshr i32 %conv9.1, 15
|
|
%and.i.2 = and i32 %shr.i.2, 65537
|
|
%mul.i.2 = mul i32 %and.i.2, 65535
|
|
%add.i.2 = add i32 %mul.i.2, %add103.2
|
|
%xor.i.2 = xor i32 %add.i.2, %conv9.1
|
|
%shr.i49.2 = lshr i32 %conv.1, 15
|
|
%and.i50.2 = and i32 %shr.i49.2, 65537
|
|
%mul.i51.2 = mul i32 %and.i50.2, 65535
|
|
%add.i52.2 = add i32 %mul.i51.2, %add105.2
|
|
%xor.i53.2 = xor i32 %add.i52.2, %conv.1
|
|
%shr.i54.2 = lshr i32 %conv21.1, 15
|
|
%and.i55.2 = and i32 %shr.i54.2, 65537
|
|
%mul.i56.2 = mul i32 %and.i55.2, 65535
|
|
%add.i57.2 = add i32 %mul.i56.2, %sub104.2
|
|
%xor.i58.2 = xor i32 %add.i57.2, %conv21.1
|
|
%shr.i59.2 = lshr i32 %add44, 15
|
|
%and.i60.2 = and i32 %shr.i59.2, 65537
|
|
%mul.i61.2 = mul i32 %and.i60.2, 65535
|
|
%add.i62.2 = add i32 %mul.i61.2, %sub106.2
|
|
%xor.i63.2 = xor i32 %add.i62.2, %add44
|
|
%add108.2 = add i32 %xor.i53.2, %add113.1
|
|
%add110.2 = add i32 %add108.2, %xor.i.2
|
|
%add112.2 = add i32 %add110.2, %xor.i58.2
|
|
%add113.2 = add i32 %add112.2, %xor.i63.2
|
|
%add78.3 = add i32 %sub59.1, %sub59
|
|
%sub86.3 = sub i32 %sub59, %sub59.1
|
|
%add94.3 = add i32 %sub59.3, %sub59.2
|
|
%sub102.3 = sub i32 %sub59.2, %sub59.3
|
|
%add103.3 = add i32 %add94.3, %add78.3
|
|
%sub104.3 = sub i32 %add78.3, %add94.3
|
|
%add105.3 = add i32 %sub102.3, %sub86.3
|
|
%sub106.3 = sub i32 %sub86.3, %sub102.3
|
|
%shr.i.3 = lshr i32 %conv9, 15
|
|
%and.i.3 = and i32 %shr.i.3, 65537
|
|
%mul.i.3 = mul i32 %and.i.3, 65535
|
|
%add.i.3 = add i32 %mul.i.3, %add103.3
|
|
%xor.i.3 = xor i32 %add.i.3, %conv9
|
|
%shr.i49.3 = lshr i32 %conv, 15
|
|
%and.i50.3 = and i32 %shr.i49.3, 65537
|
|
%mul.i51.3 = mul i32 %and.i50.3, 65535
|
|
%add.i52.3 = add i32 %mul.i51.3, %add105.3
|
|
%xor.i53.3 = xor i32 %add.i52.3, %conv
|
|
%shr.i54.3 = lshr i32 %conv21, 15
|
|
%and.i55.3 = and i32 %shr.i54.3, 65537
|
|
%mul.i56.3 = mul i32 %and.i55.3, 65535
|
|
%add.i57.3 = add i32 %mul.i56.3, %sub104.3
|
|
%xor.i58.3 = xor i32 %add.i57.3, %conv21
|
|
%shr.i59.3 = lshr i32 %conv33, 15
|
|
%and.i60.3 = and i32 %shr.i59.3, 65537
|
|
%mul.i61.3 = mul i32 %and.i60.3, 65535
|
|
%add.i62.3 = add i32 %mul.i61.3, %sub106.3
|
|
%xor.i63.3 = xor i32 %add.i62.3, %conv33
|
|
%add108.3 = add i32 %xor.i53.3, %add113.2
|
|
%add110.3 = add i32 %add108.3, %xor.i.3
|
|
%add112.3 = add i32 %add110.3, %xor.i58.3
|
|
%add113.3 = add i32 %add112.3, %xor.i63.3
|
|
ret i32 %add113.3
|
|
}
|