16929219b0
This work simplifies and generalizes the instruction definition for intrinsic llvm.fptrunc.round. We no longer name the instruction with the rounding mode. Instead, we introduce an immediate operand for the rounding mode for the pseudo instruction. This immediate will be used to set up the hardware mode register at the time the real instruction is generated. We name the pseudo instruction as FPTRUNC_ROUND_F16_F32 (for f32 -> f16), which is easy to generalize for other types. "round.towardzero" and "round.tonearest" are added for f32 -> f16 truncating, in addition to the existing "round.upward" and "round.downward". Other rounding modes are not supported by hardware at this moment.
13 lines
638 B
LLVM
13 lines
638 B
LLVM
; RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1030 -o /dev/null %s 2>&1 | FileCheck %s --ignore-case --check-prefixes=SDAG-FAIL
|
|
; RUN: not --crash llc -global-isel -mtriple=amdgcn -mcpu=gfx1030 -o /dev/null %s 2>&1 | FileCheck %s --ignore-case --check-prefix=GISEL-FAIL
|
|
|
|
define amdgpu_gs void @test_fptrunc_round_f64(double %a, ptr addrspace(1) %out) {
|
|
; SDAG-FAIL: LLVM ERROR: Cannot select
|
|
; GISEL-FAIL: unable to legalize instruction
|
|
%res = call half @llvm.fptrunc.round.f64(double %a, metadata !"round.upward")
|
|
store half %res, ptr addrspace(1) %out, align 4
|
|
ret void
|
|
}
|
|
|
|
declare half @llvm.fptrunc.round.f64(double, metadata)
|