Craig Topper c5e6c886aa [VP][SelectionDAG][RISCV] Add get_vector_length intrinsics and generic SelectionDAG support.
The generic implementation is umin(TC, VF * vscale).

Lowering to vsetvli for RISC-V will come in a future patch.

This patch is a pre-requisite to be able to CodeGen vectorized code from
D99750.

Reviewed By: reames, frasercrmck

Differential Revision: https://reviews.llvm.org/D149916
2023-05-26 09:06:38 -07:00
..
2022-08-24 22:41:38 +00:00

This directory contains testcases that the verifier is supposed to detect as
malformed LLVM code.  Testcases for situations that the verifier incorrectly
identifies as malformed should go in the test/Assembler directory.