llvm-project/mlir/test/Dialect/SparseTensor/codegen_sparse_dealloc.mlir
wren romano a0615d020a [mlir][sparse] Renaming the STEA field dimLevelType to lvlTypes
This commit is part of the migration of towards the new STEA syntax/design.  In particular, this commit includes the following changes:
* Renaming compiler-internal functions/methods:
  * `SparseTensorEncodingAttr::{getDimLevelType => getLvlTypes}`
  * `Merger::{getDimLevelType => getLvlType}` (for consistency)
  * `sparse_tensor::{getDimLevelType => buildLevelType}` (to help reduce confusion vs actual getter methods)
* Renaming external facets to match:
  * the STEA parser and printer
  * the C and Python bindings
  * PyTACO

However, the actual renaming of the `DimLevelType` itself (along with all the "dlt" names) will be handled in a separate commit.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D150330
2023-05-17 14:24:09 -07:00

28 lines
1.1 KiB
MLIR

// RUN: mlir-opt %s --post-sparsification-rewrite="enable-runtime-library=false" \
// RUN: --sparse-tensor-codegen=create-sparse-deallocs=false \
// RUN: --canonicalize --cse | FileCheck %s -check-prefix=CHECK-NO-DEALLOC
// RUN: mlir-opt %s --post-sparsification-rewrite="enable-runtime-library=false" \
// RUN: --sparse-tensor-codegen=create-sparse-deallocs=true \
// RUN: --canonicalize --cse | FileCheck %s -check-prefix=CHECK-DEALLOC
#CSR = #sparse_tensor.encoding<{ lvlTypes = ["dense", "compressed"]}>
#CSC = #sparse_tensor.encoding<{
lvlTypes = ["dense", "compressed"],
dimOrdering = affine_map<(i,j) -> (j,i)>
}>
//
// No memref.dealloc is user-requested so
// CHECK-NO-DEALLOC-LABEL: @sparse_convert_permuted
// CHECK-NO-DEALLOC-NOT: memref.dealloc
//
// Otherwise memref.dealloc is created to free temporary sparse buffers.
// CHECK-DEALLOC-LABEL: @sparse_convert_permuted
// CHECK-DEALLOC: memref.dealloc
//
func.func @sparse_convert_permuted(%arg0: tensor<?x?xf32, #CSR>) -> tensor<?x?xf32, #CSC> {
%0 = sparse_tensor.convert %arg0 : tensor<?x?xf32, #CSR> to tensor<?x?xf32, #CSC>
return %0 : tensor<?x?xf32, #CSC>
}