Arnaud A. de Grandmaison
a6178a179d
[EarlyCSE] Fix handling of target memory intrinsics for CSE'ing loads.
...
Summary:
Some target intrinsics can access multiple elements, using the pointer as a
base address (e.g. AArch64 ld4). When trying to CSE such instructions,
it must be checked the available value comes from a compatible instruction
because the pointer is not enough to discriminate whether the value is
correct.
Reviewers: ssijaric
Subscribers: mcrosier, llvm-commits, aemerson
Differential Revision: http://reviews.llvm.org/D13475
llvm-svn: 249523
2015-10-07 07:41:29 +00:00
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