
I had dropped the check for which intrinsics were supported. This is a quick fix to get tree back into an unbroken state, a cleaner change may follow.
739 lines
26 KiB
C++
739 lines
26 KiB
C++
//===- InterleavedAccessPass.cpp ------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Interleaved Access pass, which identifies
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// interleaved memory accesses and transforms them into target specific
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// intrinsics.
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//
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// An interleaved load reads data from memory into several vectors, with
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// DE-interleaving the data on a factor. An interleaved store writes several
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// vectors to memory with RE-interleaving the data on a factor.
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//
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// As interleaved accesses are difficult to identified in CodeGen (mainly
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// because the VECTOR_SHUFFLE DAG node is quite different from the shufflevector
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// IR), we identify and transform them to intrinsics in this pass so the
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// intrinsics can be easily matched into target specific instructions later in
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// CodeGen.
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//
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// E.g. An interleaved load (Factor = 2):
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// %wide.vec = load <8 x i32>, <8 x i32>* %ptr
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// %v0 = shuffle <8 x i32> %wide.vec, <8 x i32> poison, <0, 2, 4, 6>
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// %v1 = shuffle <8 x i32> %wide.vec, <8 x i32> poison, <1, 3, 5, 7>
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//
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// It could be transformed into a ld2 intrinsic in AArch64 backend or a vld2
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// intrinsic in ARM backend.
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//
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// In X86, this can be further optimized into a set of target
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// specific loads followed by an optimized sequence of shuffles.
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//
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// E.g. An interleaved store (Factor = 3):
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// %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1,
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// <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
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// store <12 x i32> %i.vec, <12 x i32>* %ptr
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//
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// It could be transformed into a st3 intrinsic in AArch64 backend or a vst3
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// intrinsic in ARM backend.
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//
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// Similarly, a set of interleaved stores can be transformed into an optimized
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// sequence of shuffles followed by a set of target specific stores for X86.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Analysis/VectorUtils.h"
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#include "llvm/CodeGen/InterleavedAccess.h"
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#include "llvm/CodeGen/TargetLowering.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/InstIterator.h"
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/PatternMatch.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Transforms/Utils/Local.h"
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#include <cassert>
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#include <utility>
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using namespace llvm;
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#define DEBUG_TYPE "interleaved-access"
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static cl::opt<bool> LowerInterleavedAccesses(
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"lower-interleaved-accesses",
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cl::desc("Enable lowering interleaved accesses to intrinsics"),
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cl::init(true), cl::Hidden);
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namespace {
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class InterleavedAccessImpl {
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friend class InterleavedAccess;
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public:
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InterleavedAccessImpl() = default;
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InterleavedAccessImpl(DominatorTree *DT, const TargetLowering *TLI)
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: DT(DT), TLI(TLI), MaxFactor(TLI->getMaxSupportedInterleaveFactor()) {}
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bool runOnFunction(Function &F);
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private:
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DominatorTree *DT = nullptr;
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const TargetLowering *TLI = nullptr;
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/// The maximum supported interleave factor.
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unsigned MaxFactor = 0u;
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/// Transform an interleaved load into target specific intrinsics.
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bool lowerInterleavedLoad(Instruction *Load,
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SmallSetVector<Instruction *, 32> &DeadInsts);
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/// Transform an interleaved store into target specific intrinsics.
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bool lowerInterleavedStore(Instruction *Store,
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SmallSetVector<Instruction *, 32> &DeadInsts);
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/// Transform a load and a deinterleave intrinsic into target specific
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/// instructions.
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bool lowerDeinterleaveIntrinsic(IntrinsicInst *II,
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SmallSetVector<Instruction *, 32> &DeadInsts);
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/// Transform an interleave intrinsic and a store into target specific
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/// instructions.
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bool lowerInterleaveIntrinsic(IntrinsicInst *II,
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SmallSetVector<Instruction *, 32> &DeadInsts);
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/// Returns true if the uses of an interleaved load by the
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/// extractelement instructions in \p Extracts can be replaced by uses of the
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/// shufflevector instructions in \p Shuffles instead. If so, the necessary
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/// replacements are also performed.
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bool tryReplaceExtracts(ArrayRef<ExtractElementInst *> Extracts,
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ArrayRef<ShuffleVectorInst *> Shuffles);
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/// Given a number of shuffles of the form shuffle(binop(x,y)), convert them
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/// to binop(shuffle(x), shuffle(y)) to allow the formation of an
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/// interleaving load. Any newly created shuffles that operate on \p LI will
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/// be added to \p Shuffles. Returns true, if any changes to the IR have been
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/// made.
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bool replaceBinOpShuffles(ArrayRef<ShuffleVectorInst *> BinOpShuffles,
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SmallVectorImpl<ShuffleVectorInst *> &Shuffles,
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Instruction *LI);
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};
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class InterleavedAccess : public FunctionPass {
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InterleavedAccessImpl Impl;
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public:
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static char ID;
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InterleavedAccess() : FunctionPass(ID) {
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initializeInterleavedAccessPass(*PassRegistry::getPassRegistry());
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}
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StringRef getPassName() const override { return "Interleaved Access Pass"; }
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bool runOnFunction(Function &F) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<DominatorTreeWrapperPass>();
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AU.setPreservesCFG();
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}
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};
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} // end anonymous namespace.
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PreservedAnalyses InterleavedAccessPass::run(Function &F,
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FunctionAnalysisManager &FAM) {
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auto *DT = &FAM.getResult<DominatorTreeAnalysis>(F);
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auto *TLI = TM->getSubtargetImpl(F)->getTargetLowering();
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InterleavedAccessImpl Impl(DT, TLI);
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bool Changed = Impl.runOnFunction(F);
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if (!Changed)
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return PreservedAnalyses::all();
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PreservedAnalyses PA;
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PA.preserveSet<CFGAnalyses>();
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return PA;
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}
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char InterleavedAccess::ID = 0;
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bool InterleavedAccess::runOnFunction(Function &F) {
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if (skipFunction(F))
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return false;
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auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();
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if (!TPC || !LowerInterleavedAccesses)
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return false;
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LLVM_DEBUG(dbgs() << "*** " << getPassName() << ": " << F.getName() << "\n");
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Impl.DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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auto &TM = TPC->getTM<TargetMachine>();
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Impl.TLI = TM.getSubtargetImpl(F)->getTargetLowering();
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Impl.MaxFactor = Impl.TLI->getMaxSupportedInterleaveFactor();
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return Impl.runOnFunction(F);
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}
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INITIALIZE_PASS_BEGIN(InterleavedAccess, DEBUG_TYPE,
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"Lower interleaved memory accesses to target specific intrinsics", false,
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false)
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INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
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INITIALIZE_PASS_END(InterleavedAccess, DEBUG_TYPE,
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"Lower interleaved memory accesses to target specific intrinsics", false,
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false)
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FunctionPass *llvm::createInterleavedAccessPass() {
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return new InterleavedAccess();
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}
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/// Check if the mask is a DE-interleave mask for an interleaved load.
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///
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/// E.g. DE-interleave masks (Factor = 2) could be:
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/// <0, 2, 4, 6> (mask of index 0 to extract even elements)
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/// <1, 3, 5, 7> (mask of index 1 to extract odd elements)
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static bool isDeInterleaveMask(ArrayRef<int> Mask, unsigned &Factor,
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unsigned &Index, unsigned MaxFactor,
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unsigned NumLoadElements) {
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if (Mask.size() < 2)
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return false;
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// Check potential Factors.
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for (Factor = 2; Factor <= MaxFactor; Factor++) {
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// Make sure we don't produce a load wider than the input load.
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if (Mask.size() * Factor > NumLoadElements)
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return false;
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if (ShuffleVectorInst::isDeInterleaveMaskOfFactor(Mask, Factor, Index))
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return true;
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}
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return false;
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}
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/// Check if the mask can be used in an interleaved store.
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//
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/// It checks for a more general pattern than the RE-interleave mask.
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/// I.e. <x, y, ... z, x+1, y+1, ...z+1, x+2, y+2, ...z+2, ...>
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/// E.g. For a Factor of 2 (LaneLen=4): <4, 32, 5, 33, 6, 34, 7, 35>
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/// E.g. For a Factor of 3 (LaneLen=4): <4, 32, 16, 5, 33, 17, 6, 34, 18, 7, 35, 19>
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/// E.g. For a Factor of 4 (LaneLen=2): <8, 2, 12, 4, 9, 3, 13, 5>
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///
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/// The particular case of an RE-interleave mask is:
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/// I.e. <0, LaneLen, ... , LaneLen*(Factor - 1), 1, LaneLen + 1, ...>
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/// E.g. For a Factor of 2 (LaneLen=4): <0, 4, 1, 5, 2, 6, 3, 7>
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static bool isReInterleaveMask(ShuffleVectorInst *SVI, unsigned &Factor,
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unsigned MaxFactor) {
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unsigned NumElts = SVI->getShuffleMask().size();
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if (NumElts < 4)
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return false;
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// Check potential Factors.
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for (Factor = 2; Factor <= MaxFactor; Factor++) {
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if (SVI->isInterleave(Factor))
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return true;
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}
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return false;
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}
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static Value *getMaskOperand(IntrinsicInst *II) {
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switch (II->getIntrinsicID()) {
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default:
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llvm_unreachable("Unexpected intrinsic");
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case Intrinsic::vp_load:
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return II->getOperand(1);
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case Intrinsic::masked_load:
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return II->getOperand(2);
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case Intrinsic::vp_store:
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return II->getOperand(2);
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case Intrinsic::masked_store:
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return II->getOperand(3);
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}
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}
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// Return the corresponded deinterleaved mask, or nullptr if there is no valid
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// mask.
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static Value *getMask(Value *WideMask, unsigned Factor,
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ElementCount LeafValueEC);
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static Value *getMask(Value *WideMask, unsigned Factor,
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VectorType *LeafValueTy) {
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return getMask(WideMask, Factor, LeafValueTy->getElementCount());
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}
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bool InterleavedAccessImpl::lowerInterleavedLoad(
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Instruction *Load, SmallSetVector<Instruction *, 32> &DeadInsts) {
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if (isa<ScalableVectorType>(Load->getType()))
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return false;
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auto *LI = dyn_cast<LoadInst>(Load);
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auto *II = dyn_cast<IntrinsicInst>(Load);
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if (!LI && !II)
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return false;
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if (LI && !LI->isSimple())
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return false;
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// Check if all users of this load are shufflevectors. If we encounter any
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// users that are extractelement instructions or binary operators, we save
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// them to later check if they can be modified to extract from one of the
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// shufflevectors instead of the load.
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SmallVector<ShuffleVectorInst *, 4> Shuffles;
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SmallVector<ExtractElementInst *, 4> Extracts;
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// BinOpShuffles need to be handled a single time in case both operands of the
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// binop are the same load.
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SmallSetVector<ShuffleVectorInst *, 4> BinOpShuffles;
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for (auto *User : Load->users()) {
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auto *Extract = dyn_cast<ExtractElementInst>(User);
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if (Extract && isa<ConstantInt>(Extract->getIndexOperand())) {
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Extracts.push_back(Extract);
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continue;
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}
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if (auto *BI = dyn_cast<BinaryOperator>(User)) {
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if (!BI->user_empty() && all_of(BI->users(), [](auto *U) {
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auto *SVI = dyn_cast<ShuffleVectorInst>(U);
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return SVI && isa<UndefValue>(SVI->getOperand(1));
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})) {
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for (auto *SVI : BI->users())
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BinOpShuffles.insert(cast<ShuffleVectorInst>(SVI));
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continue;
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}
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}
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auto *SVI = dyn_cast<ShuffleVectorInst>(User);
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if (!SVI || !isa<UndefValue>(SVI->getOperand(1)))
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return false;
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Shuffles.push_back(SVI);
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}
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if (Shuffles.empty() && BinOpShuffles.empty())
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return false;
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unsigned Factor, Index;
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unsigned NumLoadElements =
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cast<FixedVectorType>(Load->getType())->getNumElements();
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auto *FirstSVI = Shuffles.size() > 0 ? Shuffles[0] : BinOpShuffles[0];
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// Check if the first shufflevector is DE-interleave shuffle.
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if (!isDeInterleaveMask(FirstSVI->getShuffleMask(), Factor, Index, MaxFactor,
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NumLoadElements))
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return false;
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// Holds the corresponding index for each DE-interleave shuffle.
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SmallVector<unsigned, 4> Indices;
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VectorType *VecTy = cast<VectorType>(FirstSVI->getType());
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// Check if other shufflevectors are also DE-interleaved of the same type
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// and factor as the first shufflevector.
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for (auto *Shuffle : Shuffles) {
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if (Shuffle->getType() != VecTy)
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return false;
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if (!ShuffleVectorInst::isDeInterleaveMaskOfFactor(
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Shuffle->getShuffleMask(), Factor, Index))
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return false;
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assert(Shuffle->getShuffleMask().size() <= NumLoadElements);
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Indices.push_back(Index);
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}
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for (auto *Shuffle : BinOpShuffles) {
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if (Shuffle->getType() != VecTy)
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return false;
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if (!ShuffleVectorInst::isDeInterleaveMaskOfFactor(
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Shuffle->getShuffleMask(), Factor, Index))
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return false;
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assert(Shuffle->getShuffleMask().size() <= NumLoadElements);
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if (cast<Instruction>(Shuffle->getOperand(0))->getOperand(0) == Load)
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Indices.push_back(Index);
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if (cast<Instruction>(Shuffle->getOperand(0))->getOperand(1) == Load)
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Indices.push_back(Index);
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}
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// Try and modify users of the load that are extractelement instructions to
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// use the shufflevector instructions instead of the load.
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if (!tryReplaceExtracts(Extracts, Shuffles))
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return false;
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bool BinOpShuffleChanged =
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replaceBinOpShuffles(BinOpShuffles.getArrayRef(), Shuffles, Load);
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Value *Mask = nullptr;
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if (LI) {
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LLVM_DEBUG(dbgs() << "IA: Found an interleaved load: " << *Load << "\n");
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} else {
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// Check mask operand. Handle both all-true/false and interleaved mask.
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Mask = getMask(getMaskOperand(II), Factor, VecTy);
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if (!Mask)
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return false;
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LLVM_DEBUG(dbgs() << "IA: Found an interleaved vp.load or masked.load: "
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<< *Load << "\n");
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}
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// Try to create target specific intrinsics to replace the load and
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// shuffles.
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if (!TLI->lowerInterleavedLoad(cast<Instruction>(Load), Mask, Shuffles,
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Indices, Factor))
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// If Extracts is not empty, tryReplaceExtracts made changes earlier.
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return !Extracts.empty() || BinOpShuffleChanged;
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DeadInsts.insert_range(Shuffles);
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DeadInsts.insert(Load);
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return true;
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}
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bool InterleavedAccessImpl::replaceBinOpShuffles(
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ArrayRef<ShuffleVectorInst *> BinOpShuffles,
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SmallVectorImpl<ShuffleVectorInst *> &Shuffles, Instruction *Load) {
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for (auto *SVI : BinOpShuffles) {
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BinaryOperator *BI = cast<BinaryOperator>(SVI->getOperand(0));
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Type *BIOp0Ty = BI->getOperand(0)->getType();
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ArrayRef<int> Mask = SVI->getShuffleMask();
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assert(all_of(Mask, [&](int Idx) {
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return Idx < (int)cast<FixedVectorType>(BIOp0Ty)->getNumElements();
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}));
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BasicBlock::iterator insertPos = SVI->getIterator();
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auto *NewSVI1 =
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new ShuffleVectorInst(BI->getOperand(0), PoisonValue::get(BIOp0Ty),
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Mask, SVI->getName(), insertPos);
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auto *NewSVI2 = new ShuffleVectorInst(
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BI->getOperand(1), PoisonValue::get(BI->getOperand(1)->getType()), Mask,
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SVI->getName(), insertPos);
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BinaryOperator *NewBI = BinaryOperator::CreateWithCopiedFlags(
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BI->getOpcode(), NewSVI1, NewSVI2, BI, BI->getName(), insertPos);
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SVI->replaceAllUsesWith(NewBI);
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LLVM_DEBUG(dbgs() << " Replaced: " << *BI << "\n And : " << *SVI
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<< "\n With : " << *NewSVI1 << "\n And : "
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<< *NewSVI2 << "\n And : " << *NewBI << "\n");
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RecursivelyDeleteTriviallyDeadInstructions(SVI);
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if (NewSVI1->getOperand(0) == Load)
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Shuffles.push_back(NewSVI1);
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if (NewSVI2->getOperand(0) == Load)
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Shuffles.push_back(NewSVI2);
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}
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return !BinOpShuffles.empty();
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}
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bool InterleavedAccessImpl::tryReplaceExtracts(
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ArrayRef<ExtractElementInst *> Extracts,
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ArrayRef<ShuffleVectorInst *> Shuffles) {
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// If there aren't any extractelement instructions to modify, there's nothing
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// to do.
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if (Extracts.empty())
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return true;
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// Maps extractelement instructions to vector-index pairs. The extractlement
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// instructions will be modified to use the new vector and index operands.
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DenseMap<ExtractElementInst *, std::pair<Value *, int>> ReplacementMap;
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for (auto *Extract : Extracts) {
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// The vector index that is extracted.
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auto *IndexOperand = cast<ConstantInt>(Extract->getIndexOperand());
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auto Index = IndexOperand->getSExtValue();
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// Look for a suitable shufflevector instruction. The goal is to modify the
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// extractelement instruction (which uses an interleaved load) to use one
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// of the shufflevector instructions instead of the load.
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for (auto *Shuffle : Shuffles) {
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// If the shufflevector instruction doesn't dominate the extract, we
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// can't create a use of it.
|
|
if (!DT->dominates(Shuffle, Extract))
|
|
continue;
|
|
|
|
// Inspect the indices of the shufflevector instruction. If the shuffle
|
|
// selects the same index that is extracted, we can modify the
|
|
// extractelement instruction.
|
|
SmallVector<int, 4> Indices;
|
|
Shuffle->getShuffleMask(Indices);
|
|
for (unsigned I = 0; I < Indices.size(); ++I)
|
|
if (Indices[I] == Index) {
|
|
assert(Extract->getOperand(0) == Shuffle->getOperand(0) &&
|
|
"Vector operations do not match");
|
|
ReplacementMap[Extract] = std::make_pair(Shuffle, I);
|
|
break;
|
|
}
|
|
|
|
// If we found a suitable shufflevector instruction, stop looking.
|
|
if (ReplacementMap.count(Extract))
|
|
break;
|
|
}
|
|
|
|
// If we did not find a suitable shufflevector instruction, the
|
|
// extractelement instruction cannot be modified, so we must give up.
|
|
if (!ReplacementMap.count(Extract))
|
|
return false;
|
|
}
|
|
|
|
// Finally, perform the replacements.
|
|
IRBuilder<> Builder(Extracts[0]->getContext());
|
|
for (auto &Replacement : ReplacementMap) {
|
|
auto *Extract = Replacement.first;
|
|
auto *Vector = Replacement.second.first;
|
|
auto Index = Replacement.second.second;
|
|
Builder.SetInsertPoint(Extract);
|
|
Extract->replaceAllUsesWith(Builder.CreateExtractElement(Vector, Index));
|
|
Extract->eraseFromParent();
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
bool InterleavedAccessImpl::lowerInterleavedStore(
|
|
Instruction *Store, SmallSetVector<Instruction *, 32> &DeadInsts) {
|
|
Value *StoredValue;
|
|
auto *SI = dyn_cast<StoreInst>(Store);
|
|
auto *II = dyn_cast<IntrinsicInst>(Store);
|
|
if (SI) {
|
|
if (!SI->isSimple())
|
|
return false;
|
|
StoredValue = SI->getValueOperand();
|
|
} else {
|
|
assert(II->getIntrinsicID() == Intrinsic::vp_store ||
|
|
II->getIntrinsicID() == Intrinsic::masked_store);
|
|
StoredValue = II->getArgOperand(0);
|
|
}
|
|
|
|
auto *SVI = dyn_cast<ShuffleVectorInst>(StoredValue);
|
|
if (!SVI || !SVI->hasOneUse() || isa<ScalableVectorType>(SVI->getType()))
|
|
return false;
|
|
|
|
unsigned NumStoredElements =
|
|
cast<FixedVectorType>(SVI->getType())->getNumElements();
|
|
// Check if the shufflevector is RE-interleave shuffle.
|
|
unsigned Factor;
|
|
if (!isReInterleaveMask(SVI, Factor, MaxFactor))
|
|
return false;
|
|
assert(NumStoredElements % Factor == 0 &&
|
|
"number of stored element should be a multiple of Factor");
|
|
|
|
Value *Mask = nullptr;
|
|
if (SI) {
|
|
LLVM_DEBUG(dbgs() << "IA: Found an interleaved store: " << *Store << "\n");
|
|
} else {
|
|
// Check mask operand. Handle both all-true/false and interleaved mask.
|
|
unsigned LaneMaskLen = NumStoredElements / Factor;
|
|
Mask = getMask(getMaskOperand(II), Factor,
|
|
ElementCount::getFixed(LaneMaskLen));
|
|
if (!Mask)
|
|
return false;
|
|
|
|
LLVM_DEBUG(dbgs() << "IA: Found an interleaved vp.store or masked.store: "
|
|
<< *Store << "\n");
|
|
}
|
|
|
|
// Try to create target specific intrinsics to replace the store and
|
|
// shuffle.
|
|
if (!TLI->lowerInterleavedStore(Store, Mask, SVI, Factor))
|
|
return false;
|
|
|
|
// Already have a new target specific interleaved store. Erase the old store.
|
|
DeadInsts.insert(Store);
|
|
DeadInsts.insert(SVI);
|
|
return true;
|
|
}
|
|
|
|
static Value *getMask(Value *WideMask, unsigned Factor,
|
|
ElementCount LeafValueEC) {
|
|
if (auto *IMI = dyn_cast<IntrinsicInst>(WideMask)) {
|
|
if (unsigned F = getInterleaveIntrinsicFactor(IMI->getIntrinsicID());
|
|
F && F == Factor && llvm::all_equal(IMI->args())) {
|
|
return IMI->getArgOperand(0);
|
|
}
|
|
}
|
|
|
|
if (auto *ConstMask = dyn_cast<Constant>(WideMask)) {
|
|
if (auto *Splat = ConstMask->getSplatValue())
|
|
// All-ones or all-zeros mask.
|
|
return ConstantVector::getSplat(LeafValueEC, Splat);
|
|
|
|
if (LeafValueEC.isFixed()) {
|
|
unsigned LeafMaskLen = LeafValueEC.getFixedValue();
|
|
SmallVector<Constant *, 8> LeafMask(LeafMaskLen, nullptr);
|
|
// If this is a fixed-length constant mask, each lane / leaf has to
|
|
// use the same mask. This is done by checking if every group with Factor
|
|
// number of elements in the interleaved mask has homogeneous values.
|
|
for (unsigned Idx = 0U; Idx < LeafMaskLen * Factor; ++Idx) {
|
|
Constant *C = ConstMask->getAggregateElement(Idx);
|
|
if (LeafMask[Idx / Factor] && LeafMask[Idx / Factor] != C)
|
|
return nullptr;
|
|
LeafMask[Idx / Factor] = C;
|
|
}
|
|
|
|
return ConstantVector::get(LeafMask);
|
|
}
|
|
}
|
|
|
|
if (auto *SVI = dyn_cast<ShuffleVectorInst>(WideMask)) {
|
|
// Check that the shuffle mask is: a) an interleave, b) all of the same
|
|
// set of the elements, and c) contained by the first source. (c) could
|
|
// be relaxed if desired.
|
|
unsigned NumSrcElts =
|
|
cast<FixedVectorType>(SVI->getOperand(1)->getType())->getNumElements();
|
|
SmallVector<unsigned> StartIndexes;
|
|
if (ShuffleVectorInst::isInterleaveMask(SVI->getShuffleMask(), Factor,
|
|
NumSrcElts * 2, StartIndexes) &&
|
|
llvm::all_of(StartIndexes, [](unsigned Start) { return Start == 0; }) &&
|
|
llvm::all_of(SVI->getShuffleMask(), [&NumSrcElts](int Idx) {
|
|
return Idx < (int)NumSrcElts;
|
|
})) {
|
|
auto *LeafMaskTy =
|
|
VectorType::get(Type::getInt1Ty(SVI->getContext()), LeafValueEC);
|
|
IRBuilder<> Builder(SVI);
|
|
return Builder.CreateExtractVector(LeafMaskTy, SVI->getOperand(0),
|
|
uint64_t(0));
|
|
}
|
|
}
|
|
|
|
return nullptr;
|
|
}
|
|
|
|
bool InterleavedAccessImpl::lowerDeinterleaveIntrinsic(
|
|
IntrinsicInst *DI, SmallSetVector<Instruction *, 32> &DeadInsts) {
|
|
Instruction *LoadedVal = dyn_cast<Instruction>(DI->getOperand(0));
|
|
if (!LoadedVal || !LoadedVal->hasOneUse())
|
|
return false;
|
|
|
|
auto *LI = dyn_cast<LoadInst>(LoadedVal);
|
|
auto *II = dyn_cast<IntrinsicInst>(LoadedVal);
|
|
if (!LI && !II)
|
|
return false;
|
|
|
|
const unsigned Factor = getDeinterleaveIntrinsicFactor(DI->getIntrinsicID());
|
|
assert(Factor && "unexpected deinterleave intrinsic");
|
|
|
|
Value *Mask = nullptr;
|
|
if (LI) {
|
|
if (!LI->isSimple())
|
|
return false;
|
|
|
|
LLVM_DEBUG(dbgs() << "IA: Found a load with deinterleave intrinsic " << *DI
|
|
<< " and factor = " << Factor << "\n");
|
|
} else {
|
|
assert(II);
|
|
if (II->getIntrinsicID() != Intrinsic::masked_load &&
|
|
II->getIntrinsicID() != Intrinsic::vp_load)
|
|
return false;
|
|
|
|
// Check mask operand. Handle both all-true/false and interleaved mask.
|
|
Mask = getMask(getMaskOperand(II), Factor, getDeinterleavedVectorType(DI));
|
|
if (!Mask)
|
|
return false;
|
|
|
|
LLVM_DEBUG(dbgs() << "IA: Found a vp.load or masked.load with deinterleave"
|
|
<< " intrinsic " << *DI << " and factor = "
|
|
<< Factor << "\n");
|
|
}
|
|
|
|
// Try and match this with target specific intrinsics.
|
|
if (!TLI->lowerDeinterleaveIntrinsicToLoad(LoadedVal, Mask, DI))
|
|
return false;
|
|
|
|
DeadInsts.insert(DI);
|
|
// We now have a target-specific load, so delete the old one.
|
|
DeadInsts.insert(LoadedVal);
|
|
return true;
|
|
}
|
|
|
|
bool InterleavedAccessImpl::lowerInterleaveIntrinsic(
|
|
IntrinsicInst *IntII, SmallSetVector<Instruction *, 32> &DeadInsts) {
|
|
if (!IntII->hasOneUse())
|
|
return false;
|
|
Instruction *StoredBy = dyn_cast<Instruction>(IntII->user_back());
|
|
if (!StoredBy)
|
|
return false;
|
|
auto *SI = dyn_cast<StoreInst>(StoredBy);
|
|
auto *II = dyn_cast<IntrinsicInst>(StoredBy);
|
|
if (!SI && !II)
|
|
return false;
|
|
|
|
SmallVector<Value *, 8> InterleaveValues(IntII->args());
|
|
const unsigned Factor = getInterleaveIntrinsicFactor(IntII->getIntrinsicID());
|
|
assert(Factor && "unexpected interleave intrinsic");
|
|
|
|
Value *Mask = nullptr;
|
|
if (II) {
|
|
if (II->getIntrinsicID() != Intrinsic::masked_store &&
|
|
II->getIntrinsicID() != Intrinsic::vp_store)
|
|
return false;
|
|
// Check mask operand. Handle both all-true/false and interleaved mask.
|
|
Mask = getMask(getMaskOperand(II), Factor,
|
|
cast<VectorType>(InterleaveValues[0]->getType()));
|
|
if (!Mask)
|
|
return false;
|
|
|
|
LLVM_DEBUG(dbgs() << "IA: Found a vp.store or masked.store with interleave"
|
|
<< " intrinsic " << *IntII << " and factor = "
|
|
<< Factor << "\n");
|
|
} else {
|
|
if (!SI->isSimple())
|
|
return false;
|
|
|
|
LLVM_DEBUG(dbgs() << "IA: Found a store with interleave intrinsic "
|
|
<< *IntII << " and factor = " << Factor << "\n");
|
|
}
|
|
|
|
// Try and match this with target specific intrinsics.
|
|
if (!TLI->lowerInterleaveIntrinsicToStore(StoredBy, Mask, InterleaveValues))
|
|
return false;
|
|
|
|
// We now have a target-specific store, so delete the old one.
|
|
DeadInsts.insert(StoredBy);
|
|
DeadInsts.insert(IntII);
|
|
return true;
|
|
}
|
|
|
|
bool InterleavedAccessImpl::runOnFunction(Function &F) {
|
|
// Holds dead instructions that will be erased later.
|
|
SmallSetVector<Instruction *, 32> DeadInsts;
|
|
bool Changed = false;
|
|
|
|
using namespace PatternMatch;
|
|
for (auto &I : instructions(F)) {
|
|
if (match(&I, m_CombineOr(m_Load(m_Value()),
|
|
m_Intrinsic<Intrinsic::vp_load>())) ||
|
|
match(&I, m_Intrinsic<Intrinsic::masked_load>()))
|
|
Changed |= lowerInterleavedLoad(&I, DeadInsts);
|
|
|
|
if (match(&I, m_CombineOr(m_Store(m_Value(), m_Value()),
|
|
m_Intrinsic<Intrinsic::vp_store>())) ||
|
|
match(&I, m_Intrinsic<Intrinsic::masked_store>()))
|
|
Changed |= lowerInterleavedStore(&I, DeadInsts);
|
|
|
|
if (auto *II = dyn_cast<IntrinsicInst>(&I)) {
|
|
if (getDeinterleaveIntrinsicFactor(II->getIntrinsicID()))
|
|
Changed |= lowerDeinterleaveIntrinsic(II, DeadInsts);
|
|
else if (getInterleaveIntrinsicFactor(II->getIntrinsicID()))
|
|
Changed |= lowerInterleaveIntrinsic(II, DeadInsts);
|
|
}
|
|
}
|
|
|
|
for (auto *I : DeadInsts)
|
|
I->eraseFromParent();
|
|
|
|
return Changed;
|
|
}
|