f0ea9c9cec
We often see code like the following after running SCCP:
switch (x) { case 42: phi(42, ...); }
This tends to produce bad code as we currently materialize the constant
phi-argument in the switch-block. This increases register pressure and
if the pattern repeats for `n` case statements, we end up generating `n`
constant values.
This changes CodeGenPrepare to catch this pattern and revert it back to:
switch (x) { case 42: phi(x, ...); }
Differential Revision: https://reviews.llvm.org/D124552
181 lines
5.1 KiB
LLVM
181 lines
5.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc %s -o - -mtriple=x86_64-- | FileCheck %s
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@g = global i32 0
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@effect = global i32 0
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define void @switch_phi_const(i32 %x) {
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; CHECK-LABEL: switch_phi_const:
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; CHECK: # %bb.0: # %bb0
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: leal -1(%rdi), %ecx
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; CHECK-NEXT: cmpl $54, %ecx
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; CHECK-NEXT: ja .LBB0_8
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; CHECK-NEXT: # %bb.1: # %bb0
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8)
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; CHECK-NEXT: .LBB0_2: # %case_7
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; CHECK-NEXT: movq g@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movl (%rax), %edi
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; CHECK-NEXT: movq effect@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movl $7, (%rax)
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; CHECK-NEXT: .LBB0_3: # %case_1_loop
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; CHECK-NEXT: movq effect@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movl $1, (%rax)
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; CHECK-NEXT: .LBB0_4: # %case_5
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; CHECK-NEXT: movq effect@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movl $5, (%rax)
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; CHECK-NEXT: .LBB0_5: # %case_13
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; CHECK-NEXT: movq effect@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movl $13, (%rax)
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; CHECK-NEXT: .LBB0_6: # %case_42
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; CHECK-NEXT: movq effect@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movl %edi, (%rax)
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; CHECK-NEXT: movl $55, %eax
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; CHECK-NEXT: .LBB0_7: # %case_55
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; CHECK-NEXT: movq effect@GOTPCREL(%rip), %rcx
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; CHECK-NEXT: movl %eax, (%rcx)
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; CHECK-NEXT: .LBB0_8: # %default
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; CHECK-NEXT: retq
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bb0:
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switch i32 %x, label %default [
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i32 1, label %case_1_loop
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i32 5, label %case_5
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i32 7, label %case_7
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i32 13, label %case_13
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i32 42, label %case_42
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i32 55, label %case_55
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]
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case_1_loop:
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; We should replace 1 with %x
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%x0 = phi i32 [ 1, %bb0 ], [ %x5, %case_7 ]
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store i32 1, i32* @effect, align 4
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br label %case_5
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case_5:
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; We should replace 5 with %x
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%x1 = phi i32 [ 5, %bb0 ], [ %x0, %case_1_loop ]
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store i32 5, i32* @effect, align 4
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br label %case_13
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case_13:
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; We should replace 13 with %x
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%x2 = phi i32 [ 13, %bb0 ], [ %x1, %case_5 ]
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store i32 13, i32* @effect, align 4
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br label %case_42
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case_42:
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; We should replace 42 with %x
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%x3 = phi i32 [ 42, %bb0 ], [ %x2, %case_13 ]
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store i32 %x3, i32* @effect, align 4
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br label %case_55
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case_55:
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; We must not replace any of the PHI arguments!
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%x4 = phi i32 [ 42, %bb0 ], [ 55, %case_42 ]
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store i32 %x4, i32* @effect, align 4
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br label %default
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case_7:
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%x5 = load i32, i32* @g, align 4
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store i32 7, i32* @effect, align 4
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br label %case_1_loop
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default:
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ret void
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}
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@g64 = global i64 0
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@effect64 = global i64 0
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define void @switch_trunc_phi_const(i32 %x) {
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; CHECK-LABEL: switch_trunc_phi_const:
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; CHECK: # %bb.0: # %bb0
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; CHECK-NEXT: movzbl %dil, %r8d
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; CHECK-NEXT: movl $3895, %ecx # imm = 0xF37
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; CHECK-NEXT: movl $42, %esi
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; CHECK-NEXT: movl $13, %edx
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; CHECK-NEXT: movl $5, %edi
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: decl %r8d
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; CHECK-NEXT: cmpl $54, %r8d
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; CHECK-NEXT: ja .LBB1_8
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; CHECK-NEXT: # %bb.1: # %bb0
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; CHECK-NEXT: jmpq *.LJTI1_0(,%r8,8)
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; CHECK-NEXT: .LBB1_8: # %default
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB1_2: # %case_1_loop
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; CHECK-NEXT: movq effect64@GOTPCREL(%rip), %rcx
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; CHECK-NEXT: movq $1, (%rcx)
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; CHECK-NEXT: movq %rax, %rdi
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; CHECK-NEXT: .LBB1_3: # %case_5
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; CHECK-NEXT: movq effect64@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movq $5, (%rax)
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; CHECK-NEXT: movq %rdi, %rdx
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; CHECK-NEXT: .LBB1_4: # %case_13
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; CHECK-NEXT: movq effect64@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movq $13, (%rax)
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; CHECK-NEXT: movq %rdx, %rsi
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; CHECK-NEXT: .LBB1_5: # %case_42
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; CHECK-NEXT: movq effect64@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movq %rsi, (%rax)
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; CHECK-NEXT: movl $55, %ecx
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; CHECK-NEXT: .LBB1_6: # %case_55
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; CHECK-NEXT: movq effect64@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movq %rcx, (%rax)
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; CHECK-NEXT: .LBB1_7: # %case_7
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; CHECK-NEXT: movq g64@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movq (%rax), %rax
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; CHECK-NEXT: movq effect64@GOTPCREL(%rip), %rcx
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; CHECK-NEXT: movq $7, (%rcx)
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; CHECK-NEXT: jmp .LBB1_2
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bb0:
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%x_trunc = trunc i32 %x to i8
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switch i8 %x_trunc, label %default [
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i8 1, label %case_1_loop
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i8 5, label %case_5
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i8 7, label %case_7
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i8 13, label %case_13
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i8 42, label %case_42
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i8 55, label %case_55
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]
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case_1_loop:
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; We should replace 1 with %x
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%x0 = phi i64 [ 1, %bb0 ], [ %x5, %case_7 ]
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store i64 1, i64* @effect64, align 4
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br label %case_5
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case_5:
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; We should replace 5 with %x
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%x1 = phi i64 [ 5, %bb0 ], [ %x0, %case_1_loop ]
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store i64 5, i64* @effect64, align 4
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br label %case_13
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case_13:
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; We should replace 13 with %x
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%x2 = phi i64 [ 13, %bb0 ], [ %x1, %case_5 ]
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store i64 13, i64* @effect64, align 4
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br label %case_42
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case_42:
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; We should replace 42 with %x
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%x3 = phi i64 [ 42, %bb0 ], [ %x2, %case_13 ]
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store i64 %x3, i64* @effect64, align 4
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br label %case_55
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case_55:
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; We must not replace any of the PHI arguments! (3898 == 0xf00 + 55)
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%x4 = phi i64 [ 3895, %bb0 ], [ 55, %case_42 ]
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store i64 %x4, i64* @effect64, align 4
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br label %case_7
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case_7:
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%x5 = load i64, i64* @g64, align 4
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store i64 7, i64* @effect64, align 4
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br label %case_1_loop
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default:
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ret void
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}
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