0a3ee7de9c
When moving fcti results from float registers to normal registers through memory, even though MPI was adjusted to account for endianness, FIPtr was always adjusted for big-endian, which caused loads of wrong half of a value in little-endian mode.
18 lines
895 B
LLVM
18 lines
895 B
LLVM
; RUN: llc < %s -mcpu=440 -mtriple=ppc32le-unknown-unknown | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
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; RUN: llc < %s -mcpu=440 -mtriple=ppc32-unknown-unknown | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
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define i32 @foo(double %a) {
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; CHECK-LABEL: foo:
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; CHECK-DAG: fctiwz [[FPR_1_i:[0-9]+]], {{[0-9]+}}
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; CHECK-DAG: stfd [[FPR_1_i]], [[#%u,VAL1_ADDR:]](1)
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; CHECK-LE-DAG: lwz {{[0-9]+}}, [[#%u,== VAL1_ADDR]](1)
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; CHECK-BE-DAG: lwz {{[0-9]+}}, [[#%u,== VAL1_ADDR + 4]](1)
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; CHECK-DAG: fctiwz [[FPR_2:[0-9]+]], {{[0-9]+}}
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; CHECK-DAG: stfd [[FPR_2]], [[#%u,VAL2_ADDR:]](1)
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; CHECK-LE-DAG: lwz {{[0-9]+}}, [[#%u,== VAL2_ADDR]](1)
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; CHECK-BE-DAG: lwz {{[0-9]+}}, [[#%u,== VAL2_ADDR + 4]](1)
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entry:
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%tmp.1 = fptoui double %a to i32 ; <i32> [#uses=1]
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ret i32 %tmp.1
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}
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