llvm-project

AsmParser

[AArch64] Use MCRegister in more places. NFC

2024-09-23 10:24:48 -07:00

Disassembler

[NFC] [AArch64] Refactor predicate register class decode functions (#97412 )

2024-07-15 16:57:42 +01:00

GISel

[AArch64][GlobalISel] Prefer to use Vector Truncate (#105692 )

2024-09-23 13:52:37 +01:00

MCTargetDesc

[AArch64] Use MCRegister in more places. NFC

2024-09-23 10:24:48 -07:00

TargetInfo

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Utils

[AArch64] Use MCRegister in more places. NFC

2024-09-23 10:24:48 -07:00

AArch64.h

[AArch64] Add SME peephole optimizer pass (#104612 )

2024-08-21 09:44:01 +01:00

AArch64.td

[AArch64] Initial sched model for Neoverse N3 (#106371 )

2024-09-19 19:22:24 +01:00

AArch64A53Fix835769.cpp

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AArch64A57FPLoadBalancing.cpp

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AArch64AdvSIMDScalarPass.cpp

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AArch64Arm64ECCallLowering.cpp

[CodeGen][ARM64EC] Use alias symbol for exporting hybrid_patchable functions. (#100872 )

2024-07-30 14:22:50 +02:00

AArch64AsmPrinter.cpp

[PAC][CodeGen] Do not emit trivial 'mov xN, xN' on tail call (#109100 )

2024-09-19 12:17:58 +03:00

AArch64BranchTargets.cpp

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AArch64CallingConvention.cpp

[DataLayout] Change return type of getStackAlignment to MaybeAlign (#105478 )

2024-08-27 22:59:33 +03:00

AArch64CallingConvention.h

[AArch64] Support preserve_none calling convention (#91046 )

2024-06-03 18:42:08 -04:00

AArch64CallingConvention.td

[AArch64] Basic SVE PCS support for handling scalable vectors on Darwin.

2024-08-20 17:10:51 -07:00

AArch64CleanupLocalDynamicTLSPass.cpp

[CodeGen][NewPM] Split MachineDominatorTree into a concrete analysis result (#94571 )

2024-06-11 21:27:14 +08:00

AArch64CollectLOH.cpp

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AArch64Combine.td

[AArch64][GlobalISel] Prefer to use Vector Truncate (#105692 )

2024-09-23 13:52:37 +01:00

AArch64CompressJumpTables.cpp

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AArch64CondBrTuning.cpp

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AArch64ConditionalCompares.cpp

[Support] Erase blocks after DomTree::eraseNode (#101195 )

2024-07-31 19:20:49 +02:00

AArch64ConditionOptimizer.cpp

[CodeGen][NewPM] Split MachineDominatorTree into a concrete analysis result (#94571 )

2024-06-11 21:27:14 +08:00

AArch64DeadRegisterDefinitionsPass.cpp

[AArch64] Don't replace dst of SWP instructions with (X|W)ZR (#102139 )

2024-08-07 15:15:25 +01:00

AArch64ExpandImm.cpp

[AArch64] Optimize MOV to ORR when load symmetric constants (#86249 )

2024-05-20 09:57:50 +01:00

AArch64ExpandImm.h

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AArch64ExpandPseudoInsts.cpp

Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434 )

2024-08-08 10:58:45 +03:00

AArch64FalkorHWPFFix.cpp

[CodeGen][NewPM] Port machine-loops to new pass manager (#97793 )

2024-07-09 09:11:18 +08:00

AArch64FastISel.cpp

Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434 )

2024-08-08 10:58:45 +03:00

AArch64Features.td

[AArch64] Add a check for invalid default features (#104435 )

2024-08-17 13:36:40 +01:00

AArch64FMV.td

[FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (#108024 )

2024-09-20 19:10:54 +01:00

AArch64FrameLowering.cpp

[AArch64][SME] Fix ADDVL addressing to scavenged stackslot. (#109674 )

2024-09-24 13:29:30 +01:00

AArch64FrameLowering.h

[AArch64] Add streaming-mode stack hazard optimization remarks (#101695 )

2024-08-06 11:39:01 +01:00

AArch64GenRegisterBankInfo.def

[AArch64] Fix || Add brackets for || inside of assert

2024-06-21 09:26:45 +01:00

AArch64GlobalsTagging.cpp

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AArch64InstrAtomics.td

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AArch64InstrFormats.td

[AArch64] Extend and rewrite load zero and load undef patterns (#108185 )

2024-09-19 14:52:52 +01:00

AArch64InstrGISel.td

DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845 )

2024-06-13 11:52:22 +02:00

AArch64InstrInfo.cpp

[AArch64] Remove redundant COPY from loadRegFromStackSlot (#107396 )

2024-09-05 17:54:57 +01:00

AArch64InstrInfo.h

[MachineOutliner][NFC] Refactor (#105398 )

2024-08-27 14:38:36 -07:00

AArch64InstrInfo.td

[AArch64] Extend and rewrite load zero and load undef patterns (#108185 )

2024-09-19 14:52:52 +01:00

AArch64ISelDAGToDAG.cpp

[AArch64] Implement intrinsics for SME2 FAMIN/FAMAX (#99063 )

2024-09-04 15:29:32 +01:00

AArch64ISelLowering.cpp

[LLVM][CodeGen][SVE] Implement nxvf32 fpround to nxvbf16. (#107420 )

2024-09-24 13:15:26 +01:00

AArch64ISelLowering.h

[AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (#107566 )

2024-09-19 14:00:45 +01:00

AArch64LoadStoreOptimizer.cpp

[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968 )

2024-09-17 11:21:23 +01:00

AArch64LowerHomogeneousPrologEpilog.cpp

[IRBuilder] Don't include Module.h (NFC) (#97159 )

2024-06-29 15:05:04 +02:00

AArch64MachineFunctionInfo.cpp

Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434 )

2024-08-08 10:58:45 +03:00

AArch64MachineFunctionInfo.h

Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434 )

2024-08-08 10:58:45 +03:00

AArch64MachineScheduler.cpp

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AArch64MachineScheduler.h

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AArch64MacroFusion.cpp

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AArch64MacroFusion.h

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AArch64MCInstLower.cpp

Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434 )

2024-08-08 10:58:45 +03:00

AArch64MCInstLower.h

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AArch64MIPeepholeOpt.cpp

[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968 )

2024-09-17 11:21:23 +01:00

AArch64PBQPRegAlloc.cpp

[AArch64] Add a AArch64InstrInfo::isFpOrNEON method for checking physical register call. NFC

2024-07-15 08:13:52 +01:00

AArch64PBQPRegAlloc.h

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AArch64PerfectShuffle.h

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AArch64PfmCounters.td

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AArch64PointerAuth.cpp

[PAC] Sign LR with B key for non-leaf functions with ptrauth-returns attr (#100552 )

2024-07-25 22:21:03 +03:00

AArch64PointerAuth.h

[AArch64][PAC][NFC] Make checkAuthenticatedRegister() return void (#92507 )

2024-05-21 13:19:21 -07:00

AArch64PostCoalescerPass.cpp

[CodeGen][NewPM] Port LiveIntervals to new pass manager (#98118 )

2024-07-10 19:34:48 +08:00

AArch64Processors.td

[AArch64] Initial sched model for Neoverse N3 (#106371 )

2024-09-19 19:22:24 +01:00

AArch64PromoteConstant.cpp

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AArch64RedundantCopyElimination.cpp

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AArch64RegisterBanks.td

[AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (#92130 )

2024-05-30 09:10:43 +01:00

AArch64RegisterInfo.cpp

[AArch64] Basic SVE PCS support for handling scalable vectors on Darwin.

2024-08-20 17:10:51 -07:00

AArch64RegisterInfo.h

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AArch64RegisterInfo.td

Add FPMR register and update dependencies of FP8 instructions (#102910 )

2024-08-16 14:05:07 +01:00

AArch64SchedA53.td

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AArch64SchedA55.td

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AArch64SchedA57.td

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AArch64SchedA57WriteRes.td

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AArch64SchedA64FX.td

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AArch64SchedA510.td

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AArch64SchedAmpere1.td

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AArch64SchedAmpere1B.td

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AArch64SchedCyclone.td

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AArch64SchedExynosM3.td

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AArch64SchedExynosM4.td

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AArch64SchedExynosM5.td

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AArch64SchedFalkor.td

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AArch64SchedFalkorDetails.td

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AArch64SchedKryo.td

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AArch64SchedKryoDetails.td

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AArch64SchedNeoverseN1.td

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AArch64SchedNeoverseN2.td

[AArch64] Fix sched model of Neoverse N2 (#106376 )

2024-09-18 09:33:57 +01:00

AArch64SchedNeoverseN3.td

[AArch64] Initial sched model for Neoverse N3 (#106371 )

2024-09-19 19:22:24 +01:00

AArch64SchedNeoverseV1.td

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AArch64SchedNeoverseV2.td

[AArch64] Replace _Ncyc_ with _Nc_ in Neoverse scheduling models.

2024-09-12 14:47:13 +01:00

AArch64SchedOryon.td

[AArch64] Add support for Qualcomm Oryon processor (#91022 )

2024-06-06 07:27:50 -07:00

AArch64SchedPredExynos.td

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AArch64SchedPredicates.td

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AArch64SchedPredNeoverse.td

[AArch64] Fix scheduling model issue #96394 (#97047 )

2024-07-01 11:34:23 +01:00

AArch64SchedThunderX2T99.td

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AArch64SchedThunderX3T110.td

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AArch64SchedThunderX.td

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AArch64SchedTSV110.td

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AArch64Schedule.td

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AArch64SelectionDAGInfo.cpp

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AArch64SelectionDAGInfo.h

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AArch64SIMDInstrOpt.cpp

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AArch64SLSHardening.cpp

Fix MSVC "not all control paths return a value" warning. NFC.

2024-07-10 11:27:23 +01:00

AArch64SMEInstrInfo.td

[AArch64] Add FEAT_SME_B16B16 and remove FEAT_B16B16 (#102501 )

2024-08-12 14:33:11 +01:00

AArch64SpeculationHardening.cpp

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AArch64StackTagging.cpp

[HWASan] add OptimizationRemark for alloca safety (#105872 )

2024-08-29 20:50:51 -07:00

AArch64StackTaggingPreRA.cpp

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AArch64StorePairSuppress.cpp

[LLVM] Use {} instead of std::nullopt to initialize empty ArrayRef (#109133 )

2024-09-19 16:16:38 +01:00

AArch64Subtarget.cpp

[AArch64] Increase scatter overhead on Neoverse-V2 (#101296 )

2024-08-14 10:12:40 +05:30

AArch64Subtarget.h

[AArch64] Increase scatter overhead on Neoverse-V2 (#101296 )

2024-08-14 10:12:40 +05:30

AArch64SVEInstrInfo.td

[LLVM][CodeGen][SVE] Implement nxvf32 fpround to nxvbf16. (#107420 )

2024-09-24 13:15:26 +01:00

AArch64SystemOperands.td

[AArch64] Add support for ACTLR_EL12 system register (#105497 )

2024-08-21 15:15:49 +01:00

AArch64TargetMachine.cpp

Fix cl::desc typos in aarch64-enable-dead-defs and arm-implicit-it. (#106712 )

2024-08-30 19:15:05 +01:00

AArch64TargetMachine.h

Reapply [IR] Lazily initialize the class to pass name mapping (NFC) (#96321 ) (#96462 )

2024-06-24 15:00:11 +02:00

AArch64TargetObjectFile.cpp

[AArch64][PAC] Lower ptrauth constants in code for MachO. (#97665 )

2024-07-10 15:03:17 -07:00

AArch64TargetObjectFile.h

[AArch64][PAC] Lower ptrauth constants in code for MachO. (#97665 )

2024-07-10 15:03:17 -07:00

AArch64TargetTransformInfo.cpp

[LLVM][InstCombine][AArch64] sve.insr(splat(x), x) ==> splat(x) (#109445 )

2024-09-24 15:11:36 +01:00

AArch64TargetTransformInfo.h

[LLVM] Use {} instead of std::nullopt to initialize empty ArrayRef (#109133 )

2024-09-19 16:16:38 +01:00

CMakeLists.txt

[AArch64] Add SME peephole optimizer pass (#104612 )

2024-08-21 09:44:01 +01:00

SMEABIPass.cpp

[IRBuilder] Don't include Module.h (NFC) (#97159 )

2024-06-29 15:05:04 +02:00

SMEInstrFormats.td

Add FPMR register and update dependencies of FP8 instructions (#102910 )

2024-08-16 14:05:07 +01:00

SMEPeepholeOpt.cpp

[AArch64] Add SME peephole optimizer pass (#104612 )

2024-08-21 09:44:01 +01:00

SVEInstrFormats.td

[LLVM][CodeGen][SVE] Implement nxvf32 fpround to nxvbf16. (#107420 )

2024-09-24 13:15:26 +01:00

SVEIntrinsicOpts.cpp

[IRBuilder] Don't include Module.h (NFC) (#97159 )

2024-06-29 15:05:04 +02:00