677177bb60
Fix issue1: In mips1-4, require a minimum of 2 instructions between a mflo/mfhi and the next mul/dmult/div/ddiv/divu/ddivu instruction. Fix issue2: In mips1-4, should not put mflo into the delay slot for the return. Fix https://github.com/llvm/llvm-project/issues/81291
69 lines
2.7 KiB
C++
69 lines
2.7 KiB
C++
//===-- Mips.h - Top-level interface for Mips representation ----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in
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// the LLVM Mips back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPS_H
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#define LLVM_LIB_TARGET_MIPS_MIPS_H
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#include "MCTargetDesc/MipsMCTargetDesc.h"
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#include "llvm/Target/TargetMachine.h"
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#define IsMFLOMFHI(instr) \
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(instr == Mips::MFLO || instr == Mips::MFLO64 || instr == Mips::MFHI || \
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instr == Mips::MFHI64)
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#define IsDIVMULT(instr) \
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(instr == Mips::SDIV || instr == Mips::PseudoSDIV || instr == Mips::DSDIV || \
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instr == Mips::PseudoDSDIV || instr == Mips::UDIV || \
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instr == Mips::PseudoUDIV || instr == Mips::DUDIV || \
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instr == Mips::PseudoDUDIV || instr == Mips::MULT || \
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instr == Mips::PseudoMULT || instr == Mips::DMULT || \
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instr == Mips::PseudoDMULT)
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namespace llvm {
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class FunctionPass;
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class InstructionSelector;
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class MipsRegisterBankInfo;
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class MipsSubtarget;
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class MipsTargetMachine;
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class MipsTargetMachine;
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class ModulePass;
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class PassRegistry;
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ModulePass *createMipsOs16Pass();
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ModulePass *createMips16HardFloatPass();
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FunctionPass *createMipsModuleISelDagPass();
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FunctionPass *createMipsOptimizePICCallPass();
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FunctionPass *createMipsDelaySlotFillerPass();
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FunctionPass *createMipsBranchExpansion();
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FunctionPass *createMipsConstantIslandPass();
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FunctionPass *createMicroMipsSizeReducePass();
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FunctionPass *createMipsExpandPseudoPass();
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FunctionPass *createMipsPreLegalizeCombiner();
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FunctionPass *createMipsPostLegalizeCombiner(bool IsOptNone);
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FunctionPass *createMipsMulMulBugPass();
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InstructionSelector *
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createMipsInstructionSelector(const MipsTargetMachine &, const MipsSubtarget &,
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const MipsRegisterBankInfo &);
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void initializeMicroMipsSizeReducePass(PassRegistry &);
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void initializeMipsBranchExpansionPass(PassRegistry &);
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void initializeMipsDAGToDAGISelLegacyPass(PassRegistry &);
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void initializeMipsDelaySlotFillerPass(PassRegistry &);
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void initializeMipsMulMulBugFixPass(PassRegistry &);
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void initializeMipsPostLegalizerCombinerPass(PassRegistry &);
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void initializeMipsPreLegalizerCombinerPass(PassRegistry &);
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} // namespace llvm
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#endif
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