0aab344104
This is the `ext_vector_type` alternative to D81083. This patch extends Clang to allow 'bool' as a valid vector element type (attribute ext_vector_type) in C/C++. This is intended as the canonical type for SIMD masks and facilitates clean vector intrinsic declarations. Vectors of i1 are supported on IR level and below down to many SIMD ISAs, such as AVX512, ARM SVE (fixed vector length) and the VE target (NEC SX-Aurora TSUBASA). The RFC on cfe-dev: https://lists.llvm.org/pipermail/cfe-dev/2020-May/065434.html Reviewed By: erichkeane Differential Revision: https://reviews.llvm.org/D88905
81 lines
3.2 KiB
C
81 lines
3.2 KiB
C
// RUN: %clang_cc1 -w -triple x86_64-apple-darwin10 \
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// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=ALL --check-prefix=SSE
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// RUN: %clang_cc1 -w -triple i386-apple-darwin10 \
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// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=ALL --check-prefix=SSE
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// RUN: %clang_cc1 -w -triple x86_64-apple-darwin10 -target-feature +avx \
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// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=ALL --check-prefix=AVX
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// RUN: %clang_cc1 -w -triple i386-apple-darwin10 -target-feature +avx \
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// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=ALL --check-prefix=AVX
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// RUN: %clang_cc1 -w -triple x86_64-apple-darwin10 -target-feature +avx512f \
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// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=ALL --check-prefix=AVX512
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// RUN: %clang_cc1 -w -triple i386-apple-darwin10 -target-feature +avx512f \
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// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=ALL --check-prefix=AVX512
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// rdar://11759609
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// At or below target max alignment with no aligned attribute should align based
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// on the size of vector.
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double __attribute__((vector_size(16))) v1;
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// SSE: @v1 {{.*}}, align 16
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// AVX: @v1 {{.*}}, align 16
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// AVX512: @v1 {{.*}}, align 16
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double __attribute__((vector_size(32))) v2;
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// SSE: @v2 {{.*}}, align 16
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// AVX: @v2 {{.*}}, align 32
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// AVX512: @v2 {{.*}}, align 32
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typedef __attribute__((__ext_vector_type__(16))) _Bool v2b_type;
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v2b_type v2b;
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// ALL: @v2b {{.*}}, align 2
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// Alignment above target max alignment with no aligned attribute should align
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// based on the target max.
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double __attribute__((vector_size(64))) v3;
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// SSE: @v3 {{.*}}, align 16
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// AVX: @v3 {{.*}}, align 32
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// AVX512: @v3 {{.*}}, align 64
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double __attribute__((vector_size(1024))) v4;
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// SSE: @v4 {{.*}}, align 16
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// AVX: @v4 {{.*}}, align 32
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// AVX512: @v4 {{.*}}, align 64
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typedef __attribute__((__ext_vector_type__(8192))) _Bool v4b_type;
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v4b_type v4b;
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// SSE: @v4b {{.*}}, align 16
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// AVX: @v4b {{.*}}, align 32
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// AVX512: @v4b {{.*}}, align 64
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// Aliged attribute should always override.
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double __attribute__((vector_size(16), aligned(16))) v5;
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// ALL: @v5 {{.*}}, align 16
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double __attribute__((vector_size(16), aligned(64))) v6;
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// ALL: @v6 {{.*}}, align 64
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double __attribute__((vector_size(32), aligned(16))) v7;
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// ALL: @v7 {{.*}}, align 16
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double __attribute__((vector_size(32), aligned(64))) v8;
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// ALL: @v8 {{.*}}, align 64
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typedef __attribute__((ext_vector_type(256), aligned(128))) _Bool v8b_type;
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v8b_type v8b;
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// ALL: @v8b {{.*}}, align 128
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// Check non-power of 2 widths.
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double __attribute__((vector_size(24))) v9;
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// SSE: @v9 {{.*}}, align 16
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// AVX: @v9 {{.*}}, align 32
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// AVX512: @v9 {{.*}}, align 32
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double __attribute__((vector_size(40))) v10;
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// SSE: @v10 {{.*}}, align 16
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// AVX: @v10 {{.*}}, align 32
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// AVX512: @v10 {{.*}}, align 64
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typedef __attribute__((ext_vector_type(248))) _Bool v10b_type;
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v10b_type v10b;
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// SSE: @v10b {{.*}}, align 16
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// AVX: @v10b {{.*}}, align 32
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// AVX512: @v10b {{.*}}, align 32
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// Check non-power of 2 widths with aligned attribute.
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double __attribute__((vector_size(24), aligned(64))) v11;
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// ALL: @v11 {{.*}}, align 64
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double __attribute__((vector_size(80), aligned(16))) v12;
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// ALL: @v12 {{.*}}, align 16
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typedef __attribute__((ext_vector_type(248), aligned(4))) _Bool v12b_type;
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v12b_type v12b;
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// ALL: @v12b {{.*}}, align 4
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