shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/test/CodeGen
History
Jay Foad 113aafbf23 [AMDGPU] Clean up SReg classes 
Remove unused LO16 classes SReg_LO16_XM0_XEXEC, SReg_LO16_XEXEC_HI and
SReg_LO16_XM0.

Simplify the definition of SReg_32.

Add SReg_32_XEXEC and use it to improve SReg_1_XEXEC which previously
excluded M0 for no good reason.

Improve SReg_1 which previously excluded EXEC_HI for no good reason.

Differential Revision: https://reviews.llvm.org/D140012
2022-12-14 15:57:56 +00:00
..
AArch64
[TargetLowering] Teach DemandedBits about VSCALE
2022-12-14 15:49:08 +00:00
AMDGPU
[AMDGPU] Clean up SReg classes
2022-12-14 15:57:56 +00:00
ARC
[ARC] Regenerate ldst.ll
2022-10-29 14:09:58 +01:00
ARM
[NFC] Port codegen ARM tests that invoke opt to -passes= syntax
2022-12-09 01:04:46 +03:00
AVR
[AVR] Do not use R0/R1 on avrtiny
2022-11-28 18:05:55 +01:00
BPF
Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."
2022-12-05 12:53:50 -06:00
CSKY
[CSKY][NFC] Fix check-all error due to change of expected output
2022-12-12 11:30:52 +08:00
DirectX
[NFC][DX] Update test case to use new opt flags
2022-12-09 13:16:49 -06:00
Generic
[NFC] Port codegen Generic tests that invoke opt to -passes= syntax
2022-12-09 01:04:47 +03:00
Hexagon
[DAGCombiner] Scalarize extend/truncate for splat vector.
2022-12-12 14:53:10 +08:00
Inputs
…
Lanai
…
LoongArch
[LoongArch] Add custom parser for atomic instructions' memory operand
2022-12-13 11:46:53 +08:00
M68k
Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."
2022-12-05 12:53:50 -06:00
Mips
Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."
2022-12-05 12:53:50 -06:00
MIR
AMDGPU: Remove ImagePSV and move images to addrspace 7
2022-11-30 11:32:34 +01:00
MLRegalloc
Reapply "[mlgo] Dependency-free training mode logger"
2022-12-06 10:29:50 -08:00
MSP430
…
NVPTX
[NVPTX] Backend support for variadic functions
2022-12-13 19:07:43 +03:00
PowerPC
[NFC][PowerPC] Add tests for 64-bit constants that require 5 instructions to materialize.
2022-12-13 02:44:49 -05:00
RISCV
[VP][RISCV] Add vp.ctpop and RISC-V support.
2022-12-14 09:47:44 +08:00
SPARC
[SPARC] Mark the %g0 register as constant & use it to materialize zeros
2022-12-13 17:25:42 -05:00
SPIRV
[SPIRV] support the enqueue_kernel builtin function
2022-11-01 02:52:08 +03:00
SystemZ
[NFC] Port codegen SystemZ tests that invoke opt to -passes= syntax
2022-12-09 01:04:47 +03:00
Thumb
[NFC] Port codegen Thumb tests that invoke opt to -passes= syntax
2022-12-09 01:04:47 +03:00
Thumb2
[NFC] Removal of complex deinterleaving i64 test cases
2022-12-12 12:02:00 +00:00
VE
[SDAG] avoid udiv/urem transform for vector/scalar type mismatches
2022-11-15 11:01:18 -05:00
WebAssembly
[DAGCombine] Fold Splat(bitcast(buildvector(x,..))) to splat(x)
2022-12-12 08:35:43 +00:00
WinCFGuard
…
WinEH
[NFC] Port one more codegen WinEH test to -passes= syntax
2022-12-09 02:07:27 +03:00
X86
[X86] Don't fold scalar_to_vector(i64 C) -> vzext_movl(scalar_to_vector(i32 C))
2022-12-14 12:11:06 +00:00
XCore
Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."
2022-12-05 12:53:50 -06:00