Sanjay Patel 665021e7ee [DAGCombiner] enable vector transforms for any/all {sign} bits set/clear ...

The code already allowed vector types in via "isInteger" (which might want
a more specific name), so use splat-friendly constant predicates to match
those types.

llvm-svn: 299304

2017-04-01 15:05:54 +00:00

..

CMakeLists.txt

[CMake] NFC. Updating CMake dependency specifications

2016-11-17 04:36:50 +00:00

DAGCombiner.cpp

[DAGCombiner] enable vector transforms for any/all {sign} bits set/clear

2017-04-01 15:05:54 +00:00

FastISel.cpp

Rename AttributeSet to AttributeList

2017-03-21 16:57:19 +00:00

FunctionLoweringInfo.cpp

Simplify FunctionLoweringInfo.cpp with range for loops

2016-12-30 00:21:38 +00:00

InstrEmitter.cpp

Removing a redundant assignment

2017-02-14 14:44:01 +00:00

InstrEmitter.h

Pass DebugLoc and SDLoc by const ref.

2016-06-12 15:39:02 +00:00

LegalizeDAG.cpp

Make library calls sensitive to regparm module flag (Fixes PR3997).

2017-03-18 00:44:07 +00:00

LegalizeFloatTypes.cpp

[APInt] Remove references to integerPartWidth outside of APFloat implentation.

2017-03-30 05:49:03 +00:00

LegalizeIntegerTypes.cpp

[DAGTypeLegalizer] Handle widening truncate to vector of i1.

2017-03-21 10:24:14 +00:00

LegalizeTypes.cpp

Make library calls sensitive to regparm module flag (Fixes PR3997).

2017-03-18 00:44:07 +00:00

LegalizeTypes.h

[SelectionDAG] Optimize VSELECT->SETCC of incompatible or illegal types.

2017-03-16 07:17:12 +00:00

LegalizeTypesGeneric.cpp

[SelectionDAG] Optimize VSELECT->SETCC of incompatible or illegal types.

2017-03-16 07:17:12 +00:00

LegalizeVectorOps.cpp

DAG: Do not scalarize fsub if fneg is legal

2017-02-15 22:02:42 +00:00

LegalizeVectorTypes.cpp

[SelectionDAG] Optimize VSELECT->SETCC of incompatible or illegal types.

2017-03-16 07:17:12 +00:00

LLVMBuild.txt

…

ResourcePriorityQueue.cpp

Add iterator_range<regclass_iterator> to {Target,MC}RegisterInfo, NFC

2017-01-25 19:29:04 +00:00

ScheduleDAGFast.cpp

Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef.

2015-12-05 07:13:35 +00:00

ScheduleDAGRRList.cpp

Cleanup dump() functions.

2017-01-28 02:02:38 +00:00

ScheduleDAGSDNodes.cpp

Remove redundant call to GluedNodes.back() [NFC]

2017-02-19 16:56:18 +00:00

ScheduleDAGSDNodes.h

[Target] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

2017-01-11 01:45:03 +00:00

ScheduleDAGVLIW.cpp

…

SDNodeDbgValue.h

Apply clang-tidy's misc-move-constructor-init throughout LLVM.

2016-05-27 14:27:24 +00:00

SelectionDAG.cpp

[DAGCombiner] Add ComputeNumSignBits vector demanded elements support to ASHR and INSERT_VECTOR_ELT

2017-03-31 14:21:50 +00:00

SelectionDAGBuilder.cpp

[SDAG] Remove -enable-fmf-dag

2017-03-28 23:46:14 +00:00

SelectionDAGBuilder.h

[DAG] improve documentation comments; NFC

2017-03-02 20:48:08 +00:00

SelectionDAGDumper.cpp

Revert "Instrument SDISel C++ patterns"

2017-04-01 01:26:17 +00:00

SelectionDAGISel.cpp

[CodeGen] Pass SDAG an ORE, and replace FastISel stats with remarks.

2017-03-30 17:49:58 +00:00

SelectionDAGPrinter.cpp

Make the SelectionDAG graph printer use SDNode::PersistentId labels.

2015-10-27 23:09:03 +00:00

SelectionDAGTargetInfo.cpp

Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/

2016-01-27 16:32:26 +00:00

StatepointLowering.cpp

[Statepoints] Reuse stack slots more than once within a basic block

2016-12-13 01:21:15 +00:00

StatepointLowering.h

[NFC] Header cleanup

2016-04-18 09:17:29 +00:00

TargetLowering.cpp

[DAGCombiner] Add vector demanded elements support to ComputeNumSignBits

2017-03-31 13:54:09 +00:00