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llvm-project/llvm/test/Transforms/LoopStrengthReduce/AArch64
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Graham Hunter e16f2f5d24
[AArch64] Override isLSRCostLess, take number of instructions into account (#84189)
Adds an AArch64-specific version of isLSRCostLess, changing the relative
importance of the various terms from the formulae being evaluated.

This has been split out from my vscale-aware LSR work, see the RFC for
reference:
https://discourse.llvm.org/t/rfc-vscale-aware-loopstrengthreduce/77131
2024-06-06 14:45:36 +01:00
..
lit.local.cfg
…
lsr-ldp.ll
[AArch64] Update generic sched model to A510
2023-08-21 12:25:15 +01:00
lsr-memcpy.ll
[LSR] Don't consider users of constant outside loop
2023-07-13 12:22:38 +02:00
lsr-memset.ll
…
lsr-pre-inc-offset-check.ll
…
lsr-reuse.ll
[AArch64] Override isLSRCostLess, take number of instructions into account (#84189)
2024-06-06 14:45:36 +01:00
postinc-with-fixups-with-different-loops.ll
…
pr47329.ll
…
pr53625.ll
[AArch64] Update generic sched model to A510
2023-08-21 12:25:15 +01:00
req-regs.ll
…
small-constant.ll
[AArch64] Update generic sched model to A510
2023-08-21 12:25:15 +01:00
vscale-factor-out-constant.ll
…
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