24 lines
975 B
LLVM
24 lines
975 B
LLVM
; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s
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; CHECK: error: SRV register 0 in space 0 does not have a binding in the Root Signature
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@SB.str = private unnamed_addr constant [3 x i8] c"SB\00", align 1
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define void @CSMain() "hlsl.shader"="compute" {
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entry:
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; StructuredBuffer<int> In : register(t0, space0);
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%SB = tail call target("dx.RawBuffer", i32, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @SB.str)
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ret void
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}
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!dx.rootsignatures = !{!0}
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!0 = !{ptr @CSMain, !1, i32 2}
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!1 = !{!2, !3, !5, !7}
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!2 = !{!"RootCBV", i32 0, i32 3, i32 666, i32 4}
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!3 = !{!"DescriptorTable", i32 1, !4}
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!4 = !{!"SRV", i32 1, i32 0, i32 0, i32 -1, i32 4}
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!5 = !{!"DescriptorTable", i32 0, !6}
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!6 = !{!"Sampler", i32 2, i32 0, i32 0, i32 -1, i32 0}
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!7 = !{!"DescriptorTable", i32 0, !8}
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!8 = !{!"UAV", i32 -1, i32 0, i32 0, i32 -1, i32 2}
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