Anna Thomas b2195bc771 [SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM ...

The missing legalization in SelectionDAG was identified when adding the
intrinsic support for vector reduction for maximum/minimum (D152370).

Fixes part of PR: https://github.com/llvm/llvm-project/issues/63267

Differential Revision: https://reviews.llvm.org/D152718

2023-06-12 12:22:21 -04:00

..

CMakeLists.txt

Split out CodeGenTypes from CodeGen for LLT/MVT

2023-05-03 00:13:20 +09:00

DAGCombiner.cpp

[DAGCombine] Move setcc of freeze fold to brcond

2023-06-12 12:01:29 +02:00

FastISel.cpp

[FastISel] Implement translation of entry_value dbg.value intrinsics

2023-05-26 11:34:15 -04:00

FunctionLoweringInfo.cpp

[1/11][IR] Permit load/store/alloca for struct of the same scalable vector type

2023-05-19 09:39:36 -07:00

InstrEmitter.cpp

[SDAG] Preserve unpredictable metadata, teach X86CmovConversion to respect this metadata

2023-06-01 20:56:44 +02:00

InstrEmitter.h

[DebugInfo] Store instr-ref mode of MachineFunction in member

2023-01-20 14:47:11 +00:00

LegalizeDAG.cpp

[SelectionDAG][AArch64] Legalize FMAXIMUM/FMINIMUM

2023-06-12 12:22:21 -04:00

LegalizeFloatTypes.cpp

IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics

2023-06-06 17:07:18 -04:00

LegalizeIntegerTypes.cpp

IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics

2023-06-06 17:07:18 -04:00

LegalizeTypes.cpp

[SelectionDAG][AArch64][ARM] Remove setFlags call from DAGTypeLegalizer::SetPromotedInteger.

2023-05-25 11:01:19 -07:00

LegalizeTypes.h

IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics

2023-06-06 17:07:18 -04:00

LegalizeTypesGeneric.cpp

[LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext for ISD::AssertZext during LegalizeType procedure

2023-05-24 10:17:08 +08:00

LegalizeVectorOps.cpp

IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics

2023-06-06 17:07:18 -04:00

LegalizeVectorTypes.cpp

[LegalizeTypes][VP] Widen load/store of fixed length vectors to VP ops

2023-06-12 10:21:04 +01:00

ResourcePriorityQueue.cpp

Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options

2022-06-05 00:31:44 -07:00

ScheduleDAGFast.cpp

Fix uninitialized scalar members in CodeGen

2023-04-21 12:22:34 +08:00

ScheduleDAGRRList.cpp

Restore CodeGen/MachineValueType.h from Support

2023-05-03 00:13:20 +09:00

ScheduleDAGSDNodes.cpp

Clean come dead code

2023-04-23 20:46:34 -04:00

ScheduleDAGSDNodes.h

Restore CodeGen/MachineValueType.h from Support

2023-05-03 00:13:20 +09:00

ScheduleDAGVLIW.cpp

…

SDNodeDbgValue.h

[DebugInfo] Remove dbg.addr from CodeGen

2023-03-02 09:29:43 +00:00

SelectionDAG.cpp

[SelectionDAG] Do not salvage with vector node

2023-06-09 14:55:16 +08:00

SelectionDAGAddressAnalysis.cpp

[CodeGen] llvm::Optional => std::optional

2022-12-13 09:06:36 +00:00

SelectionDAGBuilder.cpp

[X86][BF16] Share FP16 vector ABI with BF16

2023-06-09 09:04:56 +08:00

SelectionDAGBuilder.h

Restore CodeGen/MachineValueType.h from Support

2023-05-03 00:13:20 +09:00

SelectionDAGDumper.cpp

IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics

2023-06-06 17:07:18 -04:00

SelectionDAGISel.cpp

[SelectionDAG][DebugInfo] Implement translation of entry_value vars

2023-05-12 12:00:13 -04:00

SelectionDAGPrinter.cpp

…

SelectionDAGTargetInfo.cpp

…

StatepointLowering.cpp

[NFC] Replace ;; with ;

2023-06-11 10:25:24 +01:00

StatepointLowering.h

…

TargetLowering.cpp

[DAGCombiner] Use generalized pattern matcher in visitFMA to support vp.fma.

2023-06-08 09:40:21 +08:00