6bda14b313
I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
127 lines
4.4 KiB
C++
127 lines
4.4 KiB
C++
//===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/SystemZMCFixups.h"
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#include "MCTargetDesc/SystemZMCTargetDesc.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCObjectWriter.h"
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using namespace llvm;
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// Value is a fully-resolved relocation value: Symbol + Addend [- Pivot].
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// Return the bits that should be installed in a relocation field for
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// fixup kind Kind.
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static uint64_t extractBitsForFixup(MCFixupKind Kind, uint64_t Value) {
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if (Kind < FirstTargetFixupKind)
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return Value;
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switch (unsigned(Kind)) {
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case SystemZ::FK_390_PC12DBL:
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case SystemZ::FK_390_PC16DBL:
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case SystemZ::FK_390_PC24DBL:
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case SystemZ::FK_390_PC32DBL:
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return (int64_t)Value / 2;
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case SystemZ::FK_390_TLS_CALL:
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return 0;
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}
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llvm_unreachable("Unknown fixup kind!");
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}
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namespace {
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class SystemZMCAsmBackend : public MCAsmBackend {
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uint8_t OSABI;
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public:
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SystemZMCAsmBackend(uint8_t osABI)
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: OSABI(osABI) {}
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// Override MCAsmBackend
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unsigned getNumFixupKinds() const override {
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return SystemZ::NumTargetFixupKinds;
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}
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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uint64_t Value, bool IsPCRel, MCContext &Ctx) const override;
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bool mayNeedRelaxation(const MCInst &Inst) const override {
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return false;
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}
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *Fragment,
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const MCAsmLayout &Layout) const override {
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return false;
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}
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void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
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MCInst &Res) const override {
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llvm_unreachable("SystemZ does do not have assembler relaxation");
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}
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bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
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MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
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return createSystemZObjectWriter(OS, OSABI);
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}
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};
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} // end anonymous namespace
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const MCFixupKindInfo &
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SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
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const static MCFixupKindInfo Infos[SystemZ::NumTargetFixupKinds] = {
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{ "FK_390_PC12DBL", 4, 12, MCFixupKindInfo::FKF_IsPCRel },
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{ "FK_390_PC16DBL", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
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{ "FK_390_PC24DBL", 0, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "FK_390_PC32DBL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
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{ "FK_390_TLS_CALL", 0, 0, 0 }
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};
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if (Kind < FirstTargetFixupKind)
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return MCAsmBackend::getFixupKindInfo(Kind);
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assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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"Invalid kind!");
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return Infos[Kind - FirstTargetFixupKind];
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}
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void SystemZMCAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
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unsigned DataSize, uint64_t Value,
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bool IsPCRel, MCContext &Ctx) const {
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MCFixupKind Kind = Fixup.getKind();
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unsigned Offset = Fixup.getOffset();
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unsigned BitSize = getFixupKindInfo(Kind).TargetSize;
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unsigned Size = (BitSize + 7) / 8;
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assert(Offset + Size <= DataSize && "Invalid fixup offset!");
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// Big-endian insertion of Size bytes.
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Value = extractBitsForFixup(Kind, Value);
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if (BitSize < 64)
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Value &= ((uint64_t)1 << BitSize) - 1;
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unsigned ShiftValue = (Size * 8) - 8;
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for (unsigned I = 0; I != Size; ++I) {
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Data[Offset + I] |= uint8_t(Value >> ShiftValue);
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ShiftValue -= 8;
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}
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}
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bool SystemZMCAsmBackend::writeNopData(uint64_t Count,
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MCObjectWriter *OW) const {
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for (uint64_t I = 0; I != Count; ++I)
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OW->write8(7);
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return true;
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}
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MCAsmBackend *llvm::createSystemZMCAsmBackend(const Target &T,
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const MCRegisterInfo &MRI,
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const Triple &TT, StringRef CPU,
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const MCTargetOptions &Options) {
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uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
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return new SystemZMCAsmBackend(OSABI);
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}
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