Evgeny Stupachenko 3b88291581 Fix PR23384 (part 3 of 3) ...

Summary:
The patch makes instruction count the highest priority for
 LSR solution for X86 (previously registers had highest priority).

Reviewers: qcolombet

Differential Revision: http://reviews.llvm.org/D30562

From: Evgeny Stupachenko <evstupac@gmail.com>
llvm-svn: 304824

2017-06-06 20:04:16 +00:00

..

2008-08-14-ShadowIV.ll

…

2009-11-10-LSRCrash.ll

…

2011-07-20-DoubleIV.ll

…

2011-11-29-postincphi.ll

…

2011-12-04-loserreg.ll

…

2012-01-13-phielim.ll

Fix testcases failing after r284036

2016-10-12 20:39:33 +00:00

canonical-2.ll

[LSR] Call canonicalize after we generate a new Formula in GenerateTruncates. Fix PR33077.

2017-05-18 17:21:22 +00:00

canonical.ll

Fix PR23384 (part 3 of 3)

2017-06-06 20:04:16 +00:00

incorrect-offset-scaling.ll

Re-enable "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"

2017-05-26 06:47:04 +00:00

ivchain-stress-X86.ll

…

ivchain-X86.ll

Fix PR23384 (part 3 of 3)

2017-06-06 20:04:16 +00:00

lit.local.cfg

…

lsr-expand-quadratic.ll

Fix PR23384 (part 3 of 3)

2017-06-06 20:04:16 +00:00

lsr-insns-1.ll

Fix PR23384 (part 3 of 3)

2017-06-06 20:04:16 +00:00

lsr-insns-2.ll

Fix PR23384 (part 3 of 3)

2017-06-06 20:04:16 +00:00

nested-loop.ll

Fix PR23384 (part 3 of 3)

2017-06-06 20:04:16 +00:00

no_superflous_induction_vars.ll

…

pr17473.ll

…

pr28719.ll

[SCEV] Update interface to handle SCEVExpander insert point motion.

2016-08-11 21:05:17 +00:00

sibling-loops.ll

[LSR] Prevent formula with SCEVAddRecExpr type of Reg from Sibling loops

2017-02-16 21:27:31 +00:00