128437fb6a
Asynchronous operations are memory transfers (usually between the global memory and LDS) that are completed independently at an unspecified scope. A thread that requests one or more asynchronous transfers can use async marks to track their completion. The thread waits for each mark to be completed, which indicates that requests initiated in program order before this mark have also completed. For now, we implement asyncmark/wait operations on pre-GFX12 architectures that support "LDS DMA" operations. Future work will extend support to GFX12Plus architectures that support "true" async operations. This is part of a stack split out from #173259 - #180467 - #180466 Co-authored-by: Ryan Mitchell ryan.mitchell@amd.com Fixes: SWDEV-521121
17 lines
781 B
Common Lisp
17 lines
781 B
Common Lisp
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -cl-std=CL2.0 -O0 -triple amdgcn-unknown-unknown -target-cpu gfx900 -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -cl-std=CL2.0 -O0 -triple amdgcn-unknown-unknown -target-cpu gfx942 -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -cl-std=CL2.0 -O0 -triple amdgcn-unknown-unknown -target-cpu gfx1010 -emit-llvm -o - %s | FileCheck %s
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// REQUIRES: amdgpu-registered-target
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// CHECK-LABEL: @test_invocation(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: call void @llvm.amdgcn.asyncmark()
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// CHECK-NEXT: call void @llvm.amdgcn.wait.asyncmark(i16 0)
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// CHECK-NEXT: ret void
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//
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void test_invocation() {
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__builtin_amdgcn_asyncmark();
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__builtin_amdgcn_wait_asyncmark(0);
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}
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