Simon Pilgrim d384a4c530 [X86] Adjust vector test costs to match SoG (Issue #54889) ...

znver1/2 models were incorrectly modelling the latency/throughput/uops and znver1 ymm variants also require double pumping.

Now matches what I can decipher from the AMD SoG, Agner and instlatx64 numbers vs the llvm-exegesis report provided by @fabian-r

2022-05-31 09:14:06 +01:00

..

AArch64

Partially revert "[SchedModels][CortexA55] Add ASIMD integer instructions"

2022-02-28 10:58:52 +00:00

AMDGPU

[MCA] Switching from conservatively guessing which instructions are

2022-01-11 13:50:14 -08:00

ARM

[MCA][InstrBuilder] Check for the presence of flag VariadicOpsAreDefs.

2021-06-15 09:52:38 +01:00

JSON/X86

[llvm-mca][JSON] Store extra information about driver flags used for the simulation

2021-07-16 09:18:40 +02:00

SystemZ

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X86

[X86] Adjust vector test costs to match SoG (Issue #54889)

2022-05-31 09:14:06 +01:00

invalid_input_file_name.test

[test] Use host platform specific error message substitution in lit tests

2021-01-29 07:16:30 -05:00

lit.local.cfg

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