Matt Arsenault cbbc7e4a75 llvm-reduce: Don't set generic instruction operands to undef
The intention is that these should never have undef operands. It turns
out the restriction the verifier enforces is too lax. The verifier
enforces that registers without a register class cannot be undef, but
it's valid to use a register with a register class and type. The
verifier needs to change to be based on the opcode.
2022-06-07 10:28:23 -04:00
..