Emmmer 6d4ab6d921 [LLDB][RISCV] Add RV32F instruction support for EmulateInstructionRISCV
Add:

- RV32F instruction set.
- corresponding unittests.

Further work:

- RV32FC, RV64F and RV64FC instructions support.
- update execution exceptions to fcsr register in RVM instructions.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D138447
2022-11-23 22:09:14 +08:00
..
2022-10-25 23:03:16 +08:00