aec1c98426
Implement SystemZ::scanSectionImpl, following the pattern established for x86 (#178846) and PPC64 (#181496). This merges the getRelExpr and TLS handling for SHF_ALLOC sections into the target-specific scanner, enabling devirtualization and eliminating abstraction overhead. - Inline relocation classification into scanSectionImpl with a switch on relocation type, replacing the generic `rs.scan()` path. - Use processR_PC/processR_PLT_PC for common PC-relative and PLT relocations. - Handle TLS GD, LD, and DTPREL directly, eliminating handleTlsRelocation, getTlsGdRelaxSkip, and adjustTlsExpr overrides. Replace R_RELAX_TLS_GD_TO_IE_GOT_OFF with R_GOT_OFF and R_RELAX_TLS_GD_TO_LE/R_RELAX_TLS_LD_TO_LE with R_TPREL, using type-based dispatch in relocate() for marker relocation types. - Handle TLS IE inline without IE-to-LE optimization. Cannot use `handleTlsIe`. - Remove `sortRels`: instead of sorting relocations to process GDCALL before PLT32DBL, skip PLT32DBL by peeking ahead at the next relocation to check for a TLS marker (GDCALL/LDCALL). This fixes SHT_CREL as an alternative to #149640 - Simplify getRelExpr to only handle relocations needed by relocateNonAlloc and .eh_frame. Fix #149511
LLVM Linker (lld)
This directory and its subdirectories contain source code for the LLVM Linker, a modular cross platform linker which is built as part of the LLVM compiler infrastructure project.
lld is open source software. You may freely distribute it under the terms of the license agreement found in LICENSE.txt.
Benchmarking
In order to make sure various developers can evaluate patches over the same tests, we create a collection of self contained programs.
It is hosted at https://s3-us-west-2.amazonaws.com/linker-tests/lld-speed-test.tar.xz
The current sha256 is 10eec685463d5a8bbf08d77f4ca96282161d396c65bd97dc99dbde644a31610f.