1987 lines
109 KiB
C++
1987 lines
109 KiB
C++
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --prefix-filecheck-ir-name _ --version 4
|
|
// RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fclang-abi-compat=latest -std=c++20 -fopenmp -fopenmp-version=60 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
|
|
|
|
// Check same results after serialization round-trip
|
|
// RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fclang-abi-compat=latest -std=c++20 -fopenmp -fopenmp-version=60 -emit-pch -o %t %s
|
|
// RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fclang-abi-compat=latest -std=c++20 -fopenmp -fopenmp-version=60 -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2
|
|
// expected-no-diagnostics
|
|
|
|
#ifndef HEADER
|
|
#define HEADER
|
|
|
|
extern "C" void body(...) {}
|
|
|
|
struct S {
|
|
int i;
|
|
S() {
|
|
#pragma omp split counts(5, omp_fill)
|
|
for (i = 0; i < 20; i++)
|
|
body(i);
|
|
}
|
|
} s;
|
|
|
|
extern "C" void split_two_const_trip() {
|
|
#pragma omp split counts(3, omp_fill)
|
|
for (int i = 0; i < 10; ++i)
|
|
body(i);
|
|
}
|
|
|
|
extern "C" void split_var_trip(int n) {
|
|
#pragma omp split counts(3, omp_fill)
|
|
for (int i = 0; i < n; ++i)
|
|
body(i);
|
|
}
|
|
|
|
extern "C" void split_mid_fill(int n) {
|
|
#pragma omp split counts(2, omp_fill, 3)
|
|
for (int i = 0; i < n; ++i)
|
|
body(i);
|
|
}
|
|
|
|
extern "C" void split_first_fill(int n) {
|
|
#pragma omp split counts(omp_fill, 4)
|
|
for (int i = 0; i < n; ++i)
|
|
body(i);
|
|
}
|
|
|
|
extern "C" void split_only_fill(int n) {
|
|
#pragma omp split counts(omp_fill)
|
|
for (int i = 0; i < n; ++i)
|
|
body(i);
|
|
}
|
|
|
|
extern "C" void split_neg_start(int n) {
|
|
#pragma omp split counts(1, omp_fill, 1)
|
|
for (int i = -1; i <= n; ++i)
|
|
body(i);
|
|
}
|
|
|
|
extern "C" void split_zero_first() {
|
|
#pragma omp split counts(0, omp_fill)
|
|
for (int i = 0; i < 10; ++i)
|
|
body(i);
|
|
}
|
|
|
|
extern "C" void split_three_const(int n) {
|
|
#pragma omp split counts(2, 3, omp_fill)
|
|
for (int i = 0; i < n; ++i)
|
|
body(i);
|
|
}
|
|
|
|
extern "C" void split_step2(int n) {
|
|
#pragma omp split counts(3, omp_fill)
|
|
for (int i = 0; i < n; i += 2)
|
|
body(i);
|
|
}
|
|
|
|
extern "C" void split_decrement(int n) {
|
|
#pragma omp split counts(omp_fill, 2)
|
|
for (int i = n; i > 0; --i)
|
|
body(i);
|
|
}
|
|
|
|
void split_range_for() {
|
|
int a[] = {10, 20, 30, 40};
|
|
#pragma omp split counts(2, omp_fill)
|
|
for (int x : a)
|
|
body(x);
|
|
}
|
|
|
|
#endif
|
|
// CHECK1-LABEL: define dso_local void @body(
|
|
// CHECK1-SAME: ...) #[[ATTR0:[0-9]+]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define internal void @__cxx_global_var_init(
|
|
// CHECK1-SAME: ) #[[ATTR1:[0-9]+]] section ".text.startup" {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @s)
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define linkonce_odr void @_ZN1SC1Ev(
|
|
// CHECK1-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// CHECK1-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define linkonce_odr void @_ZN1SC2Ev(
|
|
// CHECK1-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// CHECK1-NEXT: [[I2:%.*]] = alloca ptr, align 8
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// CHECK1-NEXT: [[I:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[I3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK1-NEXT: store ptr [[I3]], ptr [[I2]], align 8
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 5
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 1
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[I2]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
|
|
// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP3]], align 4
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[I2]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: store i32 5, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND4:%.*]]
|
|
// CHECK1: for.cond4:
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP7]], 20
|
|
// CHECK1-NEXT: br i1 [[CMP5]], label [[FOR_BODY6:%.*]], label [[FOR_END11:%.*]]
|
|
// CHECK1: for.body6:
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP9]], 1
|
|
// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
|
|
// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[I2]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK1-NEXT: store i32 [[ADD8]], ptr [[TMP10]], align 4
|
|
// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[I2]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP12]])
|
|
// CHECK1-NEXT: br label [[FOR_INC9:%.*]]
|
|
// CHECK1: for.inc9:
|
|
// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC10:%.*]] = add nsw i32 [[TMP13]], 1
|
|
// CHECK1-NEXT: store i32 [[INC10]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP6:![0-9]+]]
|
|
// CHECK1: for.end11:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_two_const_trip(
|
|
// CHECK1-SAME: ) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 3
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 1
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP3]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: store i32 3, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND1:%.*]]
|
|
// CHECK1: for.cond1:
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10
|
|
// CHECK1-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END8:%.*]]
|
|
// CHECK1: for.body3:
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP7]], 1
|
|
// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
|
|
// CHECK1-NEXT: store i32 [[ADD5]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP8]])
|
|
// CHECK1-NEXT: br label [[FOR_INC6:%.*]]
|
|
// CHECK1: for.inc6:
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP9]], 1
|
|
// CHECK1-NEXT: store i32 [[INC7]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP8:![0-9]+]]
|
|
// CHECK1: for.end8:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_var_trip(
|
|
// CHECK1-SAME: i32 noundef [[N:%.*]]) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], 3
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: store i32 3, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK1: for.cond3:
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], 1
|
|
// CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP7]], [[ADD4]]
|
|
// CHECK1-NEXT: br i1 [[CMP5]], label [[FOR_BODY6:%.*]], label [[FOR_END11:%.*]]
|
|
// CHECK1: for.body6:
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP10]], 1
|
|
// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
|
|
// CHECK1-NEXT: store i32 [[ADD8]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP11]])
|
|
// CHECK1-NEXT: br label [[FOR_INC9:%.*]]
|
|
// CHECK1: for.inc9:
|
|
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC10:%.*]] = add nsw i32 [[TMP12]], 1
|
|
// CHECK1-NEXT: store i32 [[INC10]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP10:![0-9]+]]
|
|
// CHECK1: for.end11:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_mid_fill(
|
|
// CHECK1-SAME: i32 noundef [[N:%.*]]) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_2_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], 2
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: store i32 2, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK1: for.cond3:
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], 1
|
|
// CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[ADD4]], 3
|
|
// CHECK1-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP7]], [[SUB5]]
|
|
// CHECK1-NEXT: br i1 [[CMP6]], label [[FOR_BODY7:%.*]], label [[FOR_END12:%.*]]
|
|
// CHECK1: for.body7:
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP10]], 1
|
|
// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
|
|
// CHECK1-NEXT: store i32 [[ADD9]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP11]])
|
|
// CHECK1-NEXT: br label [[FOR_INC10:%.*]]
|
|
// CHECK1: for.inc10:
|
|
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC11:%.*]] = add nsw i32 [[TMP12]], 1
|
|
// CHECK1-NEXT: store i32 [[INC11]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP12:![0-9]+]]
|
|
// CHECK1: for.end12:
|
|
// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP13]], 1
|
|
// CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i32 [[ADD13]], 3
|
|
// CHECK1-NEXT: store i32 [[SUB14]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND15:%.*]]
|
|
// CHECK1: for.cond15:
|
|
// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP15]], 1
|
|
// CHECK1-NEXT: [[CMP17:%.*]] = icmp slt i32 [[TMP14]], [[ADD16]]
|
|
// CHECK1-NEXT: br i1 [[CMP17]], label [[FOR_BODY18:%.*]], label [[FOR_END23:%.*]]
|
|
// CHECK1: for.body18:
|
|
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL19:%.*]] = mul nsw i32 [[TMP17]], 1
|
|
// CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 0, [[MUL19]]
|
|
// CHECK1-NEXT: store i32 [[ADD20]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP18]])
|
|
// CHECK1-NEXT: br label [[FOR_INC21:%.*]]
|
|
// CHECK1: for.inc21:
|
|
// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: [[INC22:%.*]] = add nsw i32 [[TMP19]], 1
|
|
// CHECK1-NEXT: store i32 [[INC22]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND15]], !llvm.loop [[LOOP13:![0-9]+]]
|
|
// CHECK1: for.end23:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_first_fill(
|
|
// CHECK1-SAME: i32 noundef [[N:%.*]]) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1
|
|
// CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[ADD]], 4
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[SUB3]]
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
|
|
// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[ADD4]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP6]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP8]], 1
|
|
// CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[ADD5]], 4
|
|
// CHECK1-NEXT: store i32 [[SUB6]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND7:%.*]]
|
|
// CHECK1: for.cond7:
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP10]], 1
|
|
// CHECK1-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP9]], [[ADD8]]
|
|
// CHECK1-NEXT: br i1 [[CMP9]], label [[FOR_BODY10:%.*]], label [[FOR_END15:%.*]]
|
|
// CHECK1: for.body10:
|
|
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP12]], 1
|
|
// CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
|
|
// CHECK1-NEXT: store i32 [[ADD12]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP13]])
|
|
// CHECK1-NEXT: br label [[FOR_INC13:%.*]]
|
|
// CHECK1: for.inc13:
|
|
// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC14:%.*]] = add nsw i32 [[TMP14]], 1
|
|
// CHECK1-NEXT: store i32 [[INC14]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP15:![0-9]+]]
|
|
// CHECK1: for.end15:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_only_fill(
|
|
// CHECK1-SAME: i32 noundef [[N:%.*]]) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[ADD]]
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
|
|
// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[ADD3]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP6]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_neg_start(
|
|
// CHECK1-SAME: i32 noundef [[N:%.*]]) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_2_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 -1, ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP1]], -2
|
|
// CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[SUB]], 1
|
|
// CHECK1-NEXT: [[SUB2:%.*]] = sub i32 [[DIV]], 1
|
|
// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP2]], 1
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP4]], 1
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add i32 -1, [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add i32 [[TMP6]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: store i32 1, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK1: for.cond3:
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD4:%.*]] = add i32 [[TMP8]], 1
|
|
// CHECK1-NEXT: [[SUB5:%.*]] = sub i32 [[ADD4]], 1
|
|
// CHECK1-NEXT: [[CMP6:%.*]] = icmp ult i32 [[TMP7]], [[SUB5]]
|
|
// CHECK1-NEXT: br i1 [[CMP6]], label [[FOR_BODY7:%.*]], label [[FOR_END12:%.*]]
|
|
// CHECK1: for.body7:
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL8:%.*]] = mul i32 [[TMP10]], 1
|
|
// CHECK1-NEXT: [[ADD9:%.*]] = add i32 -1, [[MUL8]]
|
|
// CHECK1-NEXT: store i32 [[ADD9]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP11]])
|
|
// CHECK1-NEXT: br label [[FOR_INC10:%.*]]
|
|
// CHECK1: for.inc10:
|
|
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC11:%.*]] = add i32 [[TMP12]], 1
|
|
// CHECK1-NEXT: store i32 [[INC11]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP18:![0-9]+]]
|
|
// CHECK1: for.end12:
|
|
// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD13:%.*]] = add i32 [[TMP13]], 1
|
|
// CHECK1-NEXT: [[SUB14:%.*]] = sub i32 [[ADD13]], 1
|
|
// CHECK1-NEXT: store i32 [[SUB14]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND15:%.*]]
|
|
// CHECK1: for.cond15:
|
|
// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD16:%.*]] = add i32 [[TMP15]], 1
|
|
// CHECK1-NEXT: [[CMP17:%.*]] = icmp ult i32 [[TMP14]], [[ADD16]]
|
|
// CHECK1-NEXT: br i1 [[CMP17]], label [[FOR_BODY18:%.*]], label [[FOR_END23:%.*]]
|
|
// CHECK1: for.body18:
|
|
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL19:%.*]] = mul i32 [[TMP17]], 1
|
|
// CHECK1-NEXT: [[ADD20:%.*]] = add i32 -1, [[MUL19]]
|
|
// CHECK1-NEXT: store i32 [[ADD20]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP18]])
|
|
// CHECK1-NEXT: br label [[FOR_INC21:%.*]]
|
|
// CHECK1: for.inc21:
|
|
// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: [[INC22:%.*]] = add i32 [[TMP19]], 1
|
|
// CHECK1-NEXT: store i32 [[INC22]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND15]], !llvm.loop [[LOOP19:![0-9]+]]
|
|
// CHECK1: for.end23:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_zero_first(
|
|
// CHECK1-SAME: ) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 0
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 1
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP3]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND1:%.*]]
|
|
// CHECK1: for.cond1:
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10
|
|
// CHECK1-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END8:%.*]]
|
|
// CHECK1: for.body3:
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP7]], 1
|
|
// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
|
|
// CHECK1-NEXT: store i32 [[ADD5]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP8]])
|
|
// CHECK1-NEXT: br label [[FOR_INC6:%.*]]
|
|
// CHECK1: for.inc6:
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP9]], 1
|
|
// CHECK1-NEXT: store i32 [[INC7]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP21:![0-9]+]]
|
|
// CHECK1: for.end8:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_three_const(
|
|
// CHECK1-SAME: i32 noundef [[N:%.*]]) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_2_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], 2
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: store i32 2, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK1: for.cond3:
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP7]], 5
|
|
// CHECK1-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END10:%.*]]
|
|
// CHECK1: for.body5:
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP9]], 1
|
|
// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
|
|
// CHECK1-NEXT: store i32 [[ADD7]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP10]])
|
|
// CHECK1-NEXT: br label [[FOR_INC8:%.*]]
|
|
// CHECK1: for.inc8:
|
|
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC9:%.*]] = add nsw i32 [[TMP11]], 1
|
|
// CHECK1-NEXT: store i32 [[INC9]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP23:![0-9]+]]
|
|
// CHECK1: for.end10:
|
|
// CHECK1-NEXT: store i32 5, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND11:%.*]]
|
|
// CHECK1: for.cond11:
|
|
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP13]], 1
|
|
// CHECK1-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP12]], [[ADD12]]
|
|
// CHECK1-NEXT: br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END19:%.*]]
|
|
// CHECK1: for.body14:
|
|
// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP15]], 1
|
|
// CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]]
|
|
// CHECK1-NEXT: store i32 [[ADD16]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP16]])
|
|
// CHECK1-NEXT: br label [[FOR_INC17:%.*]]
|
|
// CHECK1: for.inc17:
|
|
// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: [[INC18:%.*]] = add nsw i32 [[TMP17]], 1
|
|
// CHECK1-NEXT: store i32 [[INC18]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND11]], !llvm.loop [[LOOP24:![0-9]+]]
|
|
// CHECK1: for.end19:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_step2(
|
|
// CHECK1-SAME: i32 noundef [[N:%.*]]) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP1]], -1
|
|
// CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[SUB]], 2
|
|
// CHECK1-NEXT: [[SUB2:%.*]] = sub i32 [[DIV]], 1
|
|
// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP2]], 3
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP4]], 2
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add i32 0, [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add i32 [[TMP6]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: store i32 3, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK1: for.cond3:
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD4:%.*]] = add i32 [[TMP8]], 1
|
|
// CHECK1-NEXT: [[CMP5:%.*]] = icmp ult i32 [[TMP7]], [[ADD4]]
|
|
// CHECK1-NEXT: br i1 [[CMP5]], label [[FOR_BODY6:%.*]], label [[FOR_END11:%.*]]
|
|
// CHECK1: for.body6:
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL7:%.*]] = mul i32 [[TMP10]], 2
|
|
// CHECK1-NEXT: [[ADD8:%.*]] = add i32 0, [[MUL7]]
|
|
// CHECK1-NEXT: store i32 [[ADD8]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP11]])
|
|
// CHECK1-NEXT: br label [[FOR_INC9:%.*]]
|
|
// CHECK1: for.inc9:
|
|
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC10:%.*]] = add i32 [[TMP12]], 1
|
|
// CHECK1-NEXT: store i32 [[INC10]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP26:![0-9]+]]
|
|
// CHECK1: for.end11:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @split_decrement(
|
|
// CHECK1-SAME: i32 noundef [[N:%.*]]) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
|
|
// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], 1
|
|
// CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[ADD]], 2
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[SUB3]]
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
|
|
// CHECK1-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP6]], [[MUL]]
|
|
// CHECK1-NEXT: store i32 [[SUB4]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP8]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP9]], 1
|
|
// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP10]], 1
|
|
// CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[ADD5]], 2
|
|
// CHECK1-NEXT: store i32 [[SUB6]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND7:%.*]]
|
|
// CHECK1: for.cond7:
|
|
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
|
|
// CHECK1-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP11]], [[ADD8]]
|
|
// CHECK1-NEXT: br i1 [[CMP9]], label [[FOR_BODY10:%.*]], label [[FOR_END15:%.*]]
|
|
// CHECK1: for.body10:
|
|
// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK1-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP15]], 1
|
|
// CHECK1-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP14]], [[MUL11]]
|
|
// CHECK1-NEXT: store i32 [[SUB12]], ptr [[I]], align 4
|
|
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP16]])
|
|
// CHECK1-NEXT: br label [[FOR_INC13:%.*]]
|
|
// CHECK1: for.inc13:
|
|
// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: [[INC14:%.*]] = add nsw i32 [[TMP17]], 1
|
|
// CHECK1-NEXT: store i32 [[INC14]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK1-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP28:![0-9]+]]
|
|
// CHECK1: for.end15:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define dso_local void @_Z15split_range_forv(
|
|
// CHECK1-SAME: ) #[[ATTR0]] {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: [[A:%.*]] = alloca [4 x i32], align 16
|
|
// CHECK1-NEXT: [[__RANGE1:%.*]] = alloca ptr, align 8
|
|
// CHECK1-NEXT: [[__END1:%.*]] = alloca ptr, align 8
|
|
// CHECK1-NEXT: [[__BEGIN1:%.*]] = alloca ptr, align 8
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 8
|
|
// CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
|
|
// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_0___BEGIN1:%.*]] = alloca i64, align 8
|
|
// CHECK1-NEXT: [[X:%.*]] = alloca i32, align 4
|
|
// CHECK1-NEXT: [[DOTSPLIT_IV_1___BEGIN1:%.*]] = alloca i64, align 8
|
|
// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[A]], ptr align 16 @__const._Z15split_range_forv.a, i64 16, i1 false)
|
|
// CHECK1-NEXT: store ptr [[A]], ptr [[__RANGE1]], align 8
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE1]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP0]], i64 0, i64 0
|
|
// CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAYDECAY]], i64 4
|
|
// CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[__END1]], align 8
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE1]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK1-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP1]], i64 0, i64 0
|
|
// CHECK1-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN1]], align 8
|
|
// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE1]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK1-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP2]], i64 0, i64 0
|
|
// CHECK1-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 8
|
|
// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END1]], align 8
|
|
// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 8
|
|
// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 8
|
|
// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8
|
|
// CHECK1-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i64
|
|
// CHECK1-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64
|
|
// CHECK1-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
|
|
// CHECK1-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 4
|
|
// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1
|
|
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1
|
|
// CHECK1-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1
|
|
// CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 1
|
|
// CHECK1-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 8
|
|
// CHECK1-NEXT: store i64 0, ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK1-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK1: for.cond:
|
|
// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], 2
|
|
// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK1: for.body:
|
|
// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK1-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_IV]], align 8
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
|
|
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP9]], 1
|
|
// CHECK1-NEXT: [[ADD_PTR6:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i64 [[MUL]]
|
|
// CHECK1-NEXT: store ptr [[ADD_PTR6]], ptr [[__BEGIN1]], align 8
|
|
// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[__BEGIN1]], align 8
|
|
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP11]], ptr [[X]], align 4
|
|
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[X]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP12]])
|
|
// CHECK1-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK1: for.inc:
|
|
// CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK1-NEXT: [[INC:%.*]] = add nsw i64 [[TMP13]], 1
|
|
// CHECK1-NEXT: store i64 [[INC]], ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
|
|
// CHECK1: for.end:
|
|
// CHECK1-NEXT: store i64 2, ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK1-NEXT: br label [[FOR_COND7:%.*]]
|
|
// CHECK1: for.cond7:
|
|
// CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8
|
|
// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP15]], 1
|
|
// CHECK1-NEXT: [[CMP9:%.*]] = icmp slt i64 [[TMP14]], [[ADD8]]
|
|
// CHECK1-NEXT: br i1 [[CMP9]], label [[FOR_BODY10:%.*]], label [[FOR_END15:%.*]]
|
|
// CHECK1: for.body10:
|
|
// CHECK1-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK1-NEXT: store i64 [[TMP16]], ptr [[DOTOMP_IV]], align 8
|
|
// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8
|
|
// CHECK1-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
|
|
// CHECK1-NEXT: [[MUL11:%.*]] = mul nsw i64 [[TMP18]], 1
|
|
// CHECK1-NEXT: [[ADD_PTR12:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 [[MUL11]]
|
|
// CHECK1-NEXT: store ptr [[ADD_PTR12]], ptr [[__BEGIN1]], align 8
|
|
// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__BEGIN1]], align 8
|
|
// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
|
|
// CHECK1-NEXT: store i32 [[TMP20]], ptr [[X]], align 4
|
|
// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[X]], align 4
|
|
// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP21]])
|
|
// CHECK1-NEXT: br label [[FOR_INC13:%.*]]
|
|
// CHECK1: for.inc13:
|
|
// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK1-NEXT: [[INC14:%.*]] = add nsw i64 [[TMP22]], 1
|
|
// CHECK1-NEXT: store i64 [[INC14]], ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK1-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP30:![0-9]+]]
|
|
// CHECK1: for.end15:
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK1-LABEL: define internal void @_GLOBAL__sub_I_split_codegen.cpp(
|
|
// CHECK1-SAME: ) #[[ATTR1]] section ".text.startup" {
|
|
// CHECK1-NEXT: entry:
|
|
// CHECK1-NEXT: call void @__cxx_global_var_init()
|
|
// CHECK1-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define internal void @__cxx_global_var_init(
|
|
// CHECK2-SAME: ) #[[ATTR0:[0-9]+]] section ".text.startup" {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @s)
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define linkonce_odr void @_ZN1SC1Ev(
|
|
// CHECK2-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// CHECK2-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// CHECK2-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// CHECK2-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define linkonce_odr void @_ZN1SC2Ev(
|
|
// CHECK2-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// CHECK2-NEXT: [[I2:%.*]] = alloca ptr, align 8
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// CHECK2-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// CHECK2-NEXT: [[I:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK2-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[I3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK2-NEXT: store ptr [[I3]], ptr [[I2]], align 8
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 5
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 1
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[I2]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
|
|
// CHECK2-NEXT: store i32 [[ADD]], ptr [[TMP3]], align 4
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[I2]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: store i32 5, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND4:%.*]]
|
|
// CHECK2: for.cond4:
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP7]], 20
|
|
// CHECK2-NEXT: br i1 [[CMP5]], label [[FOR_BODY6:%.*]], label [[FOR_END11:%.*]]
|
|
// CHECK2: for.body6:
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP9]], 1
|
|
// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
|
|
// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[I2]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK2-NEXT: store i32 [[ADD8]], ptr [[TMP10]], align 4
|
|
// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[I2]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP12]])
|
|
// CHECK2-NEXT: br label [[FOR_INC9:%.*]]
|
|
// CHECK2: for.inc9:
|
|
// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC10:%.*]] = add nsw i32 [[TMP13]], 1
|
|
// CHECK2-NEXT: store i32 [[INC10]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP6:![0-9]+]]
|
|
// CHECK2: for.end11:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @body(
|
|
// CHECK2-SAME: ...) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @_Z15split_range_forv(
|
|
// CHECK2-SAME: ) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[A:%.*]] = alloca [4 x i32], align 16
|
|
// CHECK2-NEXT: [[__RANGE1:%.*]] = alloca ptr, align 8
|
|
// CHECK2-NEXT: [[__END1:%.*]] = alloca ptr, align 8
|
|
// CHECK2-NEXT: [[__BEGIN1:%.*]] = alloca ptr, align 8
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 8
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0___BEGIN1:%.*]] = alloca i64, align 8
|
|
// CHECK2-NEXT: [[X:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1___BEGIN1:%.*]] = alloca i64, align 8
|
|
// CHECK2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[A]], ptr align 16 @__const._Z15split_range_forv.a, i64 16, i1 false)
|
|
// CHECK2-NEXT: store ptr [[A]], ptr [[__RANGE1]], align 8
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE1]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP0]], i64 0, i64 0
|
|
// CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAYDECAY]], i64 4
|
|
// CHECK2-NEXT: store ptr [[ADD_PTR]], ptr [[__END1]], align 8
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE1]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK2-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP1]], i64 0, i64 0
|
|
// CHECK2-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN1]], align 8
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE1]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// CHECK2-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP2]], i64 0, i64 0
|
|
// CHECK2-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 8
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END1]], align 8
|
|
// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 8
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 8
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8
|
|
// CHECK2-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i64
|
|
// CHECK2-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64
|
|
// CHECK2-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
|
|
// CHECK2-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 4
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1
|
|
// CHECK2-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1
|
|
// CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 1
|
|
// CHECK2-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 8
|
|
// CHECK2-NEXT: store i64 0, ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], 2
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK2-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_IV]], align 8
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP9]], 1
|
|
// CHECK2-NEXT: [[ADD_PTR6:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i64 [[MUL]]
|
|
// CHECK2-NEXT: store ptr [[ADD_PTR6]], ptr [[__BEGIN1]], align 8
|
|
// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[__BEGIN1]], align 8
|
|
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP11]], ptr [[X]], align 4
|
|
// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[X]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP12]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i64 [[TMP13]], 1
|
|
// CHECK2-NEXT: store i64 [[INC]], ptr [[DOTSPLIT_IV_0___BEGIN1]], align 8
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: store i64 2, ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK2-NEXT: br label [[FOR_COND7:%.*]]
|
|
// CHECK2: for.cond7:
|
|
// CHECK2-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK2-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8
|
|
// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP15]], 1
|
|
// CHECK2-NEXT: [[CMP9:%.*]] = icmp slt i64 [[TMP14]], [[ADD8]]
|
|
// CHECK2-NEXT: br i1 [[CMP9]], label [[FOR_BODY10:%.*]], label [[FOR_END15:%.*]]
|
|
// CHECK2: for.body10:
|
|
// CHECK2-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK2-NEXT: store i64 [[TMP16]], ptr [[DOTOMP_IV]], align 8
|
|
// CHECK2-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8
|
|
// CHECK2-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
|
|
// CHECK2-NEXT: [[MUL11:%.*]] = mul nsw i64 [[TMP18]], 1
|
|
// CHECK2-NEXT: [[ADD_PTR12:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 [[MUL11]]
|
|
// CHECK2-NEXT: store ptr [[ADD_PTR12]], ptr [[__BEGIN1]], align 8
|
|
// CHECK2-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__BEGIN1]], align 8
|
|
// CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP20]], ptr [[X]], align 4
|
|
// CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[X]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP21]])
|
|
// CHECK2-NEXT: br label [[FOR_INC13:%.*]]
|
|
// CHECK2: for.inc13:
|
|
// CHECK2-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK2-NEXT: [[INC14:%.*]] = add nsw i64 [[TMP22]], 1
|
|
// CHECK2-NEXT: store i64 [[INC14]], ptr [[DOTSPLIT_IV_1___BEGIN1]], align 8
|
|
// CHECK2-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP8:![0-9]+]]
|
|
// CHECK2: for.end15:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_decrement(
|
|
// CHECK2-SAME: i32 noundef [[N:%.*]]) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP0]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
|
|
// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], 1
|
|
// CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[ADD]], 2
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[SUB3]]
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
|
|
// CHECK2-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP6]], [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[SUB4]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP8]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP9]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP10]], 1
|
|
// CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[ADD5]], 2
|
|
// CHECK2-NEXT: store i32 [[SUB6]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND7:%.*]]
|
|
// CHECK2: for.cond7:
|
|
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
|
|
// CHECK2-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP11]], [[ADD8]]
|
|
// CHECK2-NEXT: br i1 [[CMP9]], label [[FOR_BODY10:%.*]], label [[FOR_END15:%.*]]
|
|
// CHECK2: for.body10:
|
|
// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP15]], 1
|
|
// CHECK2-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP14]], [[MUL11]]
|
|
// CHECK2-NEXT: store i32 [[SUB12]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP16]])
|
|
// CHECK2-NEXT: br label [[FOR_INC13:%.*]]
|
|
// CHECK2: for.inc13:
|
|
// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC14:%.*]] = add nsw i32 [[TMP17]], 1
|
|
// CHECK2-NEXT: store i32 [[INC14]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP10:![0-9]+]]
|
|
// CHECK2: for.end15:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_first_fill(
|
|
// CHECK2-SAME: i32 noundef [[N:%.*]]) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1
|
|
// CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[ADD]], 4
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[SUB3]]
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
|
|
// CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[ADD4]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP6]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP8]], 1
|
|
// CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[ADD5]], 4
|
|
// CHECK2-NEXT: store i32 [[SUB6]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND7:%.*]]
|
|
// CHECK2: for.cond7:
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP10]], 1
|
|
// CHECK2-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP9]], [[ADD8]]
|
|
// CHECK2-NEXT: br i1 [[CMP9]], label [[FOR_BODY10:%.*]], label [[FOR_END15:%.*]]
|
|
// CHECK2: for.body10:
|
|
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP12]], 1
|
|
// CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
|
|
// CHECK2-NEXT: store i32 [[ADD12]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP13]])
|
|
// CHECK2-NEXT: br label [[FOR_INC13:%.*]]
|
|
// CHECK2: for.inc13:
|
|
// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC14:%.*]] = add nsw i32 [[TMP14]], 1
|
|
// CHECK2-NEXT: store i32 [[INC14]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
|
|
// CHECK2: for.end15:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_mid_fill(
|
|
// CHECK2-SAME: i32 noundef [[N:%.*]]) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_2_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], 2
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: store i32 2, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK2: for.cond3:
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], 1
|
|
// CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i32 [[ADD4]], 3
|
|
// CHECK2-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP7]], [[SUB5]]
|
|
// CHECK2-NEXT: br i1 [[CMP6]], label [[FOR_BODY7:%.*]], label [[FOR_END12:%.*]]
|
|
// CHECK2: for.body7:
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP10]], 1
|
|
// CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
|
|
// CHECK2-NEXT: store i32 [[ADD9]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP11]])
|
|
// CHECK2-NEXT: br label [[FOR_INC10:%.*]]
|
|
// CHECK2: for.inc10:
|
|
// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC11:%.*]] = add nsw i32 [[TMP12]], 1
|
|
// CHECK2-NEXT: store i32 [[INC11]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP14:![0-9]+]]
|
|
// CHECK2: for.end12:
|
|
// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP13]], 1
|
|
// CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i32 [[ADD13]], 3
|
|
// CHECK2-NEXT: store i32 [[SUB14]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND15:%.*]]
|
|
// CHECK2: for.cond15:
|
|
// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP15]], 1
|
|
// CHECK2-NEXT: [[CMP17:%.*]] = icmp slt i32 [[TMP14]], [[ADD16]]
|
|
// CHECK2-NEXT: br i1 [[CMP17]], label [[FOR_BODY18:%.*]], label [[FOR_END23:%.*]]
|
|
// CHECK2: for.body18:
|
|
// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL19:%.*]] = mul nsw i32 [[TMP17]], 1
|
|
// CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 0, [[MUL19]]
|
|
// CHECK2-NEXT: store i32 [[ADD20]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP18]])
|
|
// CHECK2-NEXT: br label [[FOR_INC21:%.*]]
|
|
// CHECK2: for.inc21:
|
|
// CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: [[INC22:%.*]] = add nsw i32 [[TMP19]], 1
|
|
// CHECK2-NEXT: store i32 [[INC22]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND15]], !llvm.loop [[LOOP15:![0-9]+]]
|
|
// CHECK2: for.end23:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_neg_start(
|
|
// CHECK2-SAME: i32 noundef [[N:%.*]]) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_2_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 -1, ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP1]], -2
|
|
// CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[SUB]], 1
|
|
// CHECK2-NEXT: [[SUB2:%.*]] = sub i32 [[DIV]], 1
|
|
// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP2]], 1
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP4]], 1
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add i32 -1, [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add i32 [[TMP6]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: store i32 1, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK2: for.cond3:
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD4:%.*]] = add i32 [[TMP8]], 1
|
|
// CHECK2-NEXT: [[SUB5:%.*]] = sub i32 [[ADD4]], 1
|
|
// CHECK2-NEXT: [[CMP6:%.*]] = icmp ult i32 [[TMP7]], [[SUB5]]
|
|
// CHECK2-NEXT: br i1 [[CMP6]], label [[FOR_BODY7:%.*]], label [[FOR_END12:%.*]]
|
|
// CHECK2: for.body7:
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL8:%.*]] = mul i32 [[TMP10]], 1
|
|
// CHECK2-NEXT: [[ADD9:%.*]] = add i32 -1, [[MUL8]]
|
|
// CHECK2-NEXT: store i32 [[ADD9]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP11]])
|
|
// CHECK2-NEXT: br label [[FOR_INC10:%.*]]
|
|
// CHECK2: for.inc10:
|
|
// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC11:%.*]] = add i32 [[TMP12]], 1
|
|
// CHECK2-NEXT: store i32 [[INC11]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP17:![0-9]+]]
|
|
// CHECK2: for.end12:
|
|
// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD13:%.*]] = add i32 [[TMP13]], 1
|
|
// CHECK2-NEXT: [[SUB14:%.*]] = sub i32 [[ADD13]], 1
|
|
// CHECK2-NEXT: store i32 [[SUB14]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND15:%.*]]
|
|
// CHECK2: for.cond15:
|
|
// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD16:%.*]] = add i32 [[TMP15]], 1
|
|
// CHECK2-NEXT: [[CMP17:%.*]] = icmp ult i32 [[TMP14]], [[ADD16]]
|
|
// CHECK2-NEXT: br i1 [[CMP17]], label [[FOR_BODY18:%.*]], label [[FOR_END23:%.*]]
|
|
// CHECK2: for.body18:
|
|
// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL19:%.*]] = mul i32 [[TMP17]], 1
|
|
// CHECK2-NEXT: [[ADD20:%.*]] = add i32 -1, [[MUL19]]
|
|
// CHECK2-NEXT: store i32 [[ADD20]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP18]])
|
|
// CHECK2-NEXT: br label [[FOR_INC21:%.*]]
|
|
// CHECK2: for.inc21:
|
|
// CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: [[INC22:%.*]] = add i32 [[TMP19]], 1
|
|
// CHECK2-NEXT: store i32 [[INC22]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND15]], !llvm.loop [[LOOP18:![0-9]+]]
|
|
// CHECK2: for.end23:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_only_fill(
|
|
// CHECK2-SAME: i32 noundef [[N:%.*]]) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[ADD]]
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
|
|
// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[ADD3]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP6]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_step2(
|
|
// CHECK2-SAME: i32 noundef [[N:%.*]]) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP1]], -1
|
|
// CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[SUB]], 2
|
|
// CHECK2-NEXT: [[SUB2:%.*]] = sub i32 [[DIV]], 1
|
|
// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP2]], 3
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP4]], 2
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add i32 0, [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add i32 [[TMP6]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: store i32 3, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK2: for.cond3:
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD4:%.*]] = add i32 [[TMP8]], 1
|
|
// CHECK2-NEXT: [[CMP5:%.*]] = icmp ult i32 [[TMP7]], [[ADD4]]
|
|
// CHECK2-NEXT: br i1 [[CMP5]], label [[FOR_BODY6:%.*]], label [[FOR_END11:%.*]]
|
|
// CHECK2: for.body6:
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL7:%.*]] = mul i32 [[TMP10]], 2
|
|
// CHECK2-NEXT: [[ADD8:%.*]] = add i32 0, [[MUL7]]
|
|
// CHECK2-NEXT: store i32 [[ADD8]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP11]])
|
|
// CHECK2-NEXT: br label [[FOR_INC9:%.*]]
|
|
// CHECK2: for.inc9:
|
|
// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC10:%.*]] = add i32 [[TMP12]], 1
|
|
// CHECK2-NEXT: store i32 [[INC10]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP21:![0-9]+]]
|
|
// CHECK2: for.end11:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_three_const(
|
|
// CHECK2-SAME: i32 noundef [[N:%.*]]) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_2_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], 2
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: store i32 2, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK2: for.cond3:
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP7]], 5
|
|
// CHECK2-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END10:%.*]]
|
|
// CHECK2: for.body5:
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP9]], 1
|
|
// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
|
|
// CHECK2-NEXT: store i32 [[ADD7]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP10]])
|
|
// CHECK2-NEXT: br label [[FOR_INC8:%.*]]
|
|
// CHECK2: for.inc8:
|
|
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC9:%.*]] = add nsw i32 [[TMP11]], 1
|
|
// CHECK2-NEXT: store i32 [[INC9]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP23:![0-9]+]]
|
|
// CHECK2: for.end10:
|
|
// CHECK2-NEXT: store i32 5, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND11:%.*]]
|
|
// CHECK2: for.cond11:
|
|
// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP13]], 1
|
|
// CHECK2-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP12]], [[ADD12]]
|
|
// CHECK2-NEXT: br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END19:%.*]]
|
|
// CHECK2: for.body14:
|
|
// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP15]], 1
|
|
// CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]]
|
|
// CHECK2-NEXT: store i32 [[ADD16]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP16]])
|
|
// CHECK2-NEXT: br label [[FOR_INC17:%.*]]
|
|
// CHECK2: for.inc17:
|
|
// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: [[INC18:%.*]] = add nsw i32 [[TMP17]], 1
|
|
// CHECK2-NEXT: store i32 [[INC18]], ptr [[DOTSPLIT_IV_2_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND11]], !llvm.loop [[LOOP24:![0-9]+]]
|
|
// CHECK2: for.end19:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_two_const_trip(
|
|
// CHECK2-SAME: ) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 3
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 1
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP3]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: store i32 3, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND1:%.*]]
|
|
// CHECK2: for.cond1:
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10
|
|
// CHECK2-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END8:%.*]]
|
|
// CHECK2: for.body3:
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP7]], 1
|
|
// CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
|
|
// CHECK2-NEXT: store i32 [[ADD5]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP8]])
|
|
// CHECK2-NEXT: br label [[FOR_INC6:%.*]]
|
|
// CHECK2: for.inc6:
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP9]], 1
|
|
// CHECK2-NEXT: store i32 [[INC7]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP26:![0-9]+]]
|
|
// CHECK2: for.end8:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_var_trip(
|
|
// CHECK2-SAME: i32 noundef [[N:%.*]]) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0
|
|
// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], 3
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP5]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: store i32 3, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3:%.*]]
|
|
// CHECK2: for.cond3:
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
|
|
// CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], 1
|
|
// CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP7]], [[ADD4]]
|
|
// CHECK2-NEXT: br i1 [[CMP5]], label [[FOR_BODY6:%.*]], label [[FOR_END11:%.*]]
|
|
// CHECK2: for.body6:
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP10]], 1
|
|
// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
|
|
// CHECK2-NEXT: store i32 [[ADD8]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP11]])
|
|
// CHECK2-NEXT: br label [[FOR_INC9:%.*]]
|
|
// CHECK2: for.inc9:
|
|
// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC10:%.*]] = add nsw i32 [[TMP12]], 1
|
|
// CHECK2-NEXT: store i32 [[INC10]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP28:![0-9]+]]
|
|
// CHECK2: for.end11:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define dso_local void @split_zero_first(
|
|
// CHECK2-SAME: ) #[[ATTR1]] {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_0_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: [[DOTSPLIT_IV_1_I:%.*]] = alloca i32, align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[I]], align 4
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND:%.*]]
|
|
// CHECK2: for.cond:
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 0
|
|
// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
|
|
// CHECK2: for.body:
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 1
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP3]])
|
|
// CHECK2-NEXT: br label [[FOR_INC:%.*]]
|
|
// CHECK2: for.inc:
|
|
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
|
|
// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTSPLIT_IV_0_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
|
|
// CHECK2: for.end:
|
|
// CHECK2-NEXT: store i32 0, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND1:%.*]]
|
|
// CHECK2: for.cond1:
|
|
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10
|
|
// CHECK2-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END8:%.*]]
|
|
// CHECK2: for.body3:
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
|
|
// CHECK2-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP7]], 1
|
|
// CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
|
|
// CHECK2-NEXT: store i32 [[ADD5]], ptr [[I]], align 4
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
|
|
// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP8]])
|
|
// CHECK2-NEXT: br label [[FOR_INC6:%.*]]
|
|
// CHECK2: for.inc6:
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP9]], 1
|
|
// CHECK2-NEXT: store i32 [[INC7]], ptr [[DOTSPLIT_IV_1_I]], align 4
|
|
// CHECK2-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP30:![0-9]+]]
|
|
// CHECK2: for.end8:
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK2-LABEL: define internal void @_GLOBAL__sub_I_split_codegen.cpp(
|
|
// CHECK2-SAME: ) #[[ATTR0]] section ".text.startup" {
|
|
// CHECK2-NEXT: entry:
|
|
// CHECK2-NEXT: call void @__cxx_global_var_init()
|
|
// CHECK2-NEXT: ret void
|
|
//
|
|
//.
|
|
// CHECK1: [[META2]] = !{}
|
|
// CHECK1: [[META3]] = !{i64 4}
|
|
// CHECK1: [[LOOP4]] = distinct !{[[LOOP4]], [[META5:![0-9]+]]}
|
|
// CHECK1: [[META5]] = !{!"llvm.loop.mustprogress"}
|
|
// CHECK1: [[LOOP6]] = distinct !{[[LOOP6]], [[META5]]}
|
|
// CHECK1: [[LOOP7]] = distinct !{[[LOOP7]], [[META5]]}
|
|
// CHECK1: [[LOOP8]] = distinct !{[[LOOP8]], [[META5]]}
|
|
// CHECK1: [[LOOP9]] = distinct !{[[LOOP9]], [[META5]]}
|
|
// CHECK1: [[LOOP10]] = distinct !{[[LOOP10]], [[META5]]}
|
|
// CHECK1: [[LOOP11]] = distinct !{[[LOOP11]], [[META5]]}
|
|
// CHECK1: [[LOOP12]] = distinct !{[[LOOP12]], [[META5]]}
|
|
// CHECK1: [[LOOP13]] = distinct !{[[LOOP13]], [[META5]]}
|
|
// CHECK1: [[LOOP14]] = distinct !{[[LOOP14]], [[META5]]}
|
|
// CHECK1: [[LOOP15]] = distinct !{[[LOOP15]], [[META5]]}
|
|
// CHECK1: [[LOOP16]] = distinct !{[[LOOP16]], [[META5]]}
|
|
// CHECK1: [[LOOP17]] = distinct !{[[LOOP17]], [[META5]]}
|
|
// CHECK1: [[LOOP18]] = distinct !{[[LOOP18]], [[META5]]}
|
|
// CHECK1: [[LOOP19]] = distinct !{[[LOOP19]], [[META5]]}
|
|
// CHECK1: [[LOOP20]] = distinct !{[[LOOP20]], [[META5]]}
|
|
// CHECK1: [[LOOP21]] = distinct !{[[LOOP21]], [[META5]]}
|
|
// CHECK1: [[LOOP22]] = distinct !{[[LOOP22]], [[META5]]}
|
|
// CHECK1: [[LOOP23]] = distinct !{[[LOOP23]], [[META5]]}
|
|
// CHECK1: [[LOOP24]] = distinct !{[[LOOP24]], [[META5]]}
|
|
// CHECK1: [[LOOP25]] = distinct !{[[LOOP25]], [[META5]]}
|
|
// CHECK1: [[LOOP26]] = distinct !{[[LOOP26]], [[META5]]}
|
|
// CHECK1: [[LOOP27]] = distinct !{[[LOOP27]], [[META5]]}
|
|
// CHECK1: [[LOOP28]] = distinct !{[[LOOP28]], [[META5]]}
|
|
// CHECK1: [[LOOP29]] = distinct !{[[LOOP29]], [[META5]]}
|
|
// CHECK1: [[LOOP30]] = distinct !{[[LOOP30]], [[META5]]}
|
|
//.
|
|
// CHECK2: [[META2]] = !{}
|
|
// CHECK2: [[META3]] = !{i64 4}
|
|
// CHECK2: [[LOOP4]] = distinct !{[[LOOP4]], [[META5:![0-9]+]]}
|
|
// CHECK2: [[META5]] = !{!"llvm.loop.mustprogress"}
|
|
// CHECK2: [[LOOP6]] = distinct !{[[LOOP6]], [[META5]]}
|
|
// CHECK2: [[LOOP7]] = distinct !{[[LOOP7]], [[META5]]}
|
|
// CHECK2: [[LOOP8]] = distinct !{[[LOOP8]], [[META5]]}
|
|
// CHECK2: [[LOOP9]] = distinct !{[[LOOP9]], [[META5]]}
|
|
// CHECK2: [[LOOP10]] = distinct !{[[LOOP10]], [[META5]]}
|
|
// CHECK2: [[LOOP11]] = distinct !{[[LOOP11]], [[META5]]}
|
|
// CHECK2: [[LOOP12]] = distinct !{[[LOOP12]], [[META5]]}
|
|
// CHECK2: [[LOOP13]] = distinct !{[[LOOP13]], [[META5]]}
|
|
// CHECK2: [[LOOP14]] = distinct !{[[LOOP14]], [[META5]]}
|
|
// CHECK2: [[LOOP15]] = distinct !{[[LOOP15]], [[META5]]}
|
|
// CHECK2: [[LOOP16]] = distinct !{[[LOOP16]], [[META5]]}
|
|
// CHECK2: [[LOOP17]] = distinct !{[[LOOP17]], [[META5]]}
|
|
// CHECK2: [[LOOP18]] = distinct !{[[LOOP18]], [[META5]]}
|
|
// CHECK2: [[LOOP19]] = distinct !{[[LOOP19]], [[META5]]}
|
|
// CHECK2: [[LOOP20]] = distinct !{[[LOOP20]], [[META5]]}
|
|
// CHECK2: [[LOOP21]] = distinct !{[[LOOP21]], [[META5]]}
|
|
// CHECK2: [[LOOP22]] = distinct !{[[LOOP22]], [[META5]]}
|
|
// CHECK2: [[LOOP23]] = distinct !{[[LOOP23]], [[META5]]}
|
|
// CHECK2: [[LOOP24]] = distinct !{[[LOOP24]], [[META5]]}
|
|
// CHECK2: [[LOOP25]] = distinct !{[[LOOP25]], [[META5]]}
|
|
// CHECK2: [[LOOP26]] = distinct !{[[LOOP26]], [[META5]]}
|
|
// CHECK2: [[LOOP27]] = distinct !{[[LOOP27]], [[META5]]}
|
|
// CHECK2: [[LOOP28]] = distinct !{[[LOOP28]], [[META5]]}
|
|
// CHECK2: [[LOOP29]] = distinct !{[[LOOP29]], [[META5]]}
|
|
// CHECK2: [[LOOP30]] = distinct !{[[LOOP30]], [[META5]]}
|
|
//.
|