5281b02e84
Lower is slightly odd. It often doesn't change the type but the lowerings do use the new type to decide what code to create. Treat it like a mutation but provide convenience functions that re-use the existing type. Re-uses the existing tests: test/CodeGen/AArch64/GlobalISel/legalize-rem.mir test/CodeGen/AArch64/GlobalISel//legalize-mul.mir test/CodeGen/AArch64/GlobalISel//legalize-cmpxchg-with-success.mir llvm-svn: 329623
411 lines
15 KiB
C++
411 lines
15 KiB
C++
//===- AArch64LegalizerInfo.cpp ----------------------------------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the Machinelegalizer class for
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/// AArch64.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "AArch64LegalizerInfo.h"
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#include "AArch64Subtarget.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetOpcodes.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Type.h"
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using namespace llvm;
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using namespace LegalizeActions;
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using namespace LegalityPredicates;
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AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) {
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using namespace TargetOpcode;
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const LLT p0 = LLT::pointer(0, 64);
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const LLT s1 = LLT::scalar(1);
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const LLT s8 = LLT::scalar(8);
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const LLT s16 = LLT::scalar(16);
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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const LLT s128 = LLT::scalar(128);
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const LLT s256 = LLT::scalar(256);
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const LLT s512 = LLT::scalar(512);
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const LLT v16s8 = LLT::vector(16, 8);
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const LLT v8s8 = LLT::vector(8, 8);
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const LLT v4s8 = LLT::vector(4, 8);
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const LLT v8s16 = LLT::vector(8, 16);
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const LLT v4s16 = LLT::vector(4, 16);
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const LLT v2s16 = LLT::vector(2, 16);
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const LLT v2s32 = LLT::vector(2, 32);
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const LLT v4s32 = LLT::vector(4, 32);
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const LLT v2s64 = LLT::vector(2, 64);
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getActionDefinitionsBuilder(G_IMPLICIT_DEF)
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.legalFor({p0, s1, s8, s16, s32, s64})
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.clampScalar(0, s1, s64)
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.widenScalarToNextPow2(0, 8);
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getActionDefinitionsBuilder(G_PHI)
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.legalFor({p0, s16, s32, s64})
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.clampScalar(0, s16, s64)
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.widenScalarToNextPow2(0);
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getActionDefinitionsBuilder(G_BSWAP)
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.legalFor({s32, s64})
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.clampScalar(0, s16, s64)
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.widenScalarToNextPow2(0);
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getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR, G_SHL})
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.legalFor({s32, s64, v2s32, v4s32, v2s64})
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(0)
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.clampNumElements(0, v2s32, v4s32)
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.clampNumElements(0, v2s64, v2s64)
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.moreElementsToNextPow2(0);
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getActionDefinitionsBuilder(G_GEP)
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.legalFor({{p0, s64}})
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.clampScalar(1, s64, s64);
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getActionDefinitionsBuilder(G_PTR_MASK).legalFor({p0});
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getActionDefinitionsBuilder({G_LSHR, G_ASHR, G_SDIV, G_UDIV})
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.legalFor({s32, s64})
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(0);
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getActionDefinitionsBuilder({G_SREM, G_UREM})
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.lowerFor({s1, s8, s16, s32, s64});
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getActionDefinitionsBuilder({G_SMULO, G_UMULO})
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.lowerFor({{s64, s1}});
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getActionDefinitionsBuilder({G_SMULH, G_UMULH}).legalFor({s32, s64});
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getActionDefinitionsBuilder({G_UADDE, G_USUBE, G_SADDO, G_SSUBO})
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.legalFor({{s32, s1}, {s64, s1}});
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getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMA, G_FMUL, G_FDIV})
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.legalFor({s32, s64});
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getActionDefinitionsBuilder({G_FREM, G_FPOW}).libcallFor({s32, s64});
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getActionDefinitionsBuilder(G_INSERT)
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.unsupportedIf([=](const LegalityQuery &Query) {
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return Query.Types[0].getSizeInBits() <= Query.Types[1].getSizeInBits();
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})
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.legalIf([=](const LegalityQuery &Query) {
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const LLT &Ty0 = Query.Types[0];
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const LLT &Ty1 = Query.Types[1];
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if (Ty0 != s32 && Ty0 != s64 && Ty0 != p0)
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return false;
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return isPowerOf2_32(Ty1.getSizeInBits()) &&
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(Ty1.getSizeInBits() == 1 || Ty1.getSizeInBits() >= 8);
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})
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(0)
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.maxScalarIf(typeInSet(0, {s32}), 1, s16)
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.maxScalarIf(typeInSet(0, {s64}), 1, s32)
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.widenScalarToNextPow2(1);
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getActionDefinitionsBuilder(G_EXTRACT)
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.unsupportedIf([=](const LegalityQuery &Query) {
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return Query.Types[0].getSizeInBits() >= Query.Types[1].getSizeInBits();
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})
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.legalIf([=](const LegalityQuery &Query) {
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const LLT &Ty0 = Query.Types[0];
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const LLT &Ty1 = Query.Types[1];
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if (Ty1 != s32 && Ty1 != s64)
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return false;
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if (Ty1 == p0)
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return true;
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return isPowerOf2_32(Ty0.getSizeInBits()) &&
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(Ty0.getSizeInBits() == 1 || Ty0.getSizeInBits() >= 8);
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})
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.clampScalar(1, s32, s64)
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.widenScalarToNextPow2(1)
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.maxScalarIf(typeInSet(1, {s32}), 0, s16)
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.maxScalarIf(typeInSet(1, {s64}), 0, s32)
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.widenScalarToNextPow2(0);
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getActionDefinitionsBuilder({G_LOAD, G_STORE})
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.legalFor(
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{{s8, p0}, {s16, p0}, {s32, p0}, {s64, p0}, {p0, p0}, {v2s32, p0}})
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.clampScalar(0, s8, s64)
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.widenScalarToNextPow2(0)
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.clampNumElements(0, v2s32, v2s32);
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// Constants
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getActionDefinitionsBuilder(G_CONSTANT)
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.legalFor({p0, s32, s64})
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(0);
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getActionDefinitionsBuilder(G_FCONSTANT)
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.legalFor({s32, s64})
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.clampScalar(0, s32, s64);
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getActionDefinitionsBuilder(G_ICMP)
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.legalFor({{s32, s32}, {s32, s64}, {s32, p0}})
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.clampScalar(0, s32, s32)
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.clampScalar(1, s32, s64)
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.widenScalarToNextPow2(1);
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getActionDefinitionsBuilder(G_FCMP)
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.legalFor({{s32, s32}, {s32, s64}})
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.clampScalar(0, s32, s32)
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.clampScalar(1, s32, s64)
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.widenScalarToNextPow2(1);
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// Extensions
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getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
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.legalFor({s1, s8, s16, s32, s64})
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.maxScalar(0, s64)
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.widenScalarToNextPow2(0);
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// FP conversions
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getActionDefinitionsBuilder(G_FPTRUNC).legalFor(
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{{s16, s32}, {s16, s64}, {s32, s64}});
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getActionDefinitionsBuilder(G_FPEXT).legalFor(
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{{s32, s16}, {s64, s16}, {s64, s32}});
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// Conversions
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getActionDefinitionsBuilder({G_FPTOSI, G_FPTOUI})
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.legalForCartesianProduct({s32, s64})
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(0)
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.clampScalar(1, s32, s64)
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.widenScalarToNextPow2(1);
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getActionDefinitionsBuilder({G_SITOFP, G_UITOFP})
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.legalForCartesianProduct({s32, s64})
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.clampScalar(1, s32, s64)
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.widenScalarToNextPow2(1)
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(0);
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// Control-flow
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getActionDefinitionsBuilder(G_BRCOND).legalFor({s1, s8, s16, s32});
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getActionDefinitionsBuilder(G_BRINDIRECT).legalFor({p0});
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// Select
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getActionDefinitionsBuilder(G_SELECT)
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.legalFor({{s32, s1}, {s64, s1}, {p0, s1}})
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(0);
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// Pointer-handling
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getActionDefinitionsBuilder(G_FRAME_INDEX).legalFor({p0});
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getActionDefinitionsBuilder(G_GLOBAL_VALUE).legalFor({p0});
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getActionDefinitionsBuilder(G_PTRTOINT)
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.legalForCartesianProduct({s1, s8, s16, s32, s64}, {p0})
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.maxScalar(0, s64)
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.widenScalarToNextPow2(0, /*Min*/ 8);
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getActionDefinitionsBuilder(G_INTTOPTR)
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.unsupportedIf([&](const LegalityQuery &Query) {
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return Query.Types[0].getSizeInBits() != Query.Types[1].getSizeInBits();
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})
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.legalFor({s64, p0});
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// Casts for 32 and 64-bit width type are just copies.
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// Same for 128-bit width type, except they are on the FPR bank.
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getActionDefinitionsBuilder(G_BITCAST)
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// FIXME: This is wrong since G_BITCAST is not allowed to change the
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// number of bits but it's what the previous code described and fixing
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// it breaks tests.
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.legalForCartesianProduct({s1, s8, s16, s32, s64, s128, v16s8, v8s8, v4s8,
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v8s16, v4s16, v2s16, v4s32, v2s32, v2s64});
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getActionDefinitionsBuilder(G_VASTART).legalFor({p0});
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// va_list must be a pointer, but most sized types are pretty easy to handle
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// as the destination.
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getActionDefinitionsBuilder(G_VAARG)
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.customForCartesianProduct({s8, s16, s32, s64, p0}, {p0})
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.clampScalar(0, s8, s64)
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.widenScalarToNextPow2(0, /*Min*/ 8);
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if (ST.hasLSE()) {
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getActionDefinitionsBuilder(G_ATOMIC_CMPXCHG)
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.legalForCartesianProduct({s8, s16, s32, s64}, {p0});
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}
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if (ST.hasLSE()) {
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getActionDefinitionsBuilder(G_ATOMIC_CMPXCHG_WITH_SUCCESS)
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.lowerFor({s8, s16, s32, s64});
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getActionDefinitionsBuilder(
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{G_ATOMICRMW_XCHG, G_ATOMICRMW_ADD, G_ATOMICRMW_SUB, G_ATOMICRMW_AND,
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G_ATOMICRMW_OR, G_ATOMICRMW_XOR, G_ATOMICRMW_MIN, G_ATOMICRMW_MAX,
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G_ATOMICRMW_UMIN, G_ATOMICRMW_UMAX})
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.legalForCartesianProduct({s8, s16, s32, s64}, {p0});
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}
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// Merge/Unmerge
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for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
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unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
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unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
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auto notValidElt = [](const LegalityQuery &Query, unsigned TypeIdx) {
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const LLT &Ty = Query.Types[TypeIdx];
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if (Ty.isVector()) {
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const LLT &EltTy = Ty.getElementType();
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if (EltTy.getSizeInBits() < 8 || EltTy.getSizeInBits() > 64)
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return true;
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if (!isPowerOf2_32(EltTy.getSizeInBits()))
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return true;
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}
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return false;
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};
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auto scalarize =
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[](const LegalityQuery &Query, unsigned TypeIdx) {
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const LLT &Ty = Query.Types[TypeIdx];
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return std::make_pair(TypeIdx, Ty.getElementType());
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};
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// FIXME: This rule is horrible, but specifies the same as what we had
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// before with the particularly strange definitions removed (e.g.
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// s8 = G_MERGE_VALUES s32, s32).
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// Part of the complexity comes from these ops being extremely flexible. For
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// example, you can build/decompose vectors with it, concatenate vectors,
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// etc. and in addition to this you can also bitcast with it at the same
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// time. We've been considering breaking it up into multiple ops to make it
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// more manageable throughout the backend.
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getActionDefinitionsBuilder(Op)
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// Break up vectors with weird elements into scalars
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.fewerElementsIf(
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[=](const LegalityQuery &Query) { return notValidElt(Query, 0); },
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[=](const LegalityQuery &Query) { return scalarize(Query, 0); })
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.fewerElementsIf(
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[=](const LegalityQuery &Query) { return notValidElt(Query, 1); },
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[=](const LegalityQuery &Query) { return scalarize(Query, 1); })
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// Clamp the big scalar to s8-s512 and make it either a power of 2, 192,
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// or 384.
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.clampScalar(BigTyIdx, s8, s512)
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.widenScalarIf(
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[=](const LegalityQuery &Query) {
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const LLT &Ty = Query.Types[BigTyIdx];
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return !isPowerOf2_32(Ty.getSizeInBits()) &&
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Ty.getSizeInBits() % 64 != 0;
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},
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[=](const LegalityQuery &Query) {
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// Pick the next power of 2, or a multiple of 64 over 128.
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// Whichever is smaller.
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const LLT &Ty = Query.Types[BigTyIdx];
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unsigned NewSizeInBits = 1
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<< Log2_32_Ceil(Ty.getSizeInBits() + 1);
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if (NewSizeInBits >= 256) {
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unsigned RoundedTo = alignTo<64>(Ty.getSizeInBits() + 1);
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if (RoundedTo < NewSizeInBits)
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NewSizeInBits = RoundedTo;
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}
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return std::make_pair(BigTyIdx, LLT::scalar(NewSizeInBits));
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})
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// Clamp the little scalar to s8-s256 and make it a power of 2. It's not
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// worth considering the multiples of 64 since 2*192 and 2*384 are not
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// valid.
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.clampScalar(LitTyIdx, s8, s256)
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.widenScalarToNextPow2(LitTyIdx, /*Min*/ 8)
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// So at this point, we have s8, s16, s32, s64, s128, s192, s256, s384,
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// s512, <X x s8>, <X x s16>, <X x s32>, or <X x s64>.
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// At this point it's simple enough to accept the legal types.
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.legalIf([=](const LegalityQuery &Query) {
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const LLT &BigTy = Query.Types[BigTyIdx];
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const LLT &LitTy = Query.Types[LitTyIdx];
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if (BigTy.isVector() && BigTy.getSizeInBits() < 32)
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return false;
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if (LitTy.isVector() && LitTy.getSizeInBits() < 32)
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return false;
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return BigTy.getSizeInBits() % LitTy.getSizeInBits() == 0;
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})
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// Any vectors left are the wrong size. Scalarize them.
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.fewerElementsIf([](const LegalityQuery &Query) { return true; },
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[](const LegalityQuery &Query) {
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return std::make_pair(
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0, Query.Types[0].getElementType());
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})
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.fewerElementsIf([](const LegalityQuery &Query) { return true; },
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[](const LegalityQuery &Query) {
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return std::make_pair(
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1, Query.Types[1].getElementType());
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});
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}
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computeTables();
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}
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bool AArch64LegalizerInfo::legalizeCustom(MachineInstr &MI,
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MachineRegisterInfo &MRI,
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MachineIRBuilder &MIRBuilder) const {
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switch (MI.getOpcode()) {
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default:
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// No idea what to do.
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return false;
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case TargetOpcode::G_VAARG:
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return legalizeVaArg(MI, MRI, MIRBuilder);
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}
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llvm_unreachable("expected switch to return");
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}
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bool AArch64LegalizerInfo::legalizeVaArg(MachineInstr &MI,
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MachineRegisterInfo &MRI,
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MachineIRBuilder &MIRBuilder) const {
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MIRBuilder.setInstr(MI);
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MachineFunction &MF = MIRBuilder.getMF();
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unsigned Align = MI.getOperand(2).getImm();
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unsigned Dst = MI.getOperand(0).getReg();
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unsigned ListPtr = MI.getOperand(1).getReg();
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LLT PtrTy = MRI.getType(ListPtr);
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LLT IntPtrTy = LLT::scalar(PtrTy.getSizeInBits());
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const unsigned PtrSize = PtrTy.getSizeInBits() / 8;
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unsigned List = MRI.createGenericVirtualRegister(PtrTy);
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MIRBuilder.buildLoad(
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List, ListPtr,
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*MF.getMachineMemOperand(MachinePointerInfo(), MachineMemOperand::MOLoad,
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PtrSize, /* Align = */ PtrSize));
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unsigned DstPtr;
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if (Align > PtrSize) {
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// Realign the list to the actual required alignment.
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auto AlignMinus1 = MIRBuilder.buildConstant(IntPtrTy, Align - 1);
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unsigned ListTmp = MRI.createGenericVirtualRegister(PtrTy);
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MIRBuilder.buildGEP(ListTmp, List, AlignMinus1->getOperand(0).getReg());
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DstPtr = MRI.createGenericVirtualRegister(PtrTy);
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MIRBuilder.buildPtrMask(DstPtr, ListTmp, Log2_64(Align));
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} else
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DstPtr = List;
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uint64_t ValSize = MRI.getType(Dst).getSizeInBits() / 8;
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MIRBuilder.buildLoad(
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Dst, DstPtr,
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*MF.getMachineMemOperand(MachinePointerInfo(), MachineMemOperand::MOLoad,
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ValSize, std::max(Align, PtrSize)));
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unsigned SizeReg = MRI.createGenericVirtualRegister(IntPtrTy);
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MIRBuilder.buildConstant(SizeReg, alignTo(ValSize, PtrSize));
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unsigned NewList = MRI.createGenericVirtualRegister(PtrTy);
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MIRBuilder.buildGEP(NewList, DstPtr, SizeReg);
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MIRBuilder.buildStore(
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NewList, ListPtr,
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*MF.getMachineMemOperand(MachinePointerInfo(), MachineMemOperand::MOStore,
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PtrSize, /* Align = */ PtrSize));
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MI.eraseFromParent();
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return true;
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}
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