1611a23a5b
This change adds implementation for named barriers for SPIRV backend. Since there is no built in API/intrinsics for named barrier in SPIRV, the implementation loosely follows implementation for AMD
52 lines
1.7 KiB
C++
52 lines
1.7 KiB
C++
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// clang-format off
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// RUN: %libomptarget-compilexx-generic
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// RUN: %not --crash env -u LLVM_DISABLE_SYMBOLIZATION OFFLOAD_TRACK_NUM_KERNEL_LAUNCH_TRACES=1 %libomptarget-run-generic 2>&1 | %fcheck-generic --check-prefixes=CHECK,TRACE,NDEBG
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// RUN: %not --crash %libomptarget-run-generic 2>&1 | %fcheck-generic --check-prefixes=CHECK
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// RUN: %libomptarget-compilexx-generic -g
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// RUN: %not --crash env -u LLVM_DISABLE_SYMBOLIZATION OFFLOAD_TRACK_NUM_KERNEL_LAUNCH_TRACES=1 %libomptarget-run-generic 2>&1 | %fcheck-generic --check-prefixes=CHECK,TRACE,DEBUG
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// RUN: %not --crash %libomptarget-run-generic 2>&1 | %fcheck-generic --check-prefixes=CHECK
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// clang-format on
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// UNSUPPORTED: nvptx64-nvidia-cuda
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// UNSUPPORTED: nvptx64-nvidia-cuda-LTO
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// UNSUPPORTED: aarch64-unknown-linux-gnu
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// UNSUPPORTED: x86_64-unknown-linux-gnu
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// UNSUPPORTED: s390x-ibm-linux-gnu
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// https://github.com/llvm/llvm-project/issues/182119
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// UNSUPPORTED: intelgpu
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struct S {};
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template <typename T> void cxx_function_name(int I, T *) {
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#pragma omp target
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{
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}
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#pragma omp target
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{
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}
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#pragma omp target
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{
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__builtin_trap();
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}
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#pragma omp target
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{
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}
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}
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int main(void) {
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struct S s;
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cxx_function_name(1, &s);
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}
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// clang-format off
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// CHECK: OFFLOAD ERROR: Kernel 'omp target in void cxx_function_name<S>(int, S*) @ [[LINE:[0-9]+]] (__omp_offloading_{{.*}}__Z17cxx_function_nameI1SEviPT__l[[LINE]])'
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// CHECK: OFFLOAD ERROR: execution interrupted by hardware trap instruction
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// TRACE: launchKernel
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// NDEBG: cxx_function_name<S>(int, S*)
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// NDEBG: main
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// DEBUG: cxx_function_name<S>(int, S*) {{.*}}kernel_trap.cpp:
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// DEBUG: main {{.*}}kernel_trap.cpp:
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// clang-format on
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