fdc4274e2f
If a float-typed call site is marked with afn, replace the 4 flavors of pow with a faster variant. This transforms pow, powr, pown, and rootn to __pow_fast, __powr_fast, __pown_fast, and __rootn_fast if available. Also attempts to handle all of the same basic folds on the new fast variants that were already performed with the base forms. This maintains optimizations with OpenCL when the device libs unsafe math control library is deleted. This maintains the status quo of how libcalls work, and only handles 4 new entry points. This only helps with the elimination of the control library, and not general libcall emission problems. This makes no practical difference for HIP, which is the status quo for libcall optimizations. AMDGPULibCalls recognizes the OpenCL mangled names. e.g., OpenCL float "pow" is really _Z3powff but the HIP provided function "powf" is really named _ZL4powfff, and std::pow with float is _ZL3powff. The pass still runs for HIP, so by accident if you used the OpenCL mangled function names, this would trigger. Since the functions cannot yet be relied on from the library, introduce a temporary module flag check. I'm not planning on emitting it anywhere and it's a poor substitute for versioning the target.
6160 lines
405 KiB
LLVM
6160 lines
405 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib,instcombine -amdgpu-prelink %s | FileCheck -check-prefixes=CHECK,PRELINK %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib,instcombine %s | FileCheck -check-prefixes=CHECK,NOPRELINK %s
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declare float @_Z3powff(float, float)
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declare <2 x float> @_Z3powDv2_fS_(<2 x float>, <2 x float>)
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declare <3 x float> @_Z3powDv3_fS_(<3 x float>, <3 x float>)
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declare <4 x float> @_Z3powDv4_fS_(<4 x float>, <4 x float>)
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declare <8 x float> @_Z3powDv8_fS_(<8 x float>, <8 x float>)
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declare <16 x float> @_Z3powDv16_fS_(<16 x float>, <16 x float>)
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declare double @_Z3powdd(double, double)
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declare <2 x double> @_Z3powDv2_dS_(<2 x double>, <2 x double>)
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declare <3 x double> @_Z3powDv3_dS_(<3 x double>, <3 x double>)
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declare <4 x double> @_Z3powDv4_dS_(<4 x double>, <4 x double>)
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declare <8 x double> @_Z3powDv8_dS_(<8 x double>, <8 x double>)
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declare <16 x double> @_Z3powDv16_dS_(<16 x double>, <16 x double>)
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declare half @_Z3powDhDh(half, half)
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declare <2 x half> @_Z3powDv2_DhS_(<2 x half>, <2 x half>)
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declare <3 x half> @_Z3powDv3_DhS_(<3 x half>, <3 x half>)
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declare <4 x half> @_Z3powDv4_DhS_(<4 x half>, <4 x half>)
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declare <8 x half> @_Z3powDv8_DhS_(<8 x half>, <8 x half>)
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declare <16 x half> @_Z3powDv16_DhS_(<16 x half>, <16 x half>)
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declare void @llvm.assume(i1 noundef)
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declare float @llvm.floor.f32(float)
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declare float @llvm.ceil.f32(float)
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declare float @llvm.trunc.f32(float)
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declare float @llvm.rint.f32(float)
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declare float @llvm.nearbyint.f32(float)
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declare float @llvm.round.f32(float)
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declare float @llvm.roundeven.f32(float)
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define float @test_pow_fast_f32(float %x, float %y) {
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; PRELINK-LABEL: define float @test_pow_fast_f32
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; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
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; PRELINK-NEXT: [[POW:%.*]] = tail call fast float @_Z10__pow_fastff(float [[X]], float [[Y]])
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; PRELINK-NEXT: ret float [[POW]]
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;
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; NOPRELINK-LABEL: define float @test_pow_fast_f32
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; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
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; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp fast oeq float [[X]], 1.000000e+00
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; NOPRELINK-NEXT: [[TMP2:%.*]] = select fast i1 [[TMP1]], float 1.000000e+00, float [[Y]]
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; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp fast oeq float [[TMP2]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP4:%.*]] = select fast i1 [[TMP3]], float 1.000000e+00, float [[X]]
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; NOPRELINK-NEXT: [[TMP5:%.*]] = call fast float @llvm.fabs.f32(float [[TMP4]])
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; NOPRELINK-NEXT: [[TMP6:%.*]] = call fast float @llvm.log2.f32(float [[TMP5]])
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; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul fast float [[TMP2]], [[TMP6]]
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; NOPRELINK-NEXT: [[TMP8:%.*]] = call fast float @llvm.exp2.f32(float [[TMP7]])
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; NOPRELINK-NEXT: [[TMP9:%.*]] = call fast float @llvm.trunc.f32(float [[TMP2]])
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; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp fast oeq float [[TMP9]], [[TMP2]]
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; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul fast float [[TMP2]], 5.000000e-01
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; NOPRELINK-NEXT: [[TMP12:%.*]] = call fast float @llvm.trunc.f32(float [[TMP11]])
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; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp fast une float [[TMP12]], [[TMP11]]
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; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
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; NOPRELINK-NEXT: [[TMP15:%.*]] = select fast i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
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; NOPRELINK-NEXT: [[TMP16:%.*]] = call fast float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
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; NOPRELINK-NEXT: [[TMP17:%.*]] = call fast float @llvm.trunc.f32(float [[TMP2]])
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; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp fast une float [[TMP17]], [[TMP2]]
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; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp fast olt float [[TMP4]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
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; NOPRELINK-NEXT: [[TMP21:%.*]] = select fast i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
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; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp fast oeq float [[TMP4]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp fast olt float [[TMP2]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP24:%.*]] = xor i1 [[TMP22]], [[TMP23]]
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; NOPRELINK-NEXT: [[TMP25:%.*]] = select fast i1 [[TMP24]], float 0.000000e+00, float 0x7FF0000000000000
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; NOPRELINK-NEXT: [[TMP26:%.*]] = select fast i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
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; NOPRELINK-NEXT: [[TMP27:%.*]] = call fast float @llvm.copysign.f32(float [[TMP25]], float [[TMP26]])
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; NOPRELINK-NEXT: [[TMP28:%.*]] = select fast i1 [[TMP22]], float [[TMP27]], float [[TMP21]]
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; NOPRELINK-NEXT: ret float [[TMP28]]
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;
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%pow = tail call fast float @_Z3powff(float %x, float %y)
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ret float %pow
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}
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define <2 x float> @test_pow_fast_v2f32(<2 x float> %x, <2 x float> %y) {
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; PRELINK-LABEL: define <2 x float> @test_pow_fast_v2f32
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; PRELINK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
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; PRELINK-NEXT: [[POW:%.*]] = tail call fast <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
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; PRELINK-NEXT: ret <2 x float> [[POW]]
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;
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; NOPRELINK-LABEL: define <2 x float> @test_pow_fast_v2f32
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; NOPRELINK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
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; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp fast oeq <2 x float> [[X]], splat (float 1.000000e+00)
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; NOPRELINK-NEXT: [[TMP2:%.*]] = select fast <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> [[Y]]
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; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp fast oeq <2 x float> [[TMP2]], zeroinitializer
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; NOPRELINK-NEXT: [[TMP4:%.*]] = select fast <2 x i1> [[TMP3]], <2 x float> splat (float 1.000000e+00), <2 x float> [[X]]
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; NOPRELINK-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
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; NOPRELINK-NEXT: [[TMP6:%.*]] = call fast <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP5]])
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; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul fast <2 x float> [[TMP2]], [[TMP6]]
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; NOPRELINK-NEXT: [[TMP8:%.*]] = call fast <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP7]])
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; NOPRELINK-NEXT: [[TMP9:%.*]] = call fast <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
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; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp fast oeq <2 x float> [[TMP9]], [[TMP2]]
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; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul fast <2 x float> [[TMP2]], splat (float 5.000000e-01)
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; NOPRELINK-NEXT: [[TMP12:%.*]] = call fast <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP11]])
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; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp fast une <2 x float> [[TMP12]], [[TMP11]]
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; NOPRELINK-NEXT: [[TMP14:%.*]] = and <2 x i1> [[TMP10]], [[TMP13]]
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; NOPRELINK-NEXT: [[TMP15:%.*]] = select fast <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> splat (float 1.000000e+00)
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; NOPRELINK-NEXT: [[TMP16:%.*]] = call fast <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP8]], <2 x float> [[TMP15]])
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; NOPRELINK-NEXT: [[TMP17:%.*]] = call fast <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
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; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp fast une <2 x float> [[TMP17]], [[TMP2]]
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; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp fast olt <2 x float> [[TMP4]], zeroinitializer
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; NOPRELINK-NEXT: [[TMP20:%.*]] = and <2 x i1> [[TMP19]], [[TMP18]]
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; NOPRELINK-NEXT: [[TMP21:%.*]] = select fast <2 x i1> [[TMP20]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP16]]
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; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp fast oeq <2 x float> [[TMP4]], zeroinitializer
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; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp fast olt <2 x float> [[TMP2]], zeroinitializer
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; NOPRELINK-NEXT: [[TMP24:%.*]] = xor <2 x i1> [[TMP22]], [[TMP23]]
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; NOPRELINK-NEXT: [[TMP25:%.*]] = select fast <2 x i1> [[TMP24]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
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; NOPRELINK-NEXT: [[TMP26:%.*]] = select fast <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> zeroinitializer
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; NOPRELINK-NEXT: [[TMP27:%.*]] = call fast <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP25]], <2 x float> [[TMP26]])
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; NOPRELINK-NEXT: [[TMP28:%.*]] = select fast <2 x i1> [[TMP22]], <2 x float> [[TMP27]], <2 x float> [[TMP21]]
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; NOPRELINK-NEXT: ret <2 x float> [[TMP28]]
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;
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%pow = tail call fast <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y)
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ret <2 x float> %pow
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}
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define float @test_pow_afn_f32_nnan(float %x, float %y) {
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; PRELINK-LABEL: define float @test_pow_afn_f32_nnan
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; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
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; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn float @_Z10__pow_fastff(float [[X]], float [[Y]])
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; PRELINK-NEXT: ret float [[POW]]
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;
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; NOPRELINK-LABEL: define float @test_pow_afn_f32_nnan
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; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
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; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan afn oeq float [[X]], 1.000000e+00
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; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
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; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan afn oeq float [[TMP2]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
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; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
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; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan afn float @llvm.log2.f32(float [[TMP5]])
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; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan afn float [[TMP2]], [[TMP6]]
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; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan afn float @llvm.exp2.f32(float [[TMP7]])
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; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
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; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan afn oeq float [[TMP9]], [[TMP2]]
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; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
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; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP11]])
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; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan afn une float [[TMP12]], [[TMP11]]
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; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
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; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
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; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
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; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
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; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan afn une float [[TMP17]], [[TMP2]]
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; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp nnan afn olt float [[TMP4]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
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; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
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; NOPRELINK-NEXT: [[TMP22:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
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; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan afn oeq float [[TMP22]], 0x7FF0000000000000
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; NOPRELINK-NEXT: [[TMP24:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
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; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp nnan afn une float [[TMP2]], [[TMP24]]
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; NOPRELINK-NEXT: [[TMP26:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
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; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp nnan afn oeq float [[TMP26]], 1.000000e+00
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; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp nnan afn olt float [[TMP26]], 1.000000e+00
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; NOPRELINK-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], [[TMP25]]
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; NOPRELINK-NEXT: [[TMP30:%.*]] = select nnan afn i1 [[TMP29]], float 0.000000e+00, float [[TMP24]]
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; NOPRELINK-NEXT: [[TMP31:%.*]] = select nnan afn i1 [[TMP27]], float 1.000000e+00, float [[TMP30]]
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; NOPRELINK-NEXT: [[TMP32:%.*]] = select nnan afn i1 [[TMP23]], float [[TMP31]], float [[TMP21]]
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; NOPRELINK-NEXT: [[TMP33:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
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; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp nnan afn oeq float [[TMP33]], 0x7FF0000000000000
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; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp nnan afn oeq float [[TMP4]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP36:%.*]] = or i1 [[TMP34]], [[TMP35]]
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; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp nnan afn olt float [[TMP2]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP38:%.*]] = xor i1 [[TMP35]], [[TMP37]]
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; NOPRELINK-NEXT: [[TMP39:%.*]] = select nnan afn i1 [[TMP38]], float 0.000000e+00, float 0x7FF0000000000000
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; NOPRELINK-NEXT: [[TMP40:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
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; NOPRELINK-NEXT: [[TMP41:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP39]], float [[TMP40]])
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; NOPRELINK-NEXT: [[TMP42:%.*]] = select nnan afn i1 [[TMP36]], float [[TMP41]], float [[TMP32]]
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; NOPRELINK-NEXT: ret float [[TMP42]]
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;
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%pow = tail call afn nnan float @_Z3powff(float %x, float %y)
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ret float %pow
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}
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define float @test_pow_afn_f32_nnan_ninf(float %x, float %y) {
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; PRELINK-LABEL: define float @test_pow_afn_f32_nnan_ninf
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; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
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; PRELINK-NEXT: [[POW:%.*]] = tail call nnan ninf afn float @_Z10__pow_fastff(float [[X]], float [[Y]])
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; PRELINK-NEXT: ret float [[POW]]
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;
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; NOPRELINK-LABEL: define float @test_pow_afn_f32_nnan_ninf
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; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
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; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan ninf afn oeq float [[X]], 1.000000e+00
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; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan ninf afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
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; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan ninf afn oeq float [[TMP2]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan ninf afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
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; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[TMP4]])
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; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[TMP5]])
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; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan ninf afn float [[TMP2]], [[TMP6]]
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; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan ninf afn float @llvm.exp2.f32(float [[TMP7]])
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; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan ninf afn float @llvm.trunc.f32(float [[TMP2]])
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; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan ninf afn oeq float [[TMP9]], [[TMP2]]
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; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan ninf afn float [[TMP2]], 5.000000e-01
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; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan ninf afn float @llvm.trunc.f32(float [[TMP11]])
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; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan ninf afn une float [[TMP12]], [[TMP11]]
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; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
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; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan ninf afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
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; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
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; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan ninf afn float @llvm.trunc.f32(float [[TMP2]])
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; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan ninf afn une float [[TMP17]], [[TMP2]]
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; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp nnan ninf afn olt float [[TMP4]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
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; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan ninf afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
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; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp nnan ninf afn oeq float [[TMP4]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan ninf afn olt float [[TMP2]], 0.000000e+00
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; NOPRELINK-NEXT: [[TMP24:%.*]] = xor i1 [[TMP22]], [[TMP23]]
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; NOPRELINK-NEXT: [[TMP25:%.*]] = select nnan ninf afn i1 [[TMP24]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select nnan ninf afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[TMP25]], float [[TMP26]])
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = select nnan ninf afn i1 [[TMP22]], float [[TMP27]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: ret float [[TMP28]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan(<2 x float> %x, <2 x float> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan afn <2 x i1> [[TMP3]], <2 x float> splat (float 1.000000e+00), <2 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan afn <2 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan afn une <2 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <2 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP8]], <2 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan afn une <2 x float> [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp nnan afn olt <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and <2 x i1> [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan afn <2 x i1> [[TMP20]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP22]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp nnan afn une <2 x float> [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp nnan afn olt <2 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor <2 x i1> [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select nnan afn <2 x i1> [[TMP29]], <2 x float> zeroinitializer, <2 x float> [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select nnan afn <2 x i1> [[TMP27]], <2 x float> splat (float 1.000000e+00), <2 x float> [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select nnan afn <2 x i1> [[TMP23]], <2 x float> [[TMP31]], <2 x float> [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP33]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or <2 x i1> [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp nnan afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor <2 x i1> [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select nnan afn <2 x i1> [[TMP38]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select nnan afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call nnan afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP39]], <2 x float> [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select nnan afn <2 x i1> [[TMP36]], <2 x float> [[TMP41]], <2 x float> [[TMP32]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP42]]
|
|
;
|
|
%pow = tail call afn nnan <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan_ninf(<2 x float> %x, <2 x float> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan ninf afn <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan ninf afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan ninf afn <2 x i1> [[TMP3]], <2 x float> splat (float 1.000000e+00), <2 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan ninf afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan ninf afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan ninf afn <2 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan ninf afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan ninf afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan ninf afn une <2 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <2 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan ninf afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP8]], <2 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan ninf afn une <2 x float> [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp nnan ninf afn olt <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and <2 x i1> [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan ninf afn <2 x i1> [[TMP20]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan ninf afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = xor <2 x i1> [[TMP22]], [[TMP23]]
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select nnan ninf afn <2 x i1> [[TMP24]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select nnan ninf afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP25]], <2 x float> [[TMP26]])
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = select nnan ninf afn <2 x i1> [[TMP22]], <2 x float> [[TMP27]], <2 x float> [[TMP21]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP28]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32(float %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z10__pow_fastff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp afn une float [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp afn oeq float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn olt float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select afn i1 [[TMP29]], float 0.000000e+00, float [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP27]], float 1.000000e+00, float [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select afn i1 [[TMP23]], float [[TMP31]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp afn oeq float [[TMP33]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or i1 [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor i1 [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn i1 [[TMP38]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call afn float @llvm.copysign.f32(float [[TMP39]], float [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select afn i1 [[TMP36]], float [[TMP41]], float [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP43:%.*]] = fcmp afn uno float [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP44:%.*]] = select afn i1 [[TMP43]], float 0x7FF8000000000000, float [[TMP42]]
|
|
; NOPRELINK-NEXT: ret float [[TMP44]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32(<2 x float> %x, <2 x float> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn <2 x i1> [[TMP3]], <2 x float> splat (float 1.000000e+00), <2 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq <2 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une <2 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <2 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP8]], <2 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une <2 x float> [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and <2 x i1> [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn <2 x i1> [[TMP20]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq <2 x float> [[TMP22]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp afn une <2 x float> [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp afn oeq <2 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn olt <2 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor <2 x i1> [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select afn <2 x i1> [[TMP29]], <2 x float> zeroinitializer, <2 x float> [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP27]], <2 x float> splat (float 1.000000e+00), <2 x float> [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP31]], <2 x float> [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp afn oeq <2 x float> [[TMP33]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp afn oeq <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or <2 x i1> [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor <2 x i1> [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn <2 x i1> [[TMP38]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP39]], <2 x float> [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select afn <2 x i1> [[TMP36]], <2 x float> [[TMP41]], <2 x float> [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP43:%.*]] = fcmp afn uno <2 x float> [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP44:%.*]] = select afn <2 x i1> [[TMP43]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP42]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP44]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <3 x float> @test_pow_afn_v3f32(<3 x float> %x, <3 x float> %y) {
|
|
; PRELINK-LABEL: define <3 x float> @test_pow_afn_v3f32
|
|
; PRELINK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <3 x float> @_Z10__pow_fastDv3_fS_(<3 x float> [[X]], <3 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <3 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <3 x float> @test_pow_afn_v3f32
|
|
; NOPRELINK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <3 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <3 x i1> [[TMP1]], <3 x float> splat (float 1.000000e+00), <3 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq <3 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn <3 x i1> [[TMP3]], <3 x float> splat (float 1.000000e+00), <3 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <3 x float> @llvm.log2.v3f32(<3 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn <3 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn <3 x float> @llvm.exp2.v3f32(<3 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn <3 x float> @llvm.trunc.v3f32(<3 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq <3 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn <3 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn <3 x float> @llvm.trunc.v3f32(<3 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une <3 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <3 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn <3 x i1> [[TMP14]], <3 x float> [[TMP4]], <3 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn <3 x float> @llvm.copysign.v3f32(<3 x float> [[TMP8]], <3 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn <3 x float> @llvm.trunc.v3f32(<3 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une <3 x float> [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt <3 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and <3 x i1> [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn <3 x i1> [[TMP20]], <3 x float> splat (float 0x7FF8000000000000), <3 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq <3 x float> [[TMP22]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp afn une <3 x float> [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp afn oeq <3 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn olt <3 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor <3 x i1> [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select afn <3 x i1> [[TMP29]], <3 x float> zeroinitializer, <3 x float> [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <3 x i1> [[TMP27]], <3 x float> splat (float 1.000000e+00), <3 x float> [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select afn <3 x i1> [[TMP23]], <3 x float> [[TMP31]], <3 x float> [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp afn oeq <3 x float> [[TMP33]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp afn oeq <3 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or <3 x i1> [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp afn olt <3 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor <3 x i1> [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn <3 x i1> [[TMP38]], <3 x float> zeroinitializer, <3 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select afn <3 x i1> [[TMP14]], <3 x float> [[TMP4]], <3 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call afn <3 x float> @llvm.copysign.v3f32(<3 x float> [[TMP39]], <3 x float> [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select afn <3 x i1> [[TMP36]], <3 x float> [[TMP41]], <3 x float> [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP43:%.*]] = fcmp afn uno <3 x float> [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP44:%.*]] = select afn <3 x i1> [[TMP43]], <3 x float> splat (float 0x7FF8000000000000), <3 x float> [[TMP42]]
|
|
; NOPRELINK-NEXT: ret <3 x float> [[TMP44]]
|
|
;
|
|
%pow = tail call afn <3 x float> @_Z3powDv3_fS_(<3 x float> %x, <3 x float> %y)
|
|
ret <3 x float> %pow
|
|
}
|
|
|
|
define <4 x float> @test_pow_afn_v4f32(<4 x float> %x, <4 x float> %y) {
|
|
; PRELINK-LABEL: define <4 x float> @test_pow_afn_v4f32
|
|
; PRELINK-SAME: (<4 x float> [[X:%.*]], <4 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <4 x float> @_Z10__pow_fastDv4_fS_(<4 x float> [[X]], <4 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <4 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <4 x float> @test_pow_afn_v4f32
|
|
; NOPRELINK-SAME: (<4 x float> [[X:%.*]], <4 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <4 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <4 x i1> [[TMP1]], <4 x float> splat (float 1.000000e+00), <4 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq <4 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn <4 x i1> [[TMP3]], <4 x float> splat (float 1.000000e+00), <4 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <4 x float> @llvm.log2.v4f32(<4 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn <4 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn <4 x float> @llvm.exp2.v4f32(<4 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn <4 x float> @llvm.trunc.v4f32(<4 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq <4 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn <4 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn <4 x float> @llvm.trunc.v4f32(<4 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une <4 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <4 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn <4 x i1> [[TMP14]], <4 x float> [[TMP4]], <4 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn <4 x float> @llvm.copysign.v4f32(<4 x float> [[TMP8]], <4 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn <4 x float> @llvm.trunc.v4f32(<4 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une <4 x float> [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt <4 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and <4 x i1> [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn <4 x i1> [[TMP20]], <4 x float> splat (float 0x7FF8000000000000), <4 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq <4 x float> [[TMP22]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call afn <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp afn une <4 x float> [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp afn oeq <4 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn olt <4 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor <4 x i1> [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select afn <4 x i1> [[TMP29]], <4 x float> zeroinitializer, <4 x float> [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <4 x i1> [[TMP27]], <4 x float> splat (float 1.000000e+00), <4 x float> [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select afn <4 x i1> [[TMP23]], <4 x float> [[TMP31]], <4 x float> [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call afn <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp afn oeq <4 x float> [[TMP33]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp afn oeq <4 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or <4 x i1> [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp afn olt <4 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor <4 x i1> [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn <4 x i1> [[TMP38]], <4 x float> zeroinitializer, <4 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select afn <4 x i1> [[TMP14]], <4 x float> [[TMP4]], <4 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call afn <4 x float> @llvm.copysign.v4f32(<4 x float> [[TMP39]], <4 x float> [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select afn <4 x i1> [[TMP36]], <4 x float> [[TMP41]], <4 x float> [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP43:%.*]] = fcmp afn uno <4 x float> [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP44:%.*]] = select afn <4 x i1> [[TMP43]], <4 x float> splat (float 0x7FF8000000000000), <4 x float> [[TMP42]]
|
|
; NOPRELINK-NEXT: ret <4 x float> [[TMP44]]
|
|
;
|
|
%pow = tail call afn <4 x float> @_Z3powDv4_fS_(<4 x float> %x, <4 x float> %y)
|
|
ret <4 x float> %pow
|
|
}
|
|
|
|
define <8 x float> @test_pow_afn_v8f32(<8 x float> %x, <8 x float> %y) {
|
|
; PRELINK-LABEL: define <8 x float> @test_pow_afn_v8f32
|
|
; PRELINK-SAME: (<8 x float> [[X:%.*]], <8 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <8 x float> @_Z10__pow_fastDv8_fS_(<8 x float> [[X]], <8 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <8 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <8 x float> @test_pow_afn_v8f32
|
|
; NOPRELINK-SAME: (<8 x float> [[X:%.*]], <8 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <8 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <8 x i1> [[TMP1]], <8 x float> splat (float 1.000000e+00), <8 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq <8 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn <8 x i1> [[TMP3]], <8 x float> splat (float 1.000000e+00), <8 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn <8 x float> @llvm.fabs.v8f32(<8 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <8 x float> @llvm.log2.v8f32(<8 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn <8 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn <8 x float> @llvm.exp2.v8f32(<8 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn <8 x float> @llvm.trunc.v8f32(<8 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq <8 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn <8 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn <8 x float> @llvm.trunc.v8f32(<8 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une <8 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <8 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn <8 x i1> [[TMP14]], <8 x float> [[TMP4]], <8 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn <8 x float> @llvm.copysign.v8f32(<8 x float> [[TMP8]], <8 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn <8 x float> @llvm.trunc.v8f32(<8 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une <8 x float> [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt <8 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and <8 x i1> [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn <8 x i1> [[TMP20]], <8 x float> splat (float 0x7FF8000000000000), <8 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn <8 x float> @llvm.fabs.v8f32(<8 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq <8 x float> [[TMP22]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call afn <8 x float> @llvm.fabs.v8f32(<8 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp afn une <8 x float> [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <8 x float> @llvm.fabs.v8f32(<8 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp afn oeq <8 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn olt <8 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor <8 x i1> [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select afn <8 x i1> [[TMP29]], <8 x float> zeroinitializer, <8 x float> [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <8 x i1> [[TMP27]], <8 x float> splat (float 1.000000e+00), <8 x float> [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select afn <8 x i1> [[TMP23]], <8 x float> [[TMP31]], <8 x float> [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call afn <8 x float> @llvm.fabs.v8f32(<8 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp afn oeq <8 x float> [[TMP33]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp afn oeq <8 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or <8 x i1> [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp afn olt <8 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor <8 x i1> [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn <8 x i1> [[TMP38]], <8 x float> zeroinitializer, <8 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select afn <8 x i1> [[TMP14]], <8 x float> [[TMP4]], <8 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call afn <8 x float> @llvm.copysign.v8f32(<8 x float> [[TMP39]], <8 x float> [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select afn <8 x i1> [[TMP36]], <8 x float> [[TMP41]], <8 x float> [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP43:%.*]] = fcmp afn uno <8 x float> [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP44:%.*]] = select afn <8 x i1> [[TMP43]], <8 x float> splat (float 0x7FF8000000000000), <8 x float> [[TMP42]]
|
|
; NOPRELINK-NEXT: ret <8 x float> [[TMP44]]
|
|
;
|
|
%pow = tail call afn <8 x float> @_Z3powDv8_fS_(<8 x float> %x, <8 x float> %y)
|
|
ret <8 x float> %pow
|
|
}
|
|
|
|
define <16 x float> @test_pow_afn_v16f32(<16 x float> %x, <16 x float> %y) {
|
|
; PRELINK-LABEL: define <16 x float> @test_pow_afn_v16f32
|
|
; PRELINK-SAME: (<16 x float> [[X:%.*]], <16 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <16 x float> @_Z10__pow_fastDv16_fS_(<16 x float> [[X]], <16 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <16 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <16 x float> @test_pow_afn_v16f32
|
|
; NOPRELINK-SAME: (<16 x float> [[X:%.*]], <16 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <16 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <16 x i1> [[TMP1]], <16 x float> splat (float 1.000000e+00), <16 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq <16 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn <16 x i1> [[TMP3]], <16 x float> splat (float 1.000000e+00), <16 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn <16 x float> @llvm.fabs.v16f32(<16 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <16 x float> @llvm.log2.v16f32(<16 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn <16 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn <16 x float> @llvm.exp2.v16f32(<16 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn <16 x float> @llvm.trunc.v16f32(<16 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq <16 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn <16 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn <16 x float> @llvm.trunc.v16f32(<16 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une <16 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <16 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn <16 x i1> [[TMP14]], <16 x float> [[TMP4]], <16 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn <16 x float> @llvm.copysign.v16f32(<16 x float> [[TMP8]], <16 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn <16 x float> @llvm.trunc.v16f32(<16 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une <16 x float> [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt <16 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and <16 x i1> [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn <16 x i1> [[TMP20]], <16 x float> splat (float 0x7FF8000000000000), <16 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn <16 x float> @llvm.fabs.v16f32(<16 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq <16 x float> [[TMP22]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call afn <16 x float> @llvm.fabs.v16f32(<16 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp afn une <16 x float> [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <16 x float> @llvm.fabs.v16f32(<16 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp afn oeq <16 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn olt <16 x float> [[TMP26]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor <16 x i1> [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select afn <16 x i1> [[TMP29]], <16 x float> zeroinitializer, <16 x float> [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <16 x i1> [[TMP27]], <16 x float> splat (float 1.000000e+00), <16 x float> [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select afn <16 x i1> [[TMP23]], <16 x float> [[TMP31]], <16 x float> [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call afn <16 x float> @llvm.fabs.v16f32(<16 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp afn oeq <16 x float> [[TMP33]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp afn oeq <16 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or <16 x i1> [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp afn olt <16 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor <16 x i1> [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn <16 x i1> [[TMP38]], <16 x float> zeroinitializer, <16 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select afn <16 x i1> [[TMP14]], <16 x float> [[TMP4]], <16 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call afn <16 x float> @llvm.copysign.v16f32(<16 x float> [[TMP39]], <16 x float> [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select afn <16 x i1> [[TMP36]], <16 x float> [[TMP41]], <16 x float> [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP43:%.*]] = fcmp afn uno <16 x float> [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP44:%.*]] = select afn <16 x i1> [[TMP43]], <16 x float> splat (float 0x7FF8000000000000), <16 x float> [[TMP42]]
|
|
; NOPRELINK-NEXT: ret <16 x float> [[TMP44]]
|
|
;
|
|
%pow = tail call afn <16 x float> @_Z3powDv16_fS_(<16 x float> %x, <16 x float> %y)
|
|
ret <16 x float> %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64(double %x, double %y) {
|
|
; CHECK-LABEL: define double @test_pow_afn_f64
|
|
; CHECK-SAME: (double [[X:%.*]], double [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn double @_Z3powdd(double [[X]], double [[Y]])
|
|
; CHECK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call afn double @_Z3powdd(double %x, double %y)
|
|
ret double %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_afn_v2f64(<2 x double> %x, <2 x double> %y) {
|
|
; CHECK-LABEL: define <2 x double> @test_pow_afn_v2f64
|
|
; CHECK-SAME: (<2 x double> [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <2 x double> @_Z3powDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
|
|
; CHECK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
%pow = tail call afn <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> %y)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define <3 x double> @test_pow_afn_v3f64(<3 x double> %x, <3 x double> %y) {
|
|
; CHECK-LABEL: define <3 x double> @test_pow_afn_v3f64
|
|
; CHECK-SAME: (<3 x double> [[X:%.*]], <3 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <3 x double> @_Z3powDv3_dS_(<3 x double> [[X]], <3 x double> [[Y]])
|
|
; CHECK-NEXT: ret <3 x double> [[POW]]
|
|
;
|
|
%pow = tail call afn <3 x double> @_Z3powDv3_dS_(<3 x double> %x, <3 x double> %y)
|
|
ret <3 x double> %pow
|
|
}
|
|
|
|
define <4 x double> @test_pow_afn_v4f64(<4 x double> %x, <4 x double> %y) {
|
|
; CHECK-LABEL: define <4 x double> @test_pow_afn_v4f64
|
|
; CHECK-SAME: (<4 x double> [[X:%.*]], <4 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <4 x double> @_Z3powDv4_dS_(<4 x double> [[X]], <4 x double> [[Y]])
|
|
; CHECK-NEXT: ret <4 x double> [[POW]]
|
|
;
|
|
%pow = tail call afn <4 x double> @_Z3powDv4_dS_(<4 x double> %x, <4 x double> %y)
|
|
ret <4 x double> %pow
|
|
}
|
|
|
|
define <8 x double> @test_pow_afn_v8f64(<8 x double> %x, <8 x double> %y) {
|
|
; CHECK-LABEL: define <8 x double> @test_pow_afn_v8f64
|
|
; CHECK-SAME: (<8 x double> [[X:%.*]], <8 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <8 x double> @_Z3powDv8_dS_(<8 x double> [[X]], <8 x double> [[Y]])
|
|
; CHECK-NEXT: ret <8 x double> [[POW]]
|
|
;
|
|
%pow = tail call afn <8 x double> @_Z3powDv8_dS_(<8 x double> %x, <8 x double> %y)
|
|
ret <8 x double> %pow
|
|
}
|
|
|
|
define <16 x double> @test_pow_afn_v16f64(<16 x double> %x, <16 x double> %y) {
|
|
; CHECK-LABEL: define <16 x double> @test_pow_afn_v16f64
|
|
; CHECK-SAME: (<16 x double> [[X:%.*]], <16 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <16 x double> @_Z3powDv16_dS_(<16 x double> [[X]], <16 x double> [[Y]])
|
|
; CHECK-NEXT: ret <16 x double> [[POW]]
|
|
;
|
|
%pow = tail call afn <16 x double> @_Z3powDv16_dS_(<16 x double> %x, <16 x double> %y)
|
|
ret <16 x double> %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16(half %x, half %y) {
|
|
; CHECK-LABEL: define half @test_pow_afn_f16
|
|
; CHECK-SAME: (half [[X:%.*]], half [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn half @_Z3powDhDh(half [[X]], half [[Y]])
|
|
; CHECK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call afn half @_Z3powDhDh(half %x, half %y)
|
|
ret half %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_afn_v2f16(<2 x half> %x, <2 x half> %y) {
|
|
; CHECK-LABEL: define <2 x half> @test_pow_afn_v2f16
|
|
; CHECK-SAME: (<2 x half> [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <2 x half> @_Z3powDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
|
|
; CHECK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
%pow = tail call afn <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> %y)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define <3 x half> @test_pow_afn_v3f16(<3 x half> %x, <3 x half> %y) {
|
|
; CHECK-LABEL: define <3 x half> @test_pow_afn_v3f16
|
|
; CHECK-SAME: (<3 x half> [[X:%.*]], <3 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <3 x half> @_Z3powDv3_DhS_(<3 x half> [[X]], <3 x half> [[Y]])
|
|
; CHECK-NEXT: ret <3 x half> [[POW]]
|
|
;
|
|
%pow = tail call afn <3 x half> @_Z3powDv3_DhS_(<3 x half> %x, <3 x half> %y)
|
|
ret <3 x half> %pow
|
|
}
|
|
|
|
define <4 x half> @test_pow_afn_v4f16(<4 x half> %x, <4 x half> %y) {
|
|
; CHECK-LABEL: define <4 x half> @test_pow_afn_v4f16
|
|
; CHECK-SAME: (<4 x half> [[X:%.*]], <4 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <4 x half> @_Z3powDv4_DhS_(<4 x half> [[X]], <4 x half> [[Y]])
|
|
; CHECK-NEXT: ret <4 x half> [[POW]]
|
|
;
|
|
%pow = tail call afn <4 x half> @_Z3powDv4_DhS_(<4 x half> %x, <4 x half> %y)
|
|
ret <4 x half> %pow
|
|
}
|
|
|
|
define <8 x half> @test_pow_afn_v8f16(<8 x half> %x, <8 x half> %y) {
|
|
; CHECK-LABEL: define <8 x half> @test_pow_afn_v8f16
|
|
; CHECK-SAME: (<8 x half> [[X:%.*]], <8 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <8 x half> @_Z3powDv8_DhS_(<8 x half> [[X]], <8 x half> [[Y]])
|
|
; CHECK-NEXT: ret <8 x half> [[POW]]
|
|
;
|
|
%pow = tail call afn <8 x half> @_Z3powDv8_DhS_(<8 x half> %x, <8 x half> %y)
|
|
ret <8 x half> %pow
|
|
}
|
|
|
|
define <16 x half> @test_pow_afn_v16f16(<16 x half> %x, <16 x half> %y) {
|
|
; CHECK-LABEL: define <16 x half> @test_pow_afn_v16f16
|
|
; CHECK-SAME: (<16 x half> [[X:%.*]], <16 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call afn <16 x half> @_Z3powDv16_DhS_(<16 x half> [[X]], <16 x half> [[Y]])
|
|
; CHECK-NEXT: ret <16 x half> [[POW]]
|
|
;
|
|
%pow = tail call afn <16 x half> @_Z3powDv16_DhS_(<16 x half> %x, <16 x half> %y)
|
|
ret <16 x half> %pow
|
|
}
|
|
|
|
define float @test_pow_f32(float %x, float %y) {
|
|
; CHECK-LABEL: define float @test_pow_f32
|
|
; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; CHECK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32_nnan(float %x, float %y) {
|
|
; CHECK-LABEL: define float @test_pow_f32_nnan
|
|
; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call nnan float @_Z3powff(float [[X]], float [[Y]])
|
|
; CHECK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call nnan float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32(<2 x float> %x, <2 x float> %y) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_v2f32
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
|
|
; CHECK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <3 x float> @test_pow_v3f32(<3 x float> %x, <3 x float> %y) {
|
|
; CHECK-LABEL: define <3 x float> @test_pow_v3f32
|
|
; CHECK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <3 x float> @_Z3powDv3_fS_(<3 x float> [[X]], <3 x float> [[Y]])
|
|
; CHECK-NEXT: ret <3 x float> [[POW]]
|
|
;
|
|
%pow = tail call <3 x float> @_Z3powDv3_fS_(<3 x float> %x, <3 x float> %y)
|
|
ret <3 x float> %pow
|
|
}
|
|
|
|
define <4 x float> @test_pow_v4f32(<4 x float> %x, <4 x float> %y) {
|
|
; CHECK-LABEL: define <4 x float> @test_pow_v4f32
|
|
; CHECK-SAME: (<4 x float> [[X:%.*]], <4 x float> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <4 x float> @_Z3powDv4_fS_(<4 x float> [[X]], <4 x float> [[Y]])
|
|
; CHECK-NEXT: ret <4 x float> [[POW]]
|
|
;
|
|
%pow = tail call <4 x float> @_Z3powDv4_fS_(<4 x float> %x, <4 x float> %y)
|
|
ret <4 x float> %pow
|
|
}
|
|
|
|
define <8 x float> @test_pow_v8f32(<8 x float> %x, <8 x float> %y) {
|
|
; CHECK-LABEL: define <8 x float> @test_pow_v8f32
|
|
; CHECK-SAME: (<8 x float> [[X:%.*]], <8 x float> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <8 x float> @_Z3powDv8_fS_(<8 x float> [[X]], <8 x float> [[Y]])
|
|
; CHECK-NEXT: ret <8 x float> [[POW]]
|
|
;
|
|
%pow = tail call <8 x float> @_Z3powDv8_fS_(<8 x float> %x, <8 x float> %y)
|
|
ret <8 x float> %pow
|
|
}
|
|
|
|
define <16 x float> @test_pow_v16f32(<16 x float> %x, <16 x float> %y) {
|
|
; CHECK-LABEL: define <16 x float> @test_pow_v16f32
|
|
; CHECK-SAME: (<16 x float> [[X:%.*]], <16 x float> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <16 x float> @_Z3powDv16_fS_(<16 x float> [[X]], <16 x float> [[Y]])
|
|
; CHECK-NEXT: ret <16 x float> [[POW]]
|
|
;
|
|
%pow = tail call <16 x float> @_Z3powDv16_fS_(<16 x float> %x, <16 x float> %y)
|
|
ret <16 x float> %pow
|
|
}
|
|
|
|
define double @test_pow_f64(double %x, double %y) {
|
|
; CHECK-LABEL: define double @test_pow_f64
|
|
; CHECK-SAME: (double [[X:%.*]], double [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call double @_Z3powdd(double [[X]], double [[Y]])
|
|
; CHECK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call double @_Z3powdd(double %x, double %y)
|
|
ret double %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_v2f64(<2 x double> %x, <2 x double> %y) {
|
|
; CHECK-LABEL: define <2 x double> @test_pow_v2f64
|
|
; CHECK-SAME: (<2 x double> [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <2 x double> @_Z3powDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
|
|
; CHECK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
%pow = tail call <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> %y)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define <3 x double> @test_pow_v3f64(<3 x double> %x, <3 x double> %y) {
|
|
; CHECK-LABEL: define <3 x double> @test_pow_v3f64
|
|
; CHECK-SAME: (<3 x double> [[X:%.*]], <3 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <3 x double> @_Z3powDv3_dS_(<3 x double> [[X]], <3 x double> [[Y]])
|
|
; CHECK-NEXT: ret <3 x double> [[POW]]
|
|
;
|
|
%pow = tail call <3 x double> @_Z3powDv3_dS_(<3 x double> %x, <3 x double> %y)
|
|
ret <3 x double> %pow
|
|
}
|
|
|
|
define <4 x double> @test_pow_v4f64(<4 x double> %x, <4 x double> %y) {
|
|
; CHECK-LABEL: define <4 x double> @test_pow_v4f64
|
|
; CHECK-SAME: (<4 x double> [[X:%.*]], <4 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <4 x double> @_Z3powDv4_dS_(<4 x double> [[X]], <4 x double> [[Y]])
|
|
; CHECK-NEXT: ret <4 x double> [[POW]]
|
|
;
|
|
%pow = tail call <4 x double> @_Z3powDv4_dS_(<4 x double> %x, <4 x double> %y)
|
|
ret <4 x double> %pow
|
|
}
|
|
|
|
define <8 x double> @test_pow_v8f64(<8 x double> %x, <8 x double> %y) {
|
|
; CHECK-LABEL: define <8 x double> @test_pow_v8f64
|
|
; CHECK-SAME: (<8 x double> [[X:%.*]], <8 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <8 x double> @_Z3powDv8_dS_(<8 x double> [[X]], <8 x double> [[Y]])
|
|
; CHECK-NEXT: ret <8 x double> [[POW]]
|
|
;
|
|
%pow = tail call <8 x double> @_Z3powDv8_dS_(<8 x double> %x, <8 x double> %y)
|
|
ret <8 x double> %pow
|
|
}
|
|
|
|
define <16 x double> @test_pow_v16f64(<16 x double> %x, <16 x double> %y) {
|
|
; CHECK-LABEL: define <16 x double> @test_pow_v16f64
|
|
; CHECK-SAME: (<16 x double> [[X:%.*]], <16 x double> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <16 x double> @_Z3powDv16_dS_(<16 x double> [[X]], <16 x double> [[Y]])
|
|
; CHECK-NEXT: ret <16 x double> [[POW]]
|
|
;
|
|
%pow = tail call <16 x double> @_Z3powDv16_dS_(<16 x double> %x, <16 x double> %y)
|
|
ret <16 x double> %pow
|
|
}
|
|
|
|
define half @test_pow_f16(half %x, half %y) {
|
|
; CHECK-LABEL: define half @test_pow_f16
|
|
; CHECK-SAME: (half [[X:%.*]], half [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call half @_Z3powDhDh(half [[X]], half [[Y]])
|
|
; CHECK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call half @_Z3powDhDh(half %x, half %y)
|
|
ret half %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_v2f16(<2 x half> %x, <2 x half> %y) {
|
|
; CHECK-LABEL: define <2 x half> @test_pow_v2f16
|
|
; CHECK-SAME: (<2 x half> [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <2 x half> @_Z3powDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
|
|
; CHECK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
%pow = tail call <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> %y)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define <3 x half> @test_pow_v3f16(<3 x half> %x, <3 x half> %y) {
|
|
; CHECK-LABEL: define <3 x half> @test_pow_v3f16
|
|
; CHECK-SAME: (<3 x half> [[X:%.*]], <3 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <3 x half> @_Z3powDv3_DhS_(<3 x half> [[X]], <3 x half> [[Y]])
|
|
; CHECK-NEXT: ret <3 x half> [[POW]]
|
|
;
|
|
%pow = tail call <3 x half> @_Z3powDv3_DhS_(<3 x half> %x, <3 x half> %y)
|
|
ret <3 x half> %pow
|
|
}
|
|
|
|
define <4 x half> @test_pow_v4f16(<4 x half> %x, <4 x half> %y) {
|
|
; CHECK-LABEL: define <4 x half> @test_pow_v4f16
|
|
; CHECK-SAME: (<4 x half> [[X:%.*]], <4 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <4 x half> @_Z3powDv4_DhS_(<4 x half> [[X]], <4 x half> [[Y]])
|
|
; CHECK-NEXT: ret <4 x half> [[POW]]
|
|
;
|
|
%pow = tail call <4 x half> @_Z3powDv4_DhS_(<4 x half> %x, <4 x half> %y)
|
|
ret <4 x half> %pow
|
|
}
|
|
|
|
define <8 x half> @test_pow_v8f16(<8 x half> %x, <8 x half> %y) {
|
|
; CHECK-LABEL: define <8 x half> @test_pow_v8f16
|
|
; CHECK-SAME: (<8 x half> [[X:%.*]], <8 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <8 x half> @_Z3powDv8_DhS_(<8 x half> [[X]], <8 x half> [[Y]])
|
|
; CHECK-NEXT: ret <8 x half> [[POW]]
|
|
;
|
|
%pow = tail call <8 x half> @_Z3powDv8_DhS_(<8 x half> %x, <8 x half> %y)
|
|
ret <8 x half> %pow
|
|
}
|
|
|
|
define <16 x half> @test_pow_v16f16(<16 x half> %x, <16 x half> %y) {
|
|
; CHECK-LABEL: define <16 x half> @test_pow_v16f16
|
|
; CHECK-SAME: (<16 x half> [[X:%.*]], <16 x half> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <16 x half> @_Z3powDv16_DhS_(<16 x half> [[X]], <16 x half> [[Y]])
|
|
; CHECK-NEXT: ret <16 x half> [[POW]]
|
|
;
|
|
%pow = tail call <16 x half> @_Z3powDv16_DhS_(<16 x half> %x, <16 x half> %y)
|
|
ret <16 x half> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_minsize(float %x, float %y) #0 {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_minsize
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR2:[0-9]+]] {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z10__pow_fastff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_minsize
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR2:[0-9]+]] {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp afn une float [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp afn oeq float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn olt float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select afn i1 [[TMP29]], float 0.000000e+00, float [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP27]], float 1.000000e+00, float [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select afn i1 [[TMP23]], float [[TMP31]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp afn oeq float [[TMP33]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or i1 [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor i1 [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn i1 [[TMP38]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call afn float @llvm.copysign.f32(float [[TMP39]], float [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select afn i1 [[TMP36]], float [[TMP41]], float [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP43:%.*]] = fcmp afn uno float [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP44:%.*]] = select afn i1 [[TMP43]], float 0x7FF8000000000000, float [[TMP42]]
|
|
; NOPRELINK-NEXT: ret float [[TMP44]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_minsize(float %x, float %y) #0 {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_nnan_minsize
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR2]] {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn float @_Z10__pow_fastff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_nnan_minsize
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR2]] {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp nnan afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp nnan afn une float [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp nnan afn oeq float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp nnan afn olt float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select nnan afn i1 [[TMP29]], float 0.000000e+00, float [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select nnan afn i1 [[TMP27]], float 1.000000e+00, float [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select nnan afn i1 [[TMP23]], float [[TMP31]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp nnan afn oeq float [[TMP33]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp nnan afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or i1 [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp nnan afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor i1 [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select nnan afn i1 [[TMP38]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP39]], float [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select nnan afn i1 [[TMP36]], float [[TMP41]], float [[TMP32]]
|
|
; NOPRELINK-NEXT: ret float [[TMP42]]
|
|
;
|
|
%pow = tail call afn nnan float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_noinline(float %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_noinline
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z10__pow_fastff(float [[X]], float [[Y]]) #[[ATTR5:[0-9]+]]
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_noinline
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp afn une float [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp afn oeq float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn olt float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select afn i1 [[TMP29]], float 0.000000e+00, float [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP27]], float 1.000000e+00, float [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select afn i1 [[TMP23]], float [[TMP31]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp afn oeq float [[TMP33]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or i1 [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor i1 [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn i1 [[TMP38]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call afn float @llvm.copysign.f32(float [[TMP39]], float [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select afn i1 [[TMP36]], float [[TMP41]], float [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP43:%.*]] = fcmp afn uno float [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP44:%.*]] = select afn i1 [[TMP43]], float 0x7FF8000000000000, float [[TMP42]]
|
|
; NOPRELINK-NEXT: ret float [[TMP44]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float %y) #1
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_noinline(float %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_nnan_noinline
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn float @_Z10__pow_fastff(float [[X]], float [[Y]]) #[[ATTR5]]
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_nnan_noinline
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp nnan afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp nnan afn une float [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp nnan afn oeq float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp nnan afn olt float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select nnan afn i1 [[TMP29]], float 0.000000e+00, float [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select nnan afn i1 [[TMP27]], float 1.000000e+00, float [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select nnan afn i1 [[TMP23]], float [[TMP31]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp nnan afn oeq float [[TMP33]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp nnan afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or i1 [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp nnan afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor i1 [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select nnan afn i1 [[TMP38]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP39]], float [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select nnan afn i1 [[TMP36]], float [[TMP41]], float [[TMP32]]
|
|
; NOPRELINK-NEXT: ret float [[TMP42]]
|
|
;
|
|
%pow = tail call afn nnan float @_Z3powff(float %x, float %y) #1
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_strictfp(float %x, float %y) #2 {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_strictfp
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR3:[0-9]+]] {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan nsz afn float @_Z10__pow_fastff(float [[X]], float [[Y]]) #[[ATTR3]]
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_strictfp
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR3:[0-9]+]] {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[X]], float 1.000000e+00, metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan nsz afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP2]], float 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan nsz afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan nsz afn float @llvm.fabs.f32(float [[TMP4]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan nsz afn float @llvm.log2.f32(float [[TMP5]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call nnan nsz afn float @llvm.experimental.constrained.fmul.f32(float [[TMP2]], float [[TMP6]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan nsz afn float @llvm.exp2.f32(float [[TMP7]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan nsz afn float @llvm.trunc.f32(float [[TMP2]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP9]], float [[TMP2]], metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = call nnan nsz afn float @llvm.experimental.constrained.fmul.f32(float [[TMP2]], float 5.000000e-01, metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan nsz afn float @llvm.trunc.f32(float [[TMP11]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP12]], float [[TMP11]], metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = xor i1 [[TMP13]], true
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = and i1 [[TMP10]], [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = select nnan nsz afn i1 [[TMP15]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan nsz afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP16]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = call nnan nsz afn float @llvm.trunc.f32(float [[TMP2]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP18]], float [[TMP2]], metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP4]], float 0.000000e+00, metadata !"olt", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = xor i1 [[TMP19]], true
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = and i1 [[TMP20]], [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = select nnan nsz afn i1 [[TMP22]], float 0x7FF8000000000000, float [[TMP17]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call nnan nsz afn float @llvm.fabs.f32(float [[TMP2]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP24]], float 0x7FF0000000000000, metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call nnan nsz afn float @llvm.fabs.f32(float [[TMP2]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP2]], float [[TMP26]], metadata !"une", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call nnan nsz afn float @llvm.fabs.f32(float [[TMP4]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP28]], float 1.000000e+00, metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP28]], float 1.000000e+00, metadata !"olt", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = xor i1 [[TMP30]], [[TMP27]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select nnan nsz afn i1 [[TMP31]], float 0.000000e+00, float [[TMP26]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = select nnan nsz afn i1 [[TMP29]], float [[TMP28]], float [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = select nnan nsz afn i1 [[TMP25]], float [[TMP33]], float [[TMP23]]
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = call nnan nsz afn float @llvm.fabs.f32(float [[TMP4]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP35]], float 0x7FF0000000000000, metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP4]], float 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = or i1 [[TMP36]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP2]], float 0.000000e+00, metadata !"olt", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = xor i1 [[TMP37]], [[TMP39]]
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = select nnan nsz afn i1 [[TMP40]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select nnan nsz afn i1 [[TMP15]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP43:%.*]] = call nnan nsz afn float @llvm.copysign.f32(float [[TMP41]], float [[TMP42]]) #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP44:%.*]] = select nnan nsz afn i1 [[TMP38]], float [[TMP43]], float [[TMP34]]
|
|
; NOPRELINK-NEXT: [[TMP45:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float [[TMP4]], float [[TMP2]], metadata !"uno", metadata !"fpexcept.strict") #[[ATTR3]]
|
|
; NOPRELINK-NEXT: [[TMP46:%.*]] = select nnan nsz afn i1 [[TMP45]], float 0x7FF8000000000000, float [[TMP44]]
|
|
; NOPRELINK-NEXT: ret float [[TMP46]]
|
|
;
|
|
%pow = tail call afn nsz nnan float @_Z3powff(float %x, float %y) #2
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_fast_f32_nobuiltin(float %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_fast_f32_nobuiltin
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call fast float @_Z3powff(float [[X]], float [[Y]]) #[[ATTR6:[0-9]+]]
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_fast_f32_nobuiltin
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call fast float @_Z3powff(float [[X]], float [[Y]]) #[[ATTR5:[0-9]+]]
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call fast float @_Z3powff(float %x, float %y) #3
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_0.0(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_0.0
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: ret float 1.000000e+00
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 0.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_neg0.0(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_neg0.0
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: ret float 1.000000e+00
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float -0.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_0.0(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_afn_v2f32_0.0
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: ret <2 x float> splat (float 1.000000e+00)
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 0.0, float 0.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_neg0.0(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg0.0
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: ret <2 x float> splat (float 1.000000e+00)
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -0.0, float -0.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_0.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_0.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: ret <2 x float> splat (float 1.000000e+00)
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_0.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 0.000000e+00, float -0.000000e+00>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn <2 x i1> [[TMP3]], <2 x float> splat (float 1.000000e+00), <2 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq <2 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une <2 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <2 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP8]], <2 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une <2 x float> [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and <2 x i1> [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn <2 x i1> [[TMP20]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq <2 x float> [[TMP22]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn oeq <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = or <2 x i1> [[TMP23]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP24]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> [[TMP28]], <2 x float> [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 0.0, float -0.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <3 x float> @test_pow_afn_v3f32_0.0_splat_undef(<3 x float> %x, <3 x float> %y) {
|
|
; CHECK-LABEL: define <3 x float> @test_pow_afn_v3f32_0.0_splat_undef
|
|
; CHECK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; CHECK-NEXT: ret <3 x float> splat (float 1.000000e+00)
|
|
;
|
|
%pow = tail call afn <3 x float> @_Z3powDv3_fS_(<3 x float> %x, <3 x float> <float 0.0, float poison, float 0.0>)
|
|
ret <3 x float> %pow
|
|
}
|
|
|
|
define <3 x float> @test_pow_afn_v3f32_neg0.0_splat_undef(<3 x float> %x, <3 x float> %y) {
|
|
; CHECK-LABEL: define <3 x float> @test_pow_afn_v3f32_neg0.0_splat_undef
|
|
; CHECK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; CHECK-NEXT: ret <3 x float> splat (float 1.000000e+00)
|
|
;
|
|
%pow = tail call afn <3 x float> @_Z3powDv3_fS_(<3 x float> %x, <3 x float> <float -0.0, float poison, float -0.0>)
|
|
ret <3 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_0.5(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_0.5
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2SQRT:%.*]] = call afn float @_Z4sqrtf(float [[X]])
|
|
; PRELINK-NEXT: ret float [[__POW2SQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_0.5
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.copysign.f32(float [[TMP24]], float [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP23]], float [[TMP26]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP28]], float 0x7FF8000000000000, float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP29]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 0.5)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_neg0.5(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_neg0.5
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2RSQRT:%.*]] = call afn float @_Z5rsqrtf(float [[X]])
|
|
; PRELINK-NEXT: ret float [[__POW2RSQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_neg0.5
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float -5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor i1 [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP25]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.copysign.f32(float [[TMP26]], float [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP23]], float [[TMP28]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP30]], float 0x7FF8000000000000, float [[TMP29]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float -0.5)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_0.5(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_0.5
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2SQRT:%.*]] = call afn <2 x float> @_Z4sqrtDv2_f(<2 x float> [[X]])
|
|
; PRELINK-NEXT: ret <2 x float> [[__POW2SQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_0.5
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP24]], <2 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP26]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP28]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 0.5, float 0.5>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_neg0.5(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg0.5
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2RSQRT:%.*]] = call afn <2 x float> @_Z5rsqrtDv2_f(<2 x float> [[X]])
|
|
; PRELINK-NEXT: ret <2 x float> [[__POW2RSQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg0.5
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float -5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -0.5, float -0.5>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_0.5(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_0.5
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> <float 5.000000e-01, float -5.000000e-01>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_0.5
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 5.000000e-01, float -5.000000e-01>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 0.5, float -0.5>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <3 x float> @test_pow_afn_v3f32_0.5_splat_undef(<3 x float> %x, <3 x float> %y) {
|
|
; PRELINK-LABEL: define <3 x float> @test_pow_afn_v3f32_0.5_splat_undef
|
|
; PRELINK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2SQRT:%.*]] = call afn <3 x float> @_Z4sqrtDv3_f(<3 x float> [[X]])
|
|
; PRELINK-NEXT: ret <3 x float> [[__POW2SQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define <3 x float> @test_pow_afn_v3f32_0.5_splat_undef
|
|
; NOPRELINK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <3 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <3 x i1> [[TMP1]], <3 x float> splat (float 1.000000e+00), <3 x float> <float 5.000000e-01, float poison, float 5.000000e-01>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <3 x float> @llvm.log2.v3f32(<3 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <3 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <3 x float> @llvm.exp2.v3f32(<3 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <3 x float> @llvm.trunc.v3f32(<3 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <3 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <3 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <3 x float> @llvm.trunc.v3f32(<3 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <3 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <3 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <3 x i1> [[TMP12]], <3 x float> [[X]], <3 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <3 x float> @llvm.copysign.v3f32(<3 x float> [[TMP6]], <3 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <3 x float> @llvm.trunc.v3f32(<3 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <3 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <3 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <3 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <3 x i1> [[TMP18]], <3 x float> splat (float 0x7FF8000000000000), <3 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <3 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <3 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <3 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <3 x i1> [[TMP22]], <3 x float> zeroinitializer, <3 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <3 x i1> [[TMP12]], <3 x float> [[X]], <3 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <3 x float> @llvm.copysign.v3f32(<3 x float> [[TMP24]], <3 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <3 x i1> [[TMP23]], <3 x float> [[TMP26]], <3 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <3 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <3 x i1> [[TMP28]], <3 x float> splat (float 0x7FF8000000000000), <3 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <3 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <3 x float> @_Z3powDv3_fS_(<3 x float> %x, <3 x float> <float 0.5, float poison, float 0.5>)
|
|
ret <3 x float> %pow
|
|
}
|
|
|
|
define <3 x float> @test_pow_afn_v3f32_neg0.5_splat_undef(<3 x float> %x, <3 x float> %y) {
|
|
; PRELINK-LABEL: define <3 x float> @test_pow_afn_v3f32_neg0.5_splat_undef
|
|
; PRELINK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2RSQRT:%.*]] = call afn <3 x float> @_Z5rsqrtDv3_f(<3 x float> [[X]])
|
|
; PRELINK-NEXT: ret <3 x float> [[__POW2RSQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define <3 x float> @test_pow_afn_v3f32_neg0.5_splat_undef
|
|
; NOPRELINK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <3 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <3 x i1> [[TMP1]], <3 x float> splat (float 1.000000e+00), <3 x float> <float -5.000000e-01, float poison, float -5.000000e-01>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <3 x float> @llvm.log2.v3f32(<3 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <3 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <3 x float> @llvm.exp2.v3f32(<3 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <3 x float> @llvm.trunc.v3f32(<3 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <3 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <3 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <3 x float> @llvm.trunc.v3f32(<3 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <3 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <3 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <3 x i1> [[TMP12]], <3 x float> [[X]], <3 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <3 x float> @llvm.copysign.v3f32(<3 x float> [[TMP6]], <3 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <3 x float> @llvm.trunc.v3f32(<3 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <3 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <3 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <3 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <3 x i1> [[TMP18]], <3 x float> splat (float 0x7FF8000000000000), <3 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <3 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <3 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <3 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <3 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <3 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <3 x i1> [[TMP25]], <3 x float> zeroinitializer, <3 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <3 x i1> [[TMP12]], <3 x float> [[X]], <3 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <3 x float> @llvm.copysign.v3f32(<3 x float> [[TMP26]], <3 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <3 x i1> [[TMP23]], <3 x float> [[TMP28]], <3 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <3 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <3 x i1> [[TMP30]], <3 x float> splat (float 0x7FF8000000000000), <3 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <3 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <3 x float> @_Z3powDv3_fS_(<3 x float> %x, <3 x float> <float -0.5, float poison, float -0.5>)
|
|
ret <3 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_1.0(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_1.0
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: ret float [[X]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 1.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_neg1.0(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_neg1.0
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWRECIP:%.*]] = fdiv afn float 1.000000e+00, [[X]]
|
|
; CHECK-NEXT: ret float [[__POWRECIP]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float -1.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_1.0(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_afn_v2f32_1.0
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: ret <2 x float> [[X]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 1.0, float 1.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_neg1.0(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg1.0
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWRECIP:%.*]] = fdiv afn <2 x float> splat (float 1.000000e+00), [[X]]
|
|
; CHECK-NEXT: ret <2 x float> [[__POWRECIP]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -1.0, float -1.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_1.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_1.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 1, i32 -1>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_1.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 1.000000e+00, float -1.000000e+00>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 1.0, float -1.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <3 x float> @test_pow_afn_v3f32_1.0_splat_undef(<3 x float> %x, <3 x float> %y) {
|
|
; CHECK-LABEL: define <3 x float> @test_pow_afn_v3f32_1.0_splat_undef
|
|
; CHECK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; CHECK-NEXT: ret <3 x float> [[X]]
|
|
;
|
|
%pow = tail call afn <3 x float> @_Z3powDv3_fS_(<3 x float> %x, <3 x float> <float 1.0, float poison, float 1.0>)
|
|
ret <3 x float> %pow
|
|
}
|
|
|
|
define <3 x float> @test_pow_afn_v3f32_neg1.0_splat_undef(<3 x float> %x, <3 x float> %y) {
|
|
; CHECK-LABEL: define <3 x float> @test_pow_afn_v3f32_neg1.0_splat_undef
|
|
; CHECK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
|
|
; CHECK-NEXT: [[__POWRECIP:%.*]] = fdiv afn <3 x float> splat (float 1.000000e+00), [[X]]
|
|
; CHECK-NEXT: ret <3 x float> [[__POWRECIP]]
|
|
;
|
|
%pow = tail call afn <3 x float> @_Z3powDv3_fS_(<3 x float> %x, <3 x float> <float -1.0, float poison, float -1.0>)
|
|
ret <3 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_2.0(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_2.0
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POW2:%.*]] = fmul afn float [[X]], [[X]]
|
|
; CHECK-NEXT: ret float [[__POW2]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 2.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_neg2.0(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_neg2.0
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 -2)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_neg2.0
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float -2.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor i1 [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP25]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.copysign.f32(float [[TMP26]], float [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP23]], float [[TMP28]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP30]], float 0x7FF8000000000000, float [[TMP29]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float -2.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_2.0(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_afn_v2f32_2.0
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POW2:%.*]] = fmul afn <2 x float> [[X]], [[X]]
|
|
; CHECK-NEXT: ret <2 x float> [[__POW2]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 2.0, float 2.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_neg2.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg2.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 -2))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg2.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float -2.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -2.0, float -2.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_2.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_2.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 2, i32 -2>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_2.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 2.000000e+00, float -2.000000e+00>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 2.0, float -2.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_3.0(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_3.0
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 3)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_3.0
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 3.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.copysign.f32(float [[TMP24]], float [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP23]], float [[TMP26]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP28]], float 0x7FF8000000000000, float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP29]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 3.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_neg3.0(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_neg3.0
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 -3)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_neg3.0
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float -3.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor i1 [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP25]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.copysign.f32(float [[TMP26]], float [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP23]], float [[TMP28]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP30]], float 0x7FF8000000000000, float [[TMP29]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float -3.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_3.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_3.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 3))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_3.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float 3.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP24]], <2 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP26]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP28]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 3.0, float 3.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_neg3.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg3.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 -3))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg3.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float -3.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -3.0, float -3.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_3.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_3.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 3, i32 -3>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_3.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 3.000000e+00, float -3.000000e+00>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 3.0, float -3.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_3.99(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_3.99
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z10__pow_fastff(float [[X]], float 0x400FEB8520000000)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_3.99
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 0x400FEB8520000000
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.copysign.f32(float [[TMP24]], float [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP23]], float [[TMP26]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP28]], float 0x7FF8000000000000, float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP29]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 0x400FEB8520000000)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_neg3.99(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_neg3.99
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z10__pow_fastff(float [[X]], float 0xC00FEB8520000000)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_neg3.99
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 0xC00FEB8520000000
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor i1 [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP25]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.copysign.f32(float [[TMP26]], float [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP23]], float [[TMP28]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP30]], float 0x7FF8000000000000, float [[TMP29]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 0xC00FEB8520000000)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_3.99(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_3.99
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> splat (float 0x400FEB8520000000))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_3.99
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float 0x400FEB8520000000)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP24]], <2 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP26]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP28]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 0x400FEB8520000000, float 0x400FEB8520000000>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_neg3.99(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg3.99
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> splat (float 0xC00FEB8520000000))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg3.99
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float 0xC00FEB8520000000)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 0xC00FEB8520000000, float 0xC00FEB8520000000>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_3.99(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_3.99
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> <float 0x400FEB8520000000, float 0xC00FEB8520000000>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_3.99
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 0x400FEB8520000000, float 0xC00FEB8520000000>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 0x400FEB8520000000, float 0xC00FEB8520000000>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_8.0(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_8.0
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 8)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_8.0
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 8.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.copysign.f32(float [[TMP24]], float [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP23]], float [[TMP26]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP28]], float 0x7FF8000000000000, float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP29]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 8.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_neg8.0(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_neg8.0
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 -8)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_neg8.0
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float -8.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor i1 [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP25]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.copysign.f32(float [[TMP26]], float [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP23]], float [[TMP28]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP30]], float 0x7FF8000000000000, float [[TMP29]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float -8.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_8.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_8.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 8))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_8.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float 8.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP24]], <2 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP26]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP28]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 8.0, float 8.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_neg8.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg8.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 -8))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg8.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float -8.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -8.0, float -8.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_8.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_8.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 8, i32 -8>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_8.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 8.000000e+00, float -8.000000e+00>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 8.0, float -8.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_12.0(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_12.0
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 12)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_12.0
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 1.200000e+01
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.copysign.f32(float [[TMP24]], float [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP23]], float [[TMP26]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP28]], float 0x7FF8000000000000, float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP29]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 12.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_neg12.0(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_neg12.0
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 -12)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_neg12.0
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float -1.200000e+01
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor i1 [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP25]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.copysign.f32(float [[TMP26]], float [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP23]], float [[TMP28]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP30]], float 0x7FF8000000000000, float [[TMP29]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float -12.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_12.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_12.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 12))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_12.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float 1.200000e+01)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP24]], <2 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP26]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP28]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 12.0, float 12.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_neg12.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg12.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 -12))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg12.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float -1.200000e+01)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -12.0, float -12.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_12.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_12.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 12, i32 -12>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_12.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 1.200000e+01, float -1.200000e+01>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 12.0, float -12.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_13.0(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_13.0
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 13)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_13.0
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 1.300000e+01
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.copysign.f32(float [[TMP24]], float [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP23]], float [[TMP26]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP28]], float 0x7FF8000000000000, float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP29]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 13.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_neg13.0(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_neg13.0
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 -13)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_neg13.0
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float -1.300000e+01
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor i1 [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP25]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.copysign.f32(float [[TMP26]], float [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP23]], float [[TMP28]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP30]], float 0x7FF8000000000000, float [[TMP29]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float -13.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_13.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_13.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 13))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_13.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float 1.300000e+01)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP24]], <2 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP26]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP28]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 13.0, float 13.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_neg13.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg13.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 -13))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_neg13.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float -1.300000e+01)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -13.0, float -13.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_13.0_15.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_13.0_15.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 13, i32 15>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_13.0_15.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 1.300000e+01, float 1.500000e+01>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP24]], <2 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP26]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP28]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 13.0, float 15.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_13.0_14.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_13.0_14.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 13, i32 14>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_13.0_14.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 1.300000e+01, float 1.400000e+01>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP24]], <2 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP26]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP28]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 13.0, float 14.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_14.0_16.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_14.0_16.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 14, i32 16>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_14.0_16.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 1.400000e+01, float 1.600000e+01>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP24]], <2 x float> [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP26]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP28]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP29]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 14.0, float 16.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_13.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_13.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 13, i32 -13>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_13.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 1.300000e+01, float -1.300000e+01>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 13.0, float -13.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_plus_minus_13.0_minus_14.0(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_13.0_minus_14.0
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 -13, i32 -14>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_plus_minus_13.0_minus_14.0
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float -1.300000e+01, float -1.400000e+01>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq <2 x float> [[TMP20]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or <2 x i1> [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor <2 x i1> [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP23]], <2 x float> [[TMP28]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -13.0, float -14.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_x_known_positive(float nofpclass(ninf nnorm nsub) %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_nnan_x_known_positive
|
|
; PRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn float @_Z11__powr_fastff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_nnan_x_known_positive
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan afn oeq float [[TMP17]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = fcmp nnan afn une float [[TMP2]], [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp nnan afn oeq float [[TMP21]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan afn olt float [[TMP21]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = xor i1 [[TMP23]], [[TMP20]]
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select nnan afn i1 [[TMP24]], float 0.000000e+00, float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select nnan afn i1 [[TMP22]], float 1.000000e+00, float [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select nnan afn i1 [[TMP18]], float [[TMP26]], float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = fcmp nnan afn oeq float [[TMP28]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp nnan afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = or i1 [[TMP29]], [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = fcmp nnan afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = xor i1 [[TMP30]], [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = select nnan afn i1 [[TMP33]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP34]], float [[TMP35]])
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = select nnan afn i1 [[TMP31]], float [[TMP36]], float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP37]]
|
|
;
|
|
%pow = tail call afn nnan float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_ninf_x_known_positive(float nofpclass(ninf nnorm nsub) %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_nnan_ninf_x_known_positive
|
|
; PRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[X]])
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[Y]], [[__LOG2]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; PRELINK-NEXT: ret float [[__EXP2]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_nnan_ninf_x_known_positive
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan ninf afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan ninf afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan ninf afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan ninf afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = fmul nnan ninf afn float [[TMP2]], [[TMP5]]
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call nnan ninf afn float @llvm.exp2.f32(float [[TMP6]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan ninf afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fcmp nnan ninf afn oeq float [[TMP8]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fmul nnan ninf afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = call nnan ninf afn float @llvm.trunc.f32(float [[TMP10]])
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = fcmp nnan ninf afn une float [[TMP11]], [[TMP10]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = and i1 [[TMP9]], [[TMP12]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = select nnan ninf afn i1 [[TMP13]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[TMP7]], float [[TMP14]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp nnan ninf afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp nnan ninf afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = xor i1 [[TMP16]], [[TMP17]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select nnan ninf afn i1 [[TMP18]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = select nnan ninf afn i1 [[TMP13]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[TMP19]], float [[TMP20]])
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = select nnan ninf afn i1 [[TMP16]], float [[TMP21]], float [[TMP15]]
|
|
; NOPRELINK-NEXT: ret float [[TMP22]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan_x_known_positive(<2 x float> nofpclass(ninf nnorm nsub) %x, <2 x float> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_x_known_positive
|
|
; PRELINK-SAME: (<2 x float> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn <2 x float> @_Z11__powr_fastDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x float> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan afn <2 x i1> [[TMP3]], <2 x float> splat (float 1.000000e+00), <2 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan afn <2 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan afn une <2 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <2 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP8]], <2 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP17]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = fcmp nnan afn une <2 x float> [[TMP2]], [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP21]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan afn olt <2 x float> [[TMP21]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = xor <2 x i1> [[TMP23]], [[TMP20]]
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select nnan afn <2 x i1> [[TMP24]], <2 x float> zeroinitializer, <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select nnan afn <2 x i1> [[TMP22]], <2 x float> splat (float 1.000000e+00), <2 x float> [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select nnan afn <2 x i1> [[TMP18]], <2 x float> [[TMP26]], <2 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call nnan afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP28]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp nnan afn oeq <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = or <2 x i1> [[TMP29]], [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = fcmp nnan afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = xor <2 x i1> [[TMP30]], [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = select nnan afn <2 x i1> [[TMP33]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = select nnan afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = call nnan afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP34]], <2 x float> [[TMP35]])
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = select nnan afn <2 x i1> [[TMP31]], <2 x float> [[TMP36]], <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP37]]
|
|
;
|
|
%pow = tail call afn nnan <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan_ninf_x_known_positive(<2 x float> nofpclass(ninf nnorm nsub) %x, <2 x float> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf_x_known_positive
|
|
; PRELINK-SAME: (<2 x float> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn <2 x float> @llvm.log2.v2f32(<2 x float> [[X]])
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn <2 x float> [[Y]], [[__LOG2]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) <2 x float> @llvm.exp2.v2f32(<2 x float> [[__YLOGX]])
|
|
; PRELINK-NEXT: ret <2 x float> [[__EXP2]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x float> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan ninf afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan ninf afn <2 x i1> [[TMP3]], <2 x float> splat (float 1.000000e+00), <2 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan ninf afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = fmul nnan ninf afn <2 x float> [[TMP2]], [[TMP5]]
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call nnan ninf afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP6]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[TMP8]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fmul nnan ninf afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP10]])
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = fcmp nnan ninf afn une <2 x float> [[TMP11]], [[TMP10]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = and <2 x i1> [[TMP9]], [[TMP12]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = select nnan ninf afn <2 x i1> [[TMP13]], <2 x float> [[TMP4]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP7]], <2 x float> [[TMP14]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp nnan ninf afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = xor <2 x i1> [[TMP16]], [[TMP17]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select nnan ninf afn <2 x i1> [[TMP18]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = select nnan ninf afn <2 x i1> [[TMP13]], <2 x float> [[TMP4]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP19]], <2 x float> [[TMP20]])
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = select nnan ninf afn <2 x i1> [[TMP16]], <2 x float> [[TMP21]], <2 x float> [[TMP15]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP22]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_f32_x_known_positive(float nofpclass(ninf nnorm nsub) %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_f32_x_known_positive
|
|
; PRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4powrff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32_x_known_positive
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_x_known_positive(float nofpclass(ninf nnorm nsub) %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_x_known_positive
|
|
; PRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__powr_fastff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_x_known_positive
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn oeq float [[TMP17]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = call afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = fcmp afn une float [[TMP2]], [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[TMP21]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn olt float [[TMP21]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = xor i1 [[TMP23]], [[TMP20]]
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP24]], float 0.000000e+00, float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP22]], float 1.000000e+00, float [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP18]], float [[TMP26]], float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = fcmp afn oeq float [[TMP28]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = or i1 [[TMP29]], [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = xor i1 [[TMP30]], [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = select afn i1 [[TMP33]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = call afn float @llvm.copysign.f32(float [[TMP34]], float [[TMP35]])
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = select afn i1 [[TMP31]], float [[TMP36]], float [[TMP27]]
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = fcmp afn uno float [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn i1 [[TMP38]], float 0x7FF8000000000000, float [[TMP37]]
|
|
; NOPRELINK-NEXT: ret float [[TMP39]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32_x_known_positive(<2 x float> nofpclass(ninf nnorm nsub) %x, <2 x float> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_v2f32_x_known_positive
|
|
; PRELINK-SAME: (<2 x float> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z4powrDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_v2f32_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x float> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
|
|
; NOPRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_x_known_positive(<2 x float> nofpclass(ninf nnorm nsub) %x, <2 x float> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_x_known_positive
|
|
; PRELINK-SAME: (<2 x float> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__powr_fastDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x float> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x float> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn <2 x i1> [[TMP3]], <2 x float> splat (float 1.000000e+00), <2 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq <2 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une <2 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <2 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP8]], <2 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn oeq <2 x float> [[TMP17]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = fcmp afn une <2 x float> [[TMP2]], [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq <2 x float> [[TMP21]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn olt <2 x float> [[TMP21]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = xor <2 x i1> [[TMP23]], [[TMP20]]
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn <2 x i1> [[TMP24]], <2 x float> zeroinitializer, <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP22]], <2 x float> splat (float 1.000000e+00), <2 x float> [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP18]], <2 x float> [[TMP26]], <2 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = fcmp afn oeq <2 x float> [[TMP28]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn oeq <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = or <2 x i1> [[TMP29]], [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = fcmp afn olt <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = xor <2 x i1> [[TMP30]], [[TMP32]]
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = select afn <2 x i1> [[TMP33]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = select afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP34]], <2 x float> [[TMP35]])
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = select afn <2 x i1> [[TMP31]], <2 x float> [[TMP36]], <2 x float> [[TMP27]]
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = fcmp afn uno <2 x float> [[TMP4]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select afn <2 x i1> [[TMP38]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP37]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP39]]
|
|
;
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64_nnan_x_known_positive(double nofpclass(ninf nnorm nsub) %x, double %y) {
|
|
; PRELINK-LABEL: define double @test_pow_afn_f64_nnan_x_known_positive
|
|
; PRELINK-SAME: (double nofpclass(ninf nsub nnorm) [[X:%.*]], double [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn double @_Z4powrdd(double [[X]], double [[Y]])
|
|
; PRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define double @test_pow_afn_f64_nnan_x_known_positive
|
|
; NOPRELINK-SAME: (double nofpclass(ninf nsub nnorm) [[X:%.*]], double [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call nnan afn double @_Z3powdd(double [[X]], double [[Y]])
|
|
; NOPRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call afn nnan double @_Z3powdd(double %x, double %y)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64_nnan_ninf_x_known_positive(double nofpclass(ninf nnorm nsub) %x, double %y) {
|
|
; PRELINK-LABEL: define double @test_pow_afn_f64_nnan_ninf_x_known_positive
|
|
; PRELINK-SAME: (double nofpclass(ninf nsub nnorm) [[X:%.*]], double [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn double @_Z4log2d(double [[X]])
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn double [[Y]], [[__LOG2]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) double @_Z4exp2d(double [[__YLOGX]])
|
|
; PRELINK-NEXT: ret double [[__EXP2]]
|
|
;
|
|
; NOPRELINK-LABEL: define double @test_pow_afn_f64_nnan_ninf_x_known_positive
|
|
; NOPRELINK-SAME: (double nofpclass(ninf nsub nnorm) [[X:%.*]], double [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call nnan ninf afn double @_Z3powdd(double [[X]], double [[Y]])
|
|
; NOPRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call afn nnan ninf double @_Z3powdd(double %x, double %y)
|
|
ret double %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_afn_v2f64_nnan_x_known_positive(<2 x double> nofpclass(ninf nnorm nsub) %x, <2 x double> %y) {
|
|
; PRELINK-LABEL: define <2 x double> @test_pow_afn_v2f64_nnan_x_known_positive
|
|
; PRELINK-SAME: (<2 x double> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn <2 x double> @_Z4powrDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x double> @test_pow_afn_v2f64_nnan_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x double> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call nnan afn <2 x double> @_Z3powDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
|
|
; NOPRELINK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
%pow = tail call afn nnan <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> %y)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_afn_v2f64_nnan_ninf_x_known_positive(<2 x double> nofpclass(ninf nnorm nsub) %x, <2 x double> %y) {
|
|
; PRELINK-LABEL: define <2 x double> @test_pow_afn_v2f64_nnan_ninf_x_known_positive
|
|
; PRELINK-SAME: (<2 x double> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn <2 x double> @_Z4log2Dv2_d(<2 x double> [[X]])
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn <2 x double> [[Y]], [[__LOG2]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) <2 x double> @_Z4exp2Dv2_d(<2 x double> [[__YLOGX]])
|
|
; PRELINK-NEXT: ret <2 x double> [[__EXP2]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x double> @test_pow_afn_v2f64_nnan_ninf_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x double> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call nnan ninf afn <2 x double> @_Z3powDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
|
|
; NOPRELINK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> %y)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define double @test_pow_f64_x_known_positive(double nofpclass(ninf nnorm nsub) %x, double %y) {
|
|
; PRELINK-LABEL: define double @test_pow_f64_x_known_positive
|
|
; PRELINK-SAME: (double nofpclass(ninf nsub nnorm) [[X:%.*]], double [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call double @_Z4powrdd(double [[X]], double [[Y]])
|
|
; PRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define double @test_pow_f64_x_known_positive
|
|
; NOPRELINK-SAME: (double nofpclass(ninf nsub nnorm) [[X:%.*]], double [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call double @_Z3powdd(double [[X]], double [[Y]])
|
|
; NOPRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call double @_Z3powdd(double %x, double %y)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64_x_known_positive(double nofpclass(ninf nnorm nsub) %x, double %y) {
|
|
; PRELINK-LABEL: define double @test_pow_afn_f64_x_known_positive
|
|
; PRELINK-SAME: (double nofpclass(ninf nsub nnorm) [[X:%.*]], double [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z4powrdd(double [[X]], double [[Y]])
|
|
; PRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define double @test_pow_afn_f64_x_known_positive
|
|
; NOPRELINK-SAME: (double nofpclass(ninf nsub nnorm) [[X:%.*]], double [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z3powdd(double [[X]], double [[Y]])
|
|
; NOPRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call afn double @_Z3powdd(double %x, double %y)
|
|
ret double %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_v2f64_x_known_positive(<2 x double> nofpclass(ninf nnorm nsub) %x, <2 x double> %y) {
|
|
; PRELINK-LABEL: define <2 x double> @test_pow_v2f64_x_known_positive
|
|
; PRELINK-SAME: (<2 x double> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call <2 x double> @_Z4powrDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x double> @test_pow_v2f64_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x double> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x double> @_Z3powDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
|
|
; NOPRELINK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
%pow = tail call <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> %y)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_afn_v2f64_x_known_positive(<2 x double> nofpclass(ninf nnorm nsub) %x, <2 x double> %y) {
|
|
; PRELINK-LABEL: define <2 x double> @test_pow_afn_v2f64_x_known_positive
|
|
; PRELINK-SAME: (<2 x double> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x double> @_Z4powrDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x double> @test_pow_afn_v2f64_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x double> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x double> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x double> @_Z3powDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
|
|
; NOPRELINK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
%pow = tail call afn <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> %y)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16_nnan_x_known_positive(half nofpclass(ninf nnorm nsub) %x, half %y) {
|
|
; PRELINK-LABEL: define half @test_pow_afn_f16_nnan_x_known_positive
|
|
; PRELINK-SAME: (half nofpclass(ninf nsub nnorm) [[X:%.*]], half [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn half @_Z4powrDhDh(half [[X]], half [[Y]])
|
|
; PRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define half @test_pow_afn_f16_nnan_x_known_positive
|
|
; NOPRELINK-SAME: (half nofpclass(ninf nsub nnorm) [[X:%.*]], half [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call nnan afn half @_Z3powDhDh(half [[X]], half [[Y]])
|
|
; NOPRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call afn nnan half @_Z3powDhDh(half %x, half %y)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16_nnan_ninf_x_known_positive(half nofpclass(ninf nnorm nsub) %x, half %y) {
|
|
; PRELINK-LABEL: define half @test_pow_afn_f16_nnan_ninf_x_known_positive
|
|
; PRELINK-SAME: (half nofpclass(ninf nsub nnorm) [[X:%.*]], half [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn half @llvm.log2.f16(half [[X]])
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn half [[Y]], [[__LOG2]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) half @llvm.exp2.f16(half [[__YLOGX]])
|
|
; PRELINK-NEXT: ret half [[__EXP2]]
|
|
;
|
|
; NOPRELINK-LABEL: define half @test_pow_afn_f16_nnan_ninf_x_known_positive
|
|
; NOPRELINK-SAME: (half nofpclass(ninf nsub nnorm) [[X:%.*]], half [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call nnan ninf afn half @_Z3powDhDh(half [[X]], half [[Y]])
|
|
; NOPRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call afn nnan ninf half @_Z3powDhDh(half %x, half %y)
|
|
ret half %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_afn_v2f16_nnan_x_known_positive(<2 x half> nofpclass(ninf nnorm nsub) %x, <2 x half> %y) {
|
|
; PRELINK-LABEL: define <2 x half> @test_pow_afn_v2f16_nnan_x_known_positive
|
|
; PRELINK-SAME: (<2 x half> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn <2 x half> @_Z4powrDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x half> @test_pow_afn_v2f16_nnan_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x half> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call nnan afn <2 x half> @_Z3powDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
|
|
; NOPRELINK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
%pow = tail call afn nnan <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> %y)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_afn_v2f16_nnan_ninf_x_known_positive(<2 x half> nofpclass(ninf nnorm nsub) %x, <2 x half> %y) {
|
|
; PRELINK-LABEL: define <2 x half> @test_pow_afn_v2f16_nnan_ninf_x_known_positive
|
|
; PRELINK-SAME: (<2 x half> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn <2 x half> @llvm.log2.v2f16(<2 x half> [[X]])
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn <2 x half> [[Y]], [[__LOG2]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) <2 x half> @llvm.exp2.v2f16(<2 x half> [[__YLOGX]])
|
|
; PRELINK-NEXT: ret <2 x half> [[__EXP2]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x half> @test_pow_afn_v2f16_nnan_ninf_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x half> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call nnan ninf afn <2 x half> @_Z3powDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
|
|
; NOPRELINK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> %y)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define half @test_pow_f16_x_known_positive(half nofpclass(ninf nnorm nsub) %x, half %y) {
|
|
; PRELINK-LABEL: define half @test_pow_f16_x_known_positive
|
|
; PRELINK-SAME: (half nofpclass(ninf nsub nnorm) [[X:%.*]], half [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call half @_Z4powrDhDh(half [[X]], half [[Y]])
|
|
; PRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define half @test_pow_f16_x_known_positive
|
|
; NOPRELINK-SAME: (half nofpclass(ninf nsub nnorm) [[X:%.*]], half [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call half @_Z3powDhDh(half [[X]], half [[Y]])
|
|
; NOPRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call half @_Z3powDhDh(half %x, half %y)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16_x_known_positive(half nofpclass(ninf nnorm nsub) %x, half %y) {
|
|
; PRELINK-LABEL: define half @test_pow_afn_f16_x_known_positive
|
|
; PRELINK-SAME: (half nofpclass(ninf nsub nnorm) [[X:%.*]], half [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z4powrDhDh(half [[X]], half [[Y]])
|
|
; PRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define half @test_pow_afn_f16_x_known_positive
|
|
; NOPRELINK-SAME: (half nofpclass(ninf nsub nnorm) [[X:%.*]], half [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z3powDhDh(half [[X]], half [[Y]])
|
|
; NOPRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call afn half @_Z3powDhDh(half %x, half %y)
|
|
ret half %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_v2f16_x_known_positive(<2 x half> nofpclass(ninf nnorm nsub) %x, <2 x half> %y) {
|
|
; PRELINK-LABEL: define <2 x half> @test_pow_v2f16_x_known_positive
|
|
; PRELINK-SAME: (<2 x half> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call <2 x half> @_Z4powrDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x half> @test_pow_v2f16_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x half> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x half> @_Z3powDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
|
|
; NOPRELINK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
%pow = tail call <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> %y)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_afn_v2f16_x_known_positive(<2 x half> nofpclass(ninf nnorm nsub) %x, <2 x half> %y) {
|
|
; PRELINK-LABEL: define <2 x half> @test_pow_afn_v2f16_x_known_positive
|
|
; PRELINK-SAME: (<2 x half> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x half> @_Z4powrDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
|
|
; PRELINK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x half> @test_pow_afn_v2f16_x_known_positive
|
|
; NOPRELINK-SAME: (<2 x half> nofpclass(ninf nsub nnorm) [[X:%.*]], <2 x half> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x half> @_Z3powDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
|
|
; NOPRELINK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
%pow = tail call afn <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> %y)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_0(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_0
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: ret float 1.000000e+00
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 0.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_n0(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_n0
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: ret float 1.000000e+00
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float -0.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_1(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_1
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: ret float [[X]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 1.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_n1(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_n1
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWRECIP:%.*]] = fdiv float 1.000000e+00, [[X]]
|
|
; CHECK-NEXT: ret float [[__POWRECIP]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float -1.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_2(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_2
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POW2:%.*]] = fmul float [[X]], [[X]]
|
|
; CHECK-NEXT: ret float [[__POW2]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 2.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_n2(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_n2
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 -2)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_n2
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float -2.000000e+00)
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float -2.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_half(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_half
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2SQRT:%.*]] = call float @_Z4sqrtf(float [[X]])
|
|
; PRELINK-NEXT: ret float [[__POW2SQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_half
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float 5.000000e-01)
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 0.5)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_neg_half(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_neg_half
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2RSQRT:%.*]] = call float @_Z5rsqrtf(float [[X]])
|
|
; PRELINK-NEXT: ret float [[__POW2RSQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_neg_half
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float -5.000000e-01)
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float -0.5)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_3(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_3
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 3)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_3
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float 3.000000e+00)
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 3.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_n3(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_n3
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 -3)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_n3
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float -3.000000e+00)
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float -3.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_2_5(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_2_5
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float 2.500000e+00)
|
|
; CHECK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 2.5)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_n_2_5(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_n_2_5
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float -2.500000e+00)
|
|
; CHECK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float -2.5)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_0(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_v2f32__y_0
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: ret <2 x float> splat (float 1.000000e+00)
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> zeroinitializer)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_n0(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_v2f32__y_n0
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: ret <2 x float> splat (float 1.000000e+00)
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -0.0, float -0.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_1(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_v2f32__y_1
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: ret <2 x float> [[X]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 1.0,float 1.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_n1(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_v2f32__y_n1
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWRECIP:%.*]] = fdiv <2 x float> splat (float 1.000000e+00), [[X]]
|
|
; CHECK-NEXT: ret <2 x float> [[__POWRECIP]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -1.0, float -1.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_2(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_v2f32__y_2
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POW2:%.*]] = fmul <2 x float> [[X]], [[X]]
|
|
; CHECK-NEXT: ret <2 x float> [[__POW2]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 2.0, float 2.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_n2(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_n2
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z4pownDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 -2))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_n2
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> splat (float -2.000000e+00))
|
|
; NOPRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -2.0, float -2.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_half(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_half
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2SQRT:%.*]] = call <2 x float> @_Z4sqrtDv2_f(<2 x float> [[X]])
|
|
; PRELINK-NEXT: ret <2 x float> [[__POW2SQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_half
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> splat (float 5.000000e-01))
|
|
; NOPRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 0.5, float 0.5>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_neg_half(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_neg_half
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2RSQRT:%.*]] = call <2 x float> @_Z5rsqrtDv2_f(<2 x float> [[X]])
|
|
; PRELINK-NEXT: ret <2 x float> [[__POW2RSQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_neg_half
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> splat (float -5.000000e-01))
|
|
; NOPRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -0.5, float -0.5>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_3(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_3
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z4pownDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 3))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_3
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> splat (float 3.000000e+00))
|
|
; NOPRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 3.0, float 3.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_n3(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_n3
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z4pownDv2_fDv2_i(<2 x float> [[X]], <2 x i32> splat (i32 -3))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_v2f32__y_n3
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> splat (float -3.000000e+00))
|
|
; NOPRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -3.0,float -3.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_2_5(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_v2f32__y_2_5
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> splat (float 2.500000e+00))
|
|
; CHECK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 2.5, float 2.5>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32__y_n_2_5(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_v2f32__y_n_2_5
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> splat (float -2.500000e+00))
|
|
; CHECK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float -2.5, float -2.5>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_f32__known_positive__y_0(float nofpclass(ninf nnorm nsub) %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__known_positive__y_0
|
|
; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) {
|
|
; CHECK-NEXT: ret float 1.000000e+00
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 0.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__known_positive__y_1(float nofpclass(ninf nnorm nsub) %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__known_positive__y_1
|
|
; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) {
|
|
; CHECK-NEXT: ret float [[X]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 1.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__known_positive__y_neg1(float nofpclass(ninf nnorm nsub) %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__known_positive__y_neg1
|
|
; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWRECIP:%.*]] = fdiv float 1.000000e+00, [[X]]
|
|
; CHECK-NEXT: ret float [[__POWRECIP]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float -1.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__known_positive__y_2(float nofpclass(ninf nnorm nsub) %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32__known_positive__y_2
|
|
; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POW2:%.*]] = fmul float [[X]], [[X]]
|
|
; CHECK-NEXT: ret float [[__POW2]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 2.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__known_positive__y_half(float nofpclass(ninf nnorm nsub) %x) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__known_positive__y_half
|
|
; PRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2SQRT:%.*]] = call float @_Z4sqrtf(float [[X]])
|
|
; PRELINK-NEXT: ret float [[__POW2SQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__known_positive__y_half
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float 5.000000e-01)
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float 0.5)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__known_positive__y_neghalf(float nofpclass(ninf nnorm nsub) %x) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__known_positive__y_neghalf
|
|
; PRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[__POW2RSQRT:%.*]] = call float @_Z5rsqrtf(float [[X]])
|
|
; PRELINK-NEXT: ret float [[__POW2RSQRT]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__known_positive__y_neghalf
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float -5.000000e-01)
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float -0.5)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32_x_assumed_oge_0(float %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_f32_x_assumed_oge_0
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[X_OGE_ZERO:%.*]] = fcmp oge float [[X]], 0.000000e+00
|
|
; PRELINK-NEXT: call void @llvm.assume(i1 [[X_OGE_ZERO]])
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4powrff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32_x_assumed_oge_0
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[X_OGE_ZERO:%.*]] = fcmp oge float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: call void @llvm.assume(i1 [[X_OGE_ZERO]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%x.oge.zero = fcmp oge float %x, 0.0
|
|
call void @llvm.assume(i1 %x.oge.zero)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32_x_assumed_ogt_0(float %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_f32_x_assumed_ogt_0
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[X_OGE_ZERO:%.*]] = fcmp ogt float [[X]], 0.000000e+00
|
|
; PRELINK-NEXT: call void @llvm.assume(i1 [[X_OGE_ZERO]])
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4powrff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32_x_assumed_ogt_0
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[X_OGE_ZERO:%.*]] = fcmp ogt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: call void @llvm.assume(i1 [[X_OGE_ZERO]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%x.oge.zero = fcmp ogt float %x, 0.0
|
|
call void @llvm.assume(i1 %x.oge.zero)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32_x_assumed_uge_0(float %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_f32_x_assumed_uge_0
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[X_UGE_ZERO:%.*]] = fcmp uge float [[X]], 0.000000e+00
|
|
; PRELINK-NEXT: call void @llvm.assume(i1 [[X_UGE_ZERO]])
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4powrff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32_x_assumed_uge_0
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[X_UGE_ZERO:%.*]] = fcmp uge float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: call void @llvm.assume(i1 [[X_UGE_ZERO]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%x.uge.zero = fcmp uge float %x, 0.0
|
|
call void @llvm.assume(i1 %x.uge.zero)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32_x_assumed_ugt_0(float %x, float %y) {
|
|
; PRELINK-LABEL: define float @test_pow_f32_x_assumed_ugt_0
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[X_UGT_ZERO:%.*]] = fcmp ugt float [[X]], 0.000000e+00
|
|
; PRELINK-NEXT: call void @llvm.assume(i1 [[X_UGT_ZERO]])
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4powrff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32_x_assumed_ugt_0
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[X_UGT_ZERO:%.*]] = fcmp ugt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: call void @llvm.assume(i1 [[X_UGT_ZERO]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%x.ugt.zero = fcmp ugt float %x, 0.0
|
|
call void @llvm.assume(i1 %x.ugt.zero)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32__y_poison(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32__y_poison
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 poison)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32__y_poison
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = call afn float @llvm.log2.f32(float [[TMP1]])
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.exp2.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.copysign.f32(float [[TMP3]], float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = fcmp afn oeq float [[TMP5]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = select afn i1 [[TMP7]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.copysign.f32(float [[TMP9]], float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = select afn i1 [[TMP8]], float [[TMP10]], float [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float 0x7FF8000000000000, float [[TMP11]]
|
|
; NOPRELINK-NEXT: ret float [[TMP13]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float poison)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32__y_3(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32__y_3
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 3)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32__y_3
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 3.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.copysign.f32(float [[TMP24]], float [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP23]], float [[TMP26]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP28]], float 0x7FF8000000000000, float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP29]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 3.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_ninf__y_3(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_3
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn float [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn float [[X]], [[__POWX2]]
|
|
; CHECK-NEXT: ret float [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float 3.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32__y_4(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32__y_4
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 4)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32__y_4
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 4.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.copysign.f32(float [[TMP24]], float [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP23]], float [[TMP26]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP28]], float 0x7FF8000000000000, float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP29]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 4.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_ninf__y_4(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_4
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn float [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn float [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: ret float [[__POWX21]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float 4.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_ninf__y_4_5(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_4_5
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan ninf afn float @_Z10__pow_fastff(float [[X]], float 4.500000e+00)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_4_5
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan ninf afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan ninf afn i1 [[TMP1]], float 1.000000e+00, float 4.500000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul nnan ninf afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan ninf afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call nnan ninf afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp nnan ninf afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan ninf afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call nnan ninf afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp nnan ninf afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select nnan ninf afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call nnan ninf afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp nnan ninf afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp nnan ninf afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select nnan ninf afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = fcmp nnan ninf afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan ninf afn i1 [[TMP20]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = select nnan ninf afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[TMP21]], float [[TMP22]])
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select nnan ninf afn i1 [[TMP20]], float [[TMP23]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: ret float [[TMP24]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float 4.5)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32__y_5(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32__y_5
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 5)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32__y_5
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float 5.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call afn float @llvm.copysign.f32(float [[TMP24]], float [[TMP25]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP23]], float [[TMP26]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP28]], float 0x7FF8000000000000, float [[TMP27]]
|
|
; NOPRELINK-NEXT: ret float [[TMP29]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float 5.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_ninf__y_5(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_5
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn float [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn float [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn float [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: ret float [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float 5.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32__y_neg5(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32__y_neg5
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 -5)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32__y_neg5
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float -5.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call afn float @llvm.log2.f32(float [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul afn float [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.exp2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp afn oeq float [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call afn float @llvm.trunc.f32(float [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp afn une float [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and i1 [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select afn i1 [[TMP12]], float [[X]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call afn float @llvm.copysign.f32(float [[TMP6]], float [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp afn une float [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp afn olt float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and i1 [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select afn i1 [[TMP18]], float 0x7FF8000000000000, float [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = call afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn oeq float [[TMP20]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp afn oeq float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = xor i1 [[TMP22]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP25]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP12]], float [[X]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.copysign.f32(float [[TMP26]], float [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP23]], float [[TMP28]], float [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno float [[X]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP30]], float 0x7FF8000000000000, float [[TMP29]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%pow = tail call afn float @_Z3powff(float %x, float -5.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_ninf__y_neg5(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_neg5
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn float [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn float [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn float [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: [[__1POWPROD:%.*]] = fdiv nnan ninf afn float 1.000000e+00, [[__POWPROD]]
|
|
; CHECK-NEXT: ret float [[__1POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float -5.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_ninf__y_10(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_10
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn float [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn float [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWX22:%.*]] = fmul nnan ninf afn float [[__POWX21]], [[__POWX21]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn float [[__POWX2]], [[__POWX22]]
|
|
; CHECK-NEXT: ret float [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float 10.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_poison(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_poison
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: ret <2 x float> poison
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> poison)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_3(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_3
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn <2 x float> [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn <2 x float> [[X]], [[__POWX2]]
|
|
; CHECK-NEXT: ret <2 x float> [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 3.0, float 3.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_4(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_4
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn <2 x float> [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn <2 x float> [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: ret <2 x float> [[__POWX21]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 4.0, float 4.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_4_5(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_4_5
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan ninf afn <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> splat (float 4.500000e+00))
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_4_5
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan ninf afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float 4.500000e+00)
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call nnan ninf afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call nnan ninf afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul nnan ninf afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan ninf afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan ninf afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp nnan ninf afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select nnan ninf afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp nnan ninf afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp nnan ninf afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select nnan ninf afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan ninf afn <2 x i1> [[TMP20]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = select nnan ninf afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP21]], <2 x float> [[TMP22]])
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select nnan ninf afn <2 x i1> [[TMP20]], <2 x float> [[TMP23]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP24]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 4.5, float 4.5>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_4_5_undef(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_4_5_undef
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan ninf afn <2 x float> @_Z10__pow_fastDv2_fS_(<2 x float> [[X]], <2 x float> <float 4.500000e+00, float poison>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_4_5_undef
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan ninf afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> <float 4.500000e+00, float poison>
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = call nnan ninf afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = call nnan ninf afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP3]])
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = fmul nnan ninf afn <2 x float> [[TMP2]], [[TMP4]]
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan ninf afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[TMP7]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = fmul nnan ninf afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP9]])
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fcmp nnan ninf afn une <2 x float> [[TMP10]], [[TMP9]]
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = and <2 x i1> [[TMP8]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = select nnan ninf afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP6]], <2 x float> [[TMP13]])
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = call nnan ninf afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = fcmp nnan ninf afn une <2 x float> [[TMP15]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = fcmp nnan ninf afn olt <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = and <2 x i1> [[TMP17]], [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = select nnan ninf afn <2 x i1> [[TMP18]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP14]]
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = fcmp nnan ninf afn oeq <2 x float> [[X]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan ninf afn <2 x i1> [[TMP20]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = select nnan ninf afn <2 x i1> [[TMP12]], <2 x float> [[X]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP21]], <2 x float> [[TMP22]])
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select nnan ninf afn <2 x i1> [[TMP20]], <2 x float> [[TMP23]], <2 x float> [[TMP19]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP24]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 4.5, float poison>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_5(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_afn_v2f32_nnan_ninf__y_5
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn <2 x float> [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn <2 x float> [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn <2 x float> [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: ret <2 x float> [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 5.0, float 5.0>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_ninf__y_5_known_positive(float nofpclass(ninf nsub nnorm) %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_5_known_positive
|
|
; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn float [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn float [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn float [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: ret float [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float 5.0)
|
|
ret float %pow
|
|
}
|
|
|
|
; we know we can ignore missing ninf on the input from the flag on the call
|
|
define float @test_pow_afn_f32_nnan_ninf__y_5_known_positive_with_ninf_flag(float nofpclass(nsub nnorm) %x) {
|
|
; CHECK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_5_known_positive_with_ninf_flag
|
|
; CHECK-SAME: (float nofpclass(nsub nnorm) [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn float [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn float [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn float [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: ret float [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float 5.0)
|
|
ret float %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64__y_3(double %x) {
|
|
; PRELINK-LABEL: define double @test_pow_afn_f64__y_3
|
|
; PRELINK-SAME: (double [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z4powndi(double [[X]], i32 3)
|
|
; PRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define double @test_pow_afn_f64__y_3
|
|
; NOPRELINK-SAME: (double [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z3powdd(double [[X]], double 3.000000e+00)
|
|
; NOPRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call afn double @_Z3powdd(double %x, double 3.0)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64_nnan_ninf__y_3(double %x) {
|
|
; CHECK-LABEL: define double @test_pow_afn_f64_nnan_ninf__y_3
|
|
; CHECK-SAME: (double [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn double [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn double [[X]], [[__POWX2]]
|
|
; CHECK-NEXT: ret double [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf double @_Z3powdd(double %x, double 3.0)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64__y_4(double %x) {
|
|
; PRELINK-LABEL: define double @test_pow_afn_f64__y_4
|
|
; PRELINK-SAME: (double [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z4powndi(double [[X]], i32 4)
|
|
; PRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define double @test_pow_afn_f64__y_4
|
|
; NOPRELINK-SAME: (double [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z3powdd(double [[X]], double 4.000000e+00)
|
|
; NOPRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call afn double @_Z3powdd(double %x, double 4.0)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64_nnan_ninf__y_4(double %x) {
|
|
; CHECK-LABEL: define double @test_pow_afn_f64_nnan_ninf__y_4
|
|
; CHECK-SAME: (double [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn double [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn double [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: ret double [[__POWX21]]
|
|
;
|
|
%pow = tail call afn nnan ninf double @_Z3powdd(double %x, double 4.0)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64_nnan_ninf__y_4_5(double %x) {
|
|
; CHECK-LABEL: define double @test_pow_afn_f64_nnan_ninf__y_4_5
|
|
; CHECK-SAME: (double [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call nnan ninf afn double @_Z3powdd(double [[X]], double 4.500000e+00)
|
|
; CHECK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call afn nnan ninf double @_Z3powdd(double %x, double 4.5)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64__y_5(double %x) {
|
|
; PRELINK-LABEL: define double @test_pow_afn_f64__y_5
|
|
; PRELINK-SAME: (double [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z4powndi(double [[X]], i32 5)
|
|
; PRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define double @test_pow_afn_f64__y_5
|
|
; NOPRELINK-SAME: (double [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z3powdd(double [[X]], double 5.000000e+00)
|
|
; NOPRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call afn double @_Z3powdd(double %x, double 5.0)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64_nnan_ninf__y_5(double %x) {
|
|
; CHECK-LABEL: define double @test_pow_afn_f64_nnan_ninf__y_5
|
|
; CHECK-SAME: (double [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn double [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn double [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn double [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: ret double [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf double @_Z3powdd(double %x, double 5.0)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64__y_neg5(double %x) {
|
|
; PRELINK-LABEL: define double @test_pow_afn_f64__y_neg5
|
|
; PRELINK-SAME: (double [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z4powndi(double [[X]], i32 -5)
|
|
; PRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define double @test_pow_afn_f64__y_neg5
|
|
; NOPRELINK-SAME: (double [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn double @_Z3powdd(double [[X]], double -5.000000e+00)
|
|
; NOPRELINK-NEXT: ret double [[POW]]
|
|
;
|
|
%pow = tail call afn double @_Z3powdd(double %x, double -5.0)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64_nnan_ninf__y_neg5(double %x) {
|
|
; CHECK-LABEL: define double @test_pow_afn_f64_nnan_ninf__y_neg5
|
|
; CHECK-SAME: (double [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn double [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn double [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn double [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: [[__1POWPROD:%.*]] = fdiv nnan ninf afn double 1.000000e+00, [[__POWPROD]]
|
|
; CHECK-NEXT: ret double [[__1POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf double @_Z3powdd(double %x, double -5.0)
|
|
ret double %pow
|
|
}
|
|
|
|
define double @test_pow_afn_f64_nnan_ninf__y_10(double %x) {
|
|
; CHECK-LABEL: define double @test_pow_afn_f64_nnan_ninf__y_10
|
|
; CHECK-SAME: (double [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn double [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn double [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWX22:%.*]] = fmul nnan ninf afn double [[__POWX21]], [[__POWX21]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn double [[__POWX2]], [[__POWX22]]
|
|
; CHECK-NEXT: ret double [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf double @_Z3powdd(double %x, double 10.0)
|
|
ret double %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_afn_v2f64_nnan_ninf__y_3(<2 x double> %x) {
|
|
; CHECK-LABEL: define <2 x double> @test_pow_afn_v2f64_nnan_ninf__y_3
|
|
; CHECK-SAME: (<2 x double> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn <2 x double> [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn <2 x double> [[X]], [[__POWX2]]
|
|
; CHECK-NEXT: ret <2 x double> [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> <double 3.0, double 3.0>)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_afn_v2f64_nnan_ninf__y_4(<2 x double> %x) {
|
|
; CHECK-LABEL: define <2 x double> @test_pow_afn_v2f64_nnan_ninf__y_4
|
|
; CHECK-SAME: (<2 x double> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn <2 x double> [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn <2 x double> [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: ret <2 x double> [[__POWX21]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> <double 4.0, double 4.0>)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_afn_v2f64_nnan_ninf__y_4_5(<2 x double> %x) {
|
|
; CHECK-LABEL: define <2 x double> @test_pow_afn_v2f64_nnan_ninf__y_4_5
|
|
; CHECK-SAME: (<2 x double> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call nnan ninf afn <2 x double> @_Z3powDv2_dS_(<2 x double> [[X]], <2 x double> splat (double 4.500000e+00))
|
|
; CHECK-NEXT: ret <2 x double> [[POW]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> <double 4.5, double 4.5>)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define <2 x double> @test_pow_afn_v2f64_nnan_ninf__y_5(<2 x double> %x) {
|
|
; CHECK-LABEL: define <2 x double> @test_pow_afn_v2f64_nnan_ninf__y_5
|
|
; CHECK-SAME: (<2 x double> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn <2 x double> [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn <2 x double> [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn <2 x double> [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: ret <2 x double> [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x double> @_Z3powDv2_dS_(<2 x double> %x, <2 x double> <double 5.0, double 5.0>)
|
|
ret <2 x double> %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16__y_3(half %x) {
|
|
; PRELINK-LABEL: define half @test_pow_afn_f16__y_3
|
|
; PRELINK-SAME: (half [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z4pownDhi(half [[X]], i32 3)
|
|
; PRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define half @test_pow_afn_f16__y_3
|
|
; NOPRELINK-SAME: (half [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z3powDhDh(half [[X]], half 0xH4200)
|
|
; NOPRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call afn half @_Z3powDhDh(half %x, half 3.0)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16_nnan_ninf__y_3(half %x) {
|
|
; CHECK-LABEL: define half @test_pow_afn_f16_nnan_ninf__y_3
|
|
; CHECK-SAME: (half [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn half [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn half [[X]], [[__POWX2]]
|
|
; CHECK-NEXT: ret half [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf half @_Z3powDhDh(half %x, half 3.0)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16__y_4(half %x) {
|
|
; PRELINK-LABEL: define half @test_pow_afn_f16__y_4
|
|
; PRELINK-SAME: (half [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z4pownDhi(half [[X]], i32 4)
|
|
; PRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define half @test_pow_afn_f16__y_4
|
|
; NOPRELINK-SAME: (half [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z3powDhDh(half [[X]], half 0xH4400)
|
|
; NOPRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call afn half @_Z3powDhDh(half %x, half 4.0)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16_nnan_ninf__y_4(half %x) {
|
|
; CHECK-LABEL: define half @test_pow_afn_f16_nnan_ninf__y_4
|
|
; CHECK-SAME: (half [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn half [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn half [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: ret half [[__POWX21]]
|
|
;
|
|
%pow = tail call afn nnan ninf half @_Z3powDhDh(half %x, half 4.0)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16_nnan_ninf__y_4_5(half %x) {
|
|
; CHECK-LABEL: define half @test_pow_afn_f16_nnan_ninf__y_4_5
|
|
; CHECK-SAME: (half [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call nnan ninf afn half @_Z3powDhDh(half [[X]], half 0xH4480)
|
|
; CHECK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call afn nnan ninf half @_Z3powDhDh(half %x, half 4.5)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16__y_5(half %x) {
|
|
; PRELINK-LABEL: define half @test_pow_afn_f16__y_5
|
|
; PRELINK-SAME: (half [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z4pownDhi(half [[X]], i32 5)
|
|
; PRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define half @test_pow_afn_f16__y_5
|
|
; NOPRELINK-SAME: (half [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z3powDhDh(half [[X]], half 0xH4500)
|
|
; NOPRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call afn half @_Z3powDhDh(half %x, half 5.0)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16_nnan_ninf__y_5(half %x) {
|
|
; CHECK-LABEL: define half @test_pow_afn_f16_nnan_ninf__y_5
|
|
; CHECK-SAME: (half [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn half [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn half [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn half [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: ret half [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf half @_Z3powDhDh(half %x, half 5.0)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16__y_neg5(half %x) {
|
|
; PRELINK-LABEL: define half @test_pow_afn_f16__y_neg5
|
|
; PRELINK-SAME: (half [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z4pownDhi(half [[X]], i32 -5)
|
|
; PRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define half @test_pow_afn_f16__y_neg5
|
|
; NOPRELINK-SAME: (half [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call afn half @_Z3powDhDh(half [[X]], half 0xHC500)
|
|
; NOPRELINK-NEXT: ret half [[POW]]
|
|
;
|
|
%pow = tail call afn half @_Z3powDhDh(half %x, half -5.0)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16_nnan_ninf__y_neg5(half %x) {
|
|
; CHECK-LABEL: define half @test_pow_afn_f16_nnan_ninf__y_neg5
|
|
; CHECK-SAME: (half [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn half [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn half [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn half [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: [[__1POWPROD:%.*]] = fdiv nnan ninf afn half 0xH3C00, [[__POWPROD]]
|
|
; CHECK-NEXT: ret half [[__1POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf half @_Z3powDhDh(half %x, half -5.0)
|
|
ret half %pow
|
|
}
|
|
|
|
define half @test_pow_afn_f16_nnan_ninf__y_10(half %x) {
|
|
; CHECK-LABEL: define half @test_pow_afn_f16_nnan_ninf__y_10
|
|
; CHECK-SAME: (half [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn half [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn half [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWX22:%.*]] = fmul nnan ninf afn half [[__POWX21]], [[__POWX21]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn half [[__POWX2]], [[__POWX22]]
|
|
; CHECK-NEXT: ret half [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf half @_Z3powDhDh(half %x, half 10.0)
|
|
ret half %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_afn_v2f16_nnan_ninf__y_3(<2 x half> %x) {
|
|
; CHECK-LABEL: define <2 x half> @test_pow_afn_v2f16_nnan_ninf__y_3
|
|
; CHECK-SAME: (<2 x half> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn <2 x half> [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn <2 x half> [[X]], [[__POWX2]]
|
|
; CHECK-NEXT: ret <2 x half> [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> <half 3.0, half 3.0>)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_afn_v2f16_nnan_ninf__y_4(<2 x half> %x) {
|
|
; CHECK-LABEL: define <2 x half> @test_pow_afn_v2f16_nnan_ninf__y_4
|
|
; CHECK-SAME: (<2 x half> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn <2 x half> [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn <2 x half> [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: ret <2 x half> [[__POWX21]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> <half 4.0, half 4.0>)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_afn_v2f16_nnan_ninf__y_4_5(<2 x half> %x) {
|
|
; CHECK-LABEL: define <2 x half> @test_pow_afn_v2f16_nnan_ninf__y_4_5
|
|
; CHECK-SAME: (<2 x half> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call nnan ninf afn <2 x half> @_Z3powDv2_DhS_(<2 x half> [[X]], <2 x half> splat (half 0xH4480))
|
|
; CHECK-NEXT: ret <2 x half> [[POW]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> <half 4.5, half 4.5>)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define <2 x half> @test_pow_afn_v2f16_nnan_ninf__y_5(<2 x half> %x) {
|
|
; CHECK-LABEL: define <2 x half> @test_pow_afn_v2f16_nnan_ninf__y_5
|
|
; CHECK-SAME: (<2 x half> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[__POWX2:%.*]] = fmul nnan ninf afn <2 x half> [[X]], [[X]]
|
|
; CHECK-NEXT: [[__POWX21:%.*]] = fmul nnan ninf afn <2 x half> [[__POWX2]], [[__POWX2]]
|
|
; CHECK-NEXT: [[__POWPROD:%.*]] = fmul nnan ninf afn <2 x half> [[X]], [[__POWX21]]
|
|
; CHECK-NEXT: ret <2 x half> [[__POWPROD]]
|
|
;
|
|
%pow = tail call afn nnan ninf <2 x half> @_Z3powDv2_DhS_(<2 x half> %x, <2 x half> <half 5.0, half 5.0>)
|
|
ret <2 x half> %pow
|
|
}
|
|
|
|
define float @test_pow_f32_known_integral_sitofp(float %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_f32_known_integral_sitofp
|
|
; PRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32_known_integral_sitofp
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y_CAST]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y.cast = sitofp i32 %y to float
|
|
%pow = tail call float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_known_integral_sitofp(float %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_known_integral_sitofp
|
|
; PRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_known_integral_sitofp
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = or i1 [[TMP23]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = xor i1 [[TMP24]], [[TMP26]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = select afn i1 [[TMP27]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = call afn float @llvm.copysign.f32(float [[TMP28]], float [[TMP29]])
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP25]], float [[TMP30]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = fcmp afn uno float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = select afn i1 [[TMP32]], float 0x7FF8000000000000, float [[TMP31]]
|
|
; NOPRELINK-NEXT: ret float [[TMP33]]
|
|
;
|
|
%y.cast = sitofp i32 %y to float
|
|
%pow = tail call afn float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_nnan_ninf_f32_known_integral_sitofp(float %x, i32 %y) {
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; PRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32_known_integral_sitofp
|
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; PRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
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; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
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; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
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|
; PRELINK-NEXT: [[POWNI2F:%.*]] = sitofp i32 [[TMP1]] to float
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; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[POWNI2F]]
|
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; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
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|
; PRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[TMP1]], 31
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; PRELINK-NEXT: [[TMP2:%.*]] = bitcast float [[X]] to i32
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; PRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP2]]
|
|
; PRELINK-NEXT: [[TMP3:%.*]] = bitcast i32 [[__POW_SIGN]] to float
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; PRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP3]])
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; PRELINK-NEXT: ret float [[__POW_SIGN1]]
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|
;
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; NOPRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32_known_integral_sitofp
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; NOPRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
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; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
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; NOPRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
|
|
; NOPRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; NOPRELINK-NEXT: [[__YTOU:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; NOPRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[__YTOU]], 31
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = bitcast float [[X]] to i32
|
|
; NOPRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP1]]
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
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; NOPRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP2]])
|
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; NOPRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
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%y.cast = sitofp i32 %y to float
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|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
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|
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define float @test_pow_afn_nnan_f32_known_integral_sitofp(float %x, i32 %y) {
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; PRELINK-LABEL: define float @test_pow_afn_nnan_f32_known_integral_sitofp
|
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; PRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
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|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn float @_Z11__pown_fastfi(float [[X]], i32 [[TMP1]])
|
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; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
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; NOPRELINK-LABEL: define float @test_pow_afn_nnan_f32_known_integral_sitofp
|
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; NOPRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan afn i1 [[TMP1]], float 1.000000e+00, float [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp nnan afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp nnan afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = or i1 [[TMP23]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = fcmp nnan afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = xor i1 [[TMP24]], [[TMP26]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = select nnan afn i1 [[TMP27]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP28]], float [[TMP29]])
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select nnan afn i1 [[TMP25]], float [[TMP30]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%y.cast = sitofp i32 %y to float
|
|
%pow = tail call afn nnan float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_ninf_f32_known_integral_sitofp(float %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_ninf_f32_known_integral_sitofp
|
|
; PRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call ninf afn float @_Z11__pown_fastfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_ninf_f32_known_integral_sitofp
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp ninf afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select ninf afn i1 [[TMP1]], float 1.000000e+00, float [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp ninf afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select ninf afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call ninf afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call ninf afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul ninf afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call ninf afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call ninf afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp ninf afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan ninf afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call ninf afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp ninf afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select ninf afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call ninf afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call ninf afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp ninf afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp ninf afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select ninf afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp ninf afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp ninf afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = xor i1 [[TMP22]], [[TMP23]]
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = select ninf afn i1 [[TMP24]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select ninf afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = call ninf afn float @llvm.copysign.f32(float [[TMP25]], float [[TMP26]])
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = select ninf afn i1 [[TMP22]], float [[TMP27]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = fcmp ninf afn uno float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select ninf afn i1 [[TMP29]], float 0x7FF8000000000000, float [[TMP28]]
|
|
; NOPRELINK-NEXT: ret float [[TMP30]]
|
|
;
|
|
%y.cast = sitofp i32 %y to float
|
|
%pow = tail call afn ninf float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_known_integral_sitofp_finite_argument(float %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_known_integral_sitofp_finite_argument
|
|
; PRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_known_integral_sitofp_finite_argument
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float nofpclass(nan inf) [[Y_CAST]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y.cast = sitofp i32 %y to float
|
|
%pow = tail call float @_Z3powff(float %x, float nofpclass(inf nan) %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32_known_integral_uitofp(float %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_f32_known_integral_uitofp
|
|
; PRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32_known_integral_uitofp
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y_CAST]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y.cast = uitofp i32 %y to float
|
|
%pow = tail call float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_known_integral_uitofp(float %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_known_integral_uitofp
|
|
; PRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_known_integral_uitofp
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = or i1 [[TMP23]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP24]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn float @llvm.copysign.f32(float [[TMP26]], float [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP25]], float [[TMP28]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP30]], float 0x7FF8000000000000, float [[TMP29]]
|
|
; NOPRELINK-NEXT: ret float [[TMP31]]
|
|
;
|
|
%y.cast = uitofp i32 %y to float
|
|
%pow = tail call afn float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_nnan_ninf_f32_known_integral_uitofp(float %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32_known_integral_uitofp
|
|
; PRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
|
|
; PRELINK-NEXT: [[POWNI2F:%.*]] = sitofp i32 [[TMP1]] to float
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[POWNI2F]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; PRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[TMP1]], 31
|
|
; PRELINK-NEXT: [[TMP2:%.*]] = bitcast float [[X]] to i32
|
|
; PRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP2]]
|
|
; PRELINK-NEXT: [[TMP3:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
|
; PRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP3]])
|
|
; PRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32_known_integral_uitofp
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
|
|
; NOPRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; NOPRELINK-NEXT: [[__YTOU:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; NOPRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[__YTOU]], 31
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = bitcast float [[X]] to i32
|
|
; NOPRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP1]]
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
|
; NOPRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP2]])
|
|
; NOPRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
|
%y.cast = uitofp i32 %y to float
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
; cast from i256 may produce infinity so can't assume integer without ninf
|
|
define float @test_pow_afn_nnan_f32_known_integral_uitofp_i256(float %x, i256 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_nnan_f32_known_integral_uitofp_i256
|
|
; PRELINK-SAME: (float [[X:%.*]], i256 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i256 [[Y]] to float
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn float @_Z10__pow_fastff(float [[X]], float [[Y_CAST]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_nnan_f32_known_integral_uitofp_i256
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i256 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i256 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan afn i1 [[TMP1]], float 1.000000e+00, float [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp nnan afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = fcmp nnan afn oeq float [[TMP2]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp nnan afn oeq float [[TMP23]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp nnan afn olt float [[TMP23]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select nnan afn i1 [[TMP25]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select nnan afn i1 [[TMP24]], float 1.000000e+00, float [[TMP26]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = select nnan afn i1 [[TMP22]], float [[TMP27]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp nnan afn oeq float [[TMP29]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = fcmp nnan afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = or i1 [[TMP30]], [[TMP31]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = select nnan afn i1 [[TMP31]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP33]], float [[TMP34]])
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = select nnan afn i1 [[TMP32]], float [[TMP35]], float [[TMP28]]
|
|
; NOPRELINK-NEXT: ret float [[TMP36]]
|
|
;
|
|
%y.cast = uitofp i256 %y to float
|
|
%pow = tail call afn nnan float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
; cast from i256 may produce infinity so can't assume integer without ninf
|
|
define float @test_pow_afn_nnan_f32_known_integral_sitofp_i256(float %x, i256 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_nnan_f32_known_integral_sitofp_i256
|
|
; PRELINK-SAME: (float [[X:%.*]], i256 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i256 [[Y]] to float
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call nnan afn float @_Z10__pow_fastff(float [[X]], float [[Y_CAST]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_nnan_f32_known_integral_sitofp_i256
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i256 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i256 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp nnan afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select nnan afn i1 [[TMP1]], float 1.000000e+00, float [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp nnan afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select nnan afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call nnan afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul nnan afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call nnan afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp nnan afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp nnan afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call nnan afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp nnan afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp nnan afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select nnan afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp nnan afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = fcmp nnan afn une float [[TMP2]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp nnan afn oeq float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = fcmp nnan afn olt float [[TMP26]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], [[TMP25]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = select nnan afn i1 [[TMP29]], float 0.000000e+00, float [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select nnan afn i1 [[TMP27]], float 1.000000e+00, float [[TMP30]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = select nnan afn i1 [[TMP23]], float [[TMP31]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = call nnan afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP34:%.*]] = fcmp nnan afn oeq float [[TMP33]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP35:%.*]] = fcmp nnan afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP36:%.*]] = or i1 [[TMP34]], [[TMP35]]
|
|
; NOPRELINK-NEXT: [[TMP37:%.*]] = fcmp nnan afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP38:%.*]] = xor i1 [[TMP35]], [[TMP37]]
|
|
; NOPRELINK-NEXT: [[TMP39:%.*]] = select nnan afn i1 [[TMP38]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP40:%.*]] = select nnan afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP41:%.*]] = call nnan afn float @llvm.copysign.f32(float [[TMP39]], float [[TMP40]])
|
|
; NOPRELINK-NEXT: [[TMP42:%.*]] = select nnan afn i1 [[TMP36]], float [[TMP41]], float [[TMP32]]
|
|
; NOPRELINK-NEXT: ret float [[TMP42]]
|
|
;
|
|
%y.cast = sitofp i256 %y to float
|
|
%pow = tail call afn nnan float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_nnan_ninf_f32_known_integral_uitofp_i256(float %x, i256 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32_known_integral_uitofp_i256
|
|
; PRELINK-SAME: (float [[X:%.*]], i256 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i256 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
|
|
; PRELINK-NEXT: [[POWNI2F:%.*]] = sitofp i32 [[TMP1]] to float
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[POWNI2F]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; PRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[TMP1]], 31
|
|
; PRELINK-NEXT: [[TMP2:%.*]] = bitcast float [[X]] to i32
|
|
; PRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP2]]
|
|
; PRELINK-NEXT: [[TMP3:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
|
; PRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP3]])
|
|
; PRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32_known_integral_uitofp_i256
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i256 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = uitofp i256 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
|
|
; NOPRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; NOPRELINK-NEXT: [[__YTOU:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; NOPRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[__YTOU]], 31
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = bitcast float [[X]] to i32
|
|
; NOPRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP1]]
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
|
; NOPRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP2]])
|
|
; NOPRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
|
%y.cast = uitofp i256 %y to float
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_nnan_ninf_f32_known_integral_sitofp_i256(float %x, i256 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32_known_integral_sitofp_i256
|
|
; PRELINK-SAME: (float [[X:%.*]], i256 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i256 [[Y]] to float
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; PRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
|
|
; PRELINK-NEXT: [[POWNI2F:%.*]] = sitofp i32 [[TMP1]] to float
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[POWNI2F]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; PRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[TMP1]], 31
|
|
; PRELINK-NEXT: [[TMP2:%.*]] = bitcast float [[X]] to i32
|
|
; PRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP2]]
|
|
; PRELINK-NEXT: [[TMP3:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
|
; PRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP3]])
|
|
; PRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32_known_integral_sitofp_i256
|
|
; NOPRELINK-SAME: (float [[X:%.*]], i256 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i256 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
|
|
; NOPRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; NOPRELINK-NEXT: [[__YTOU:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; NOPRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[__YTOU]], 31
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = bitcast float [[X]] to i32
|
|
; NOPRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP1]]
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
|
; NOPRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP2]])
|
|
; NOPRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
|
%y.cast = sitofp i256 %y to float
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_nnan_ninf_v2f32_known_integral_sitofp(<2 x float> %x, <2 x i32> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_nnan_ninf_v2f32_known_integral_sitofp
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]], <2 x i32> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp <2 x i32> [[Y]] to <2 x float>
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi <2 x float> [[Y_CAST]] to <2 x i32>
|
|
; PRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn <2 x float> @llvm.log2.v2f32(<2 x float> [[__FABS]])
|
|
; PRELINK-NEXT: [[POWNI2F:%.*]] = sitofp <2 x i32> [[TMP1]] to <2 x float>
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn <2 x float> [[__LOG2]], [[POWNI2F]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) <2 x float> @llvm.exp2.v2f32(<2 x float> [[__YLOGX]])
|
|
; PRELINK-NEXT: [[__YEVEN:%.*]] = shl <2 x i32> [[TMP1]], splat (i32 31)
|
|
; PRELINK-NEXT: [[TMP2:%.*]] = bitcast <2 x float> [[X]] to <2 x i32>
|
|
; PRELINK-NEXT: [[__POW_SIGN:%.*]] = and <2 x i32> [[__YEVEN]], [[TMP2]]
|
|
; PRELINK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[__POW_SIGN]] to <2 x float>
|
|
; PRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[__EXP2]], <2 x float> [[TMP3]])
|
|
; PRELINK-NEXT: ret <2 x float> [[__POW_SIGN1]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_nnan_ninf_v2f32_known_integral_sitofp
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]], <2 x i32> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp <2 x i32> [[Y]] to <2 x float>
|
|
; NOPRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn <2 x float> @llvm.log2.v2f32(<2 x float> [[__FABS]])
|
|
; NOPRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn <2 x float> [[__LOG2]], [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) <2 x float> @llvm.exp2.v2f32(<2 x float> [[__YLOGX]])
|
|
; NOPRELINK-NEXT: [[__YTOU:%.*]] = fptosi <2 x float> [[Y_CAST]] to <2 x i32>
|
|
; NOPRELINK-NEXT: [[__YEVEN:%.*]] = shl <2 x i32> [[__YTOU]], splat (i32 31)
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = bitcast <2 x float> [[X]] to <2 x i32>
|
|
; NOPRELINK-NEXT: [[__POW_SIGN:%.*]] = and <2 x i32> [[__YEVEN]], [[TMP1]]
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[__POW_SIGN]] to <2 x float>
|
|
; NOPRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[__EXP2]], <2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: ret <2 x float> [[__POW_SIGN1]]
|
|
;
|
|
%y.cast = sitofp <2 x i32> %y to <2 x float>
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y.cast)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32_known_integral_uitofp(<2 x float> %x, <2 x i32> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_v2f32_known_integral_uitofp
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]], <2 x i32> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = uitofp <2 x i32> [[Y]] to <2 x float>
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi <2 x float> [[Y_CAST]] to <2 x i32>
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z4pownDv2_fDv2_i(<2 x float> [[X]], <2 x i32> [[TMP1]])
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_v2f32_known_integral_uitofp
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]], <2 x i32> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = uitofp <2 x i32> [[Y]] to <2 x float>
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> [[Y_CAST]])
|
|
; NOPRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%y.cast = uitofp <2 x i32> %y to <2 x float>
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y.cast)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_v2f32_known_integral_uitofp(<2 x float> %x, <2 x i32> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_known_integral_uitofp
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]], <2 x i32> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = uitofp <2 x i32> [[Y]] to <2 x float>
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi <2 x float> [[Y_CAST]] to <2 x i32>
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn <2 x float> @_Z11__pown_fastDv2_fDv2_i(<2 x float> [[X]], <2 x i32> [[TMP1]])
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_v2f32_known_integral_uitofp
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]], <2 x i32> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = uitofp <2 x i32> [[Y]] to <2 x float>
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq <2 x float> [[X]], splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn <2 x i1> [[TMP1]], <2 x float> splat (float 1.000000e+00), <2 x float> [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq <2 x float> [[TMP2]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn <2 x i1> [[TMP3]], <2 x float> splat (float 1.000000e+00), <2 x float> [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn <2 x float> [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq <2 x float> [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn <2 x float> [[TMP2]], splat (float 5.000000e-01)
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une <2 x float> [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and <2 x i1> [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> splat (float 1.000000e+00)
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP8]], <2 x float> [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn <2 x float> @llvm.trunc.v2f32(<2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une <2 x float> [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and <2 x i1> [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn <2 x i1> [[TMP20]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq <2 x float> [[TMP22]], splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn oeq <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = or <2 x i1> [[TMP23]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn <2 x i1> [[TMP24]], <2 x float> zeroinitializer, <2 x float> splat (float 0x7FF0000000000000)
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = select afn <2 x i1> [[TMP14]], <2 x float> [[TMP4]], <2 x float> zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = call afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[TMP26]], <2 x float> [[TMP27]])
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn <2 x i1> [[TMP25]], <2 x float> [[TMP28]], <2 x float> [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = fcmp afn uno <2 x float> [[TMP4]], zeroinitializer
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn <2 x i1> [[TMP30]], <2 x float> splat (float 0x7FF8000000000000), <2 x float> [[TMP29]]
|
|
; NOPRELINK-NEXT: ret <2 x float> [[TMP31]]
|
|
;
|
|
%y.cast = uitofp <2 x i32> %y to <2 x float>
|
|
%pow = tail call afn <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y.cast)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_afn_nnan_ninf_v2f32_known_integral_uitofp(<2 x float> %x, <2 x i32> %y) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_afn_nnan_ninf_v2f32_known_integral_uitofp
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]], <2 x i32> [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = uitofp <2 x i32> [[Y]] to <2 x float>
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi <2 x float> [[Y_CAST]] to <2 x i32>
|
|
; PRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn <2 x float> @llvm.log2.v2f32(<2 x float> [[__FABS]])
|
|
; PRELINK-NEXT: [[POWNI2F:%.*]] = sitofp <2 x i32> [[TMP1]] to <2 x float>
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn <2 x float> [[__LOG2]], [[POWNI2F]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) <2 x float> @llvm.exp2.v2f32(<2 x float> [[__YLOGX]])
|
|
; PRELINK-NEXT: [[__YEVEN:%.*]] = shl <2 x i32> [[TMP1]], splat (i32 31)
|
|
; PRELINK-NEXT: [[TMP2:%.*]] = bitcast <2 x float> [[X]] to <2 x i32>
|
|
; PRELINK-NEXT: [[__POW_SIGN:%.*]] = and <2 x i32> [[__YEVEN]], [[TMP2]]
|
|
; PRELINK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[__POW_SIGN]] to <2 x float>
|
|
; PRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[__EXP2]], <2 x float> [[TMP3]])
|
|
; PRELINK-NEXT: ret <2 x float> [[__POW_SIGN1]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_afn_nnan_ninf_v2f32_known_integral_uitofp
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]], <2 x i32> [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = uitofp <2 x i32> [[Y]] to <2 x float>
|
|
; NOPRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
|
|
; NOPRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn <2 x float> @llvm.log2.v2f32(<2 x float> [[__FABS]])
|
|
; NOPRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn <2 x float> [[__LOG2]], [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) <2 x float> @llvm.exp2.v2f32(<2 x float> [[__YLOGX]])
|
|
; NOPRELINK-NEXT: [[__YTOU:%.*]] = fptosi <2 x float> [[Y_CAST]] to <2 x i32>
|
|
; NOPRELINK-NEXT: [[__YEVEN:%.*]] = shl <2 x i32> [[__YTOU]], splat (i32 31)
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = bitcast <2 x float> [[X]] to <2 x i32>
|
|
; NOPRELINK-NEXT: [[__POW_SIGN:%.*]] = and <2 x i32> [[__YEVEN]], [[TMP1]]
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[__POW_SIGN]] to <2 x float>
|
|
; NOPRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn <2 x float> @llvm.copysign.v2f32(<2 x float> [[__EXP2]], <2 x float> [[TMP2]])
|
|
; NOPRELINK-NEXT: ret <2 x float> [[__POW_SIGN1]]
|
|
;
|
|
%y.cast = uitofp <2 x i32> %y to <2 x float>
|
|
%pow = tail call afn nnan ninf <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> %y.cast)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
; Could fold to powr or pown
|
|
define float @test_pow_f32_known_positive_x__known_integral_sitofp(float nofpclass(ninf nsub nnorm) %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_f32_known_positive_x__known_integral_sitofp
|
|
; PRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4powrff(float [[X]], float [[Y_CAST]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32_known_positive_x__known_integral_sitofp
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y_CAST]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y.cast = sitofp i32 %y to float
|
|
%pow = tail call float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__known_positive_x__known_integral_y(float nofpclass(ninf nnorm nsub nzero) %x, i32 %y.int) #0 {
|
|
; PRELINK-LABEL: define float @test_pow_f32__known_positive_x__known_integral_y
|
|
; PRELINK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]], i32 [[Y_INT:%.*]]) #[[ATTR2]] {
|
|
; PRELINK-NEXT: entry:
|
|
; PRELINK-NEXT: [[Y:%.*]] = sitofp i32 [[Y_INT]] to float
|
|
; PRELINK-NEXT: [[CALL:%.*]] = tail call float @_Z4powrff(float [[X]], float [[Y]])
|
|
; PRELINK-NEXT: ret float [[CALL]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__known_positive_x__known_integral_y
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]], i32 [[Y_INT:%.*]]) #[[ATTR2]] {
|
|
; NOPRELINK-NEXT: entry:
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = sitofp i32 [[Y_INT]] to float
|
|
; NOPRELINK-NEXT: [[CALL:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[CALL]]
|
|
;
|
|
entry:
|
|
%y = sitofp i32 %y.int to float
|
|
%call = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %call
|
|
}
|
|
|
|
define float @test_pow_afn_f32_known_positive_x__known_integral_sitofp(float nofpclass(ninf nsub nnorm) %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_known_positive_x__known_integral_sitofp
|
|
; PRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__powr_fastff(float [[X]], float [[Y_CAST]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_known_positive_x__known_integral_sitofp
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn oeq float [[TMP17]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = or i1 [[TMP18]], [[TMP19]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = xor i1 [[TMP19]], [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = select afn i1 [[TMP22]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = call afn float @llvm.copysign.f32(float [[TMP23]], float [[TMP24]])
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = select afn i1 [[TMP20]], float [[TMP25]], float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = fcmp afn uno float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = select afn i1 [[TMP27]], float 0x7FF8000000000000, float [[TMP26]]
|
|
; NOPRELINK-NEXT: ret float [[TMP28]]
|
|
;
|
|
%y.cast = sitofp i32 %y to float
|
|
%pow = tail call afn float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_nnan_ninf_f32__known_positive_x__known_integral_sitofp(float nofpclass(ninf nsub nnorm) %x, i32 %y) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32__known_positive_x__known_integral_sitofp
|
|
; PRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[X]])
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[Y_CAST]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; PRELINK-NEXT: ret float [[__EXP2]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_nnan_ninf_f32__known_positive_x__known_integral_sitofp
|
|
; NOPRELINK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]], i32 [[Y:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_CAST:%.*]] = sitofp i32 [[Y]] to float
|
|
; NOPRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[Y_CAST]]
|
|
; NOPRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; NOPRELINK-NEXT: [[__YTOU:%.*]] = fptosi float [[Y_CAST]] to i32
|
|
; NOPRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[__YTOU]], 31
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = bitcast float [[X]] to i32
|
|
; NOPRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP1]]
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
|
; NOPRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP2]])
|
|
; NOPRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
|
%y.cast = sitofp i32 %y to float
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float %y.cast)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_trunc_maybe_inf(float %x, float nofpclass(nan) %y.arg) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_known_integral_trunc_maybe_inf
|
|
; CHECK-SAME: (float [[X:%.*]], float nofpclass(nan) [[Y_ARG:%.*]]) {
|
|
; CHECK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; CHECK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.trunc.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_trunc_maybe_nan(float %x, float nofpclass(inf) %y.arg) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_known_integral_trunc_maybe_nan
|
|
; CHECK-SAME: (float [[X:%.*]], float nofpclass(inf) [[Y_ARG:%.*]]) {
|
|
; CHECK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; CHECK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.trunc.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
; Cannot fold to pown, may still be inf
|
|
define float @test_pow_f32__y_known_integral_trunc_nnan_use(float %x, float %y.arg) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_known_integral_trunc_nnan_use
|
|
; CHECK-SAME: (float [[X:%.*]], float [[Y_ARG:%.*]]) {
|
|
; CHECK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call nnan float @_Z3powff(float [[X]], float [[Y]])
|
|
; CHECK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.trunc.f32(float %y.arg)
|
|
%pow = tail call nnan float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
; Cannot fold to pown, may still be nan
|
|
define float @test_pow_f32__y_known_integral_trunc_ninf_use(float %x, float %y.arg) {
|
|
; CHECK-LABEL: define float @test_pow_f32__y_known_integral_trunc_ninf_use
|
|
; CHECK-SAME: (float [[X:%.*]], float [[Y_ARG:%.*]]) {
|
|
; CHECK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call ninf float @_Z3powff(float [[X]], float [[Y]])
|
|
; CHECK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.trunc.f32(float %y.arg)
|
|
%pow = tail call ninf float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32_nnan_ninf__y_known_integral_trunc(float %x, float %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_known_integral_trunc
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; PRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
|
|
; PRELINK-NEXT: [[POWNI2F:%.*]] = sitofp i32 [[TMP1]] to float
|
|
; PRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[__LOG2]], [[POWNI2F]]
|
|
; PRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; PRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[TMP1]], 31
|
|
; PRELINK-NEXT: [[TMP2:%.*]] = bitcast float [[X]] to i32
|
|
; PRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP2]]
|
|
; PRELINK-NEXT: [[TMP3:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
|
; PRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP3]])
|
|
; PRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32_nnan_ninf__y_known_integral_trunc
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[__FABS:%.*]] = call nnan ninf afn float @llvm.fabs.f32(float [[X]])
|
|
; NOPRELINK-NEXT: [[__LOG2:%.*]] = call nnan ninf afn float @llvm.log2.f32(float [[__FABS]])
|
|
; NOPRELINK-NEXT: [[__YLOGX:%.*]] = fmul nnan ninf afn float [[Y]], [[__LOG2]]
|
|
; NOPRELINK-NEXT: [[__EXP2:%.*]] = call nnan ninf afn nofpclass(nan ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[__YLOGX]])
|
|
; NOPRELINK-NEXT: [[__YTOU:%.*]] = fptosi float [[Y]] to i32
|
|
; NOPRELINK-NEXT: [[__YEVEN:%.*]] = shl i32 [[__YTOU]], 31
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = bitcast float [[X]] to i32
|
|
; NOPRELINK-NEXT: [[__POW_SIGN:%.*]] = and i32 [[__YEVEN]], [[TMP1]]
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = bitcast i32 [[__POW_SIGN]] to float
|
|
; NOPRELINK-NEXT: [[__POW_SIGN1:%.*]] = call nnan ninf afn float @llvm.copysign.f32(float [[__EXP2]], float [[TMP2]])
|
|
; NOPRELINK-NEXT: ret float [[__POW_SIGN1]]
|
|
;
|
|
%y = call float @llvm.trunc.f32(float %y.arg)
|
|
%pow = tail call afn nnan ninf float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_afn_f32__y_known_integral_trunc(float %x, float nofpclass(inf nan) %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_afn_f32__y_known_integral_trunc
|
|
; PRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call afn float @_Z11__pown_fastfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_afn_f32__y_known_integral_trunc
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[TMP1:%.*]] = fcmp afn oeq float [[X]], 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP2:%.*]] = select afn i1 [[TMP1]], float 1.000000e+00, float [[Y]]
|
|
; NOPRELINK-NEXT: [[TMP3:%.*]] = fcmp afn oeq float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP4:%.*]] = select afn i1 [[TMP3]], float 1.000000e+00, float [[X]]
|
|
; NOPRELINK-NEXT: [[TMP5:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP6:%.*]] = call afn float @llvm.log2.f32(float [[TMP5]])
|
|
; NOPRELINK-NEXT: [[TMP7:%.*]] = fmul afn float [[TMP2]], [[TMP6]]
|
|
; NOPRELINK-NEXT: [[TMP8:%.*]] = call afn float @llvm.exp2.f32(float [[TMP7]])
|
|
; NOPRELINK-NEXT: [[TMP9:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP10:%.*]] = fcmp afn oeq float [[TMP9]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP11:%.*]] = fmul nnan afn float [[TMP2]], 5.000000e-01
|
|
; NOPRELINK-NEXT: [[TMP12:%.*]] = call afn float @llvm.trunc.f32(float [[TMP11]])
|
|
; NOPRELINK-NEXT: [[TMP13:%.*]] = fcmp afn une float [[TMP12]], [[TMP11]]
|
|
; NOPRELINK-NEXT: [[TMP14:%.*]] = and i1 [[TMP10]], [[TMP13]]
|
|
; NOPRELINK-NEXT: [[TMP15:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 1.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP16:%.*]] = call afn float @llvm.copysign.f32(float [[TMP8]], float [[TMP15]])
|
|
; NOPRELINK-NEXT: [[TMP17:%.*]] = call afn float @llvm.trunc.f32(float [[TMP2]])
|
|
; NOPRELINK-NEXT: [[TMP18:%.*]] = fcmp afn une float [[TMP17]], [[TMP2]]
|
|
; NOPRELINK-NEXT: [[TMP19:%.*]] = fcmp afn olt float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP20:%.*]] = and i1 [[TMP19]], [[TMP18]]
|
|
; NOPRELINK-NEXT: [[TMP21:%.*]] = select afn i1 [[TMP20]], float 0x7FF8000000000000, float [[TMP16]]
|
|
; NOPRELINK-NEXT: [[TMP22:%.*]] = call afn float @llvm.fabs.f32(float [[TMP4]])
|
|
; NOPRELINK-NEXT: [[TMP23:%.*]] = fcmp afn oeq float [[TMP22]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP24:%.*]] = fcmp afn oeq float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP25:%.*]] = or i1 [[TMP23]], [[TMP24]]
|
|
; NOPRELINK-NEXT: [[TMP26:%.*]] = fcmp afn olt float [[TMP2]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP27:%.*]] = xor i1 [[TMP24]], [[TMP26]]
|
|
; NOPRELINK-NEXT: [[TMP28:%.*]] = select afn i1 [[TMP27]], float 0.000000e+00, float 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: [[TMP29:%.*]] = select afn i1 [[TMP14]], float [[TMP4]], float 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP30:%.*]] = call afn float @llvm.copysign.f32(float [[TMP28]], float [[TMP29]])
|
|
; NOPRELINK-NEXT: [[TMP31:%.*]] = select afn i1 [[TMP25]], float [[TMP30]], float [[TMP21]]
|
|
; NOPRELINK-NEXT: [[TMP32:%.*]] = fcmp afn uno float [[TMP4]], 0.000000e+00
|
|
; NOPRELINK-NEXT: [[TMP33:%.*]] = select afn i1 [[TMP32]], float 0x7FF8000000000000, float [[TMP31]]
|
|
; NOPRELINK-NEXT: ret float [[TMP33]]
|
|
;
|
|
%y = call float @llvm.trunc.f32(float %y.arg)
|
|
%pow = tail call afn float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_floor(float %x, float nofpclass(inf nan) %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_known_integral_floor
|
|
; PRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.floor.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_known_integral_floor
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.floor.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.floor.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_ceil(float %x, float nofpclass(inf nan) %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_known_integral_ceil
|
|
; PRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.floor.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_known_integral_ceil
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.floor.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.floor.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_trunc(float %x, float nofpclass(inf nan) %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_known_integral_trunc
|
|
; PRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_known_integral_trunc
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.trunc.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.trunc.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_rint(float %x, float nofpclass(inf nan) %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_known_integral_rint
|
|
; PRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.rint.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_known_integral_rint
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.rint.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.rint.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_nearbyint(float %x, float nofpclass(inf nan) %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_known_integral_nearbyint
|
|
; PRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.nearbyint.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_known_integral_nearbyint
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.nearbyint.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.nearbyint.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_nearbyint_assume(float %x, float %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_known_integral_nearbyint_assume
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.nearbyint.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[Y_FABS:%.*]] = call float @llvm.fabs.f32(float [[Y]])
|
|
; PRELINK-NEXT: [[Y_IS_FINITE:%.*]] = fcmp one float [[Y_FABS]], 0x7FF0000000000000
|
|
; PRELINK-NEXT: call void @llvm.assume(i1 [[Y_IS_FINITE]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_known_integral_nearbyint_assume
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.nearbyint.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[Y_FABS:%.*]] = call float @llvm.fabs.f32(float [[Y]])
|
|
; NOPRELINK-NEXT: [[Y_IS_FINITE:%.*]] = fcmp one float [[Y_FABS]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: call void @llvm.assume(i1 [[Y_IS_FINITE]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.nearbyint.f32(float %y.arg)
|
|
%y.fabs = call float @llvm.fabs.f32(float %y)
|
|
%y.is.finite = fcmp one float %y.fabs, 0x7FF0000000000000
|
|
call void @llvm.assume(i1 %y.is.finite)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_nearbyint_assume_arg_input(float %x, float %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_known_integral_nearbyint_assume_arg_input
|
|
; PRELINK-SAME: (float [[X:%.*]], float [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y_ARG_FABS:%.*]] = call float @llvm.fabs.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[IS_FINITE:%.*]] = fcmp one float [[Y_ARG_FABS]], 0x7FF0000000000000
|
|
; PRELINK-NEXT: call void @llvm.assume(i1 [[IS_FINITE]])
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.nearbyint.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_known_integral_nearbyint_assume_arg_input
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y_ARG_FABS:%.*]] = call float @llvm.fabs.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[IS_FINITE:%.*]] = fcmp one float [[Y_ARG_FABS]], 0x7FF0000000000000
|
|
; NOPRELINK-NEXT: call void @llvm.assume(i1 [[IS_FINITE]])
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.nearbyint.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y.arg.fabs = call float @llvm.fabs.f32(float %y.arg)
|
|
%is.finite = fcmp one float %y.arg.fabs, 0x7FF0000000000000
|
|
call void @llvm.assume(i1 %is.finite)
|
|
%y = call float @llvm.nearbyint.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_round(float %x, float nofpclass(inf nan) %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_known_integral_round
|
|
; PRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.round.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_known_integral_round
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.round.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.round.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32__y_known_integral_roundeven(float %x, float nofpclass(inf nan) %y.arg) {
|
|
; PRELINK-LABEL: define float @test_pow_f32__y_known_integral_roundeven
|
|
; PRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; PRELINK-NEXT: [[Y:%.*]] = call float @llvm.roundeven.f32(float [[Y_ARG]])
|
|
; PRELINK-NEXT: [[TMP1:%.*]] = fptosi float [[Y]] to i32
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 [[TMP1]])
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32__y_known_integral_roundeven
|
|
; NOPRELINK-SAME: (float [[X:%.*]], float nofpclass(nan inf) [[Y_ARG:%.*]]) {
|
|
; NOPRELINK-NEXT: [[Y:%.*]] = call float @llvm.roundeven.f32(float [[Y_ARG]])
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float [[Y]])
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%y = call float @llvm.roundeven.f32(float %y.arg)
|
|
%pow = tail call float @_Z3powff(float %x, float %y)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32_known_integral_undef(float %x) {
|
|
; CHECK-LABEL: define float @test_pow_f32_known_integral_undef
|
|
; CHECK-SAME: (float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float undef)
|
|
; CHECK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float undef)
|
|
ret float %pow
|
|
}
|
|
|
|
define float @test_pow_f32_known_integral_poison(float %x) {
|
|
; PRELINK-LABEL: define float @test_pow_f32_known_integral_poison
|
|
; PRELINK-SAME: (float [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call float @_Z4pownfi(float [[X]], i32 poison)
|
|
; PRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define float @test_pow_f32_known_integral_poison
|
|
; NOPRELINK-SAME: (float [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call float @_Z3powff(float [[X]], float poison)
|
|
; NOPRELINK-NEXT: ret float [[POW]]
|
|
;
|
|
%pow = tail call float @_Z3powff(float %x, float poison)
|
|
ret float %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32_known_integral_constant_vector_undef_elt(<2 x float> %x) {
|
|
; CHECK-LABEL: define <2 x float> @test_pow_v2f32_known_integral_constant_vector_undef_elt
|
|
; CHECK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; CHECK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> <float 4.000000e+00, float undef>)
|
|
; CHECK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 4.0, float undef>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
define <2 x float> @test_pow_v2f32_known_integral_constant_vector_poison_elt(<2 x float> %x) {
|
|
; PRELINK-LABEL: define <2 x float> @test_pow_v2f32_known_integral_constant_vector_poison_elt
|
|
; PRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; PRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z4pownDv2_fDv2_i(<2 x float> [[X]], <2 x i32> <i32 4, i32 poison>)
|
|
; PRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
; NOPRELINK-LABEL: define <2 x float> @test_pow_v2f32_known_integral_constant_vector_poison_elt
|
|
; NOPRELINK-SAME: (<2 x float> [[X:%.*]]) {
|
|
; NOPRELINK-NEXT: [[POW:%.*]] = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> [[X]], <2 x float> <float 4.000000e+00, float poison>)
|
|
; NOPRELINK-NEXT: ret <2 x float> [[POW]]
|
|
;
|
|
%pow = tail call <2 x float> @_Z3powDv2_fS_(<2 x float> %x, <2 x float> <float 4.0, float poison>)
|
|
ret <2 x float> %pow
|
|
}
|
|
|
|
attributes #0 = { minsize }
|
|
attributes #1 = { noinline }
|
|
attributes #2 = { strictfp }
|
|
attributes #3 = { nobuiltin }
|
|
|
|
!llvm.module.flags = !{!0}
|
|
!0 = !{i32 1, !"amdgpu-libcall-have-fast-pow", i32 1}
|