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llvm-project/llvm/lib/Target/AArch64
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Lukacma d7aeea626d
[AArch64] optimise SVE prefetch intrinsics with no active lanes (#103052) 
This patch extends https://github.com/llvm/llvm-project/pull/73964 and
optimises away SVE prefetch intrinsics when predicate is zero.
2024-08-15 13:52:35 +01:00
..
AsmParser
[AArch64] Add FEAT_SME_B16B16 and remove FEAT_B16B16 (#102501)
2024-08-12 14:33:11 +01:00
Disassembler
[NFC] [AArch64] Refactor predicate register class decode functions (#97412)
2024-07-15 16:57:42 +01:00
GISel
Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434)
2024-08-08 10:58:45 +03:00
MCTargetDesc
Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434)
2024-08-08 10:58:45 +03:00
TargetInfo
…
Utils
[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263)
2024-04-09 17:27:46 +01:00
AArch64.h
[GISel] Make create.*InstructionSelector arguments const (#98243)
2024-07-10 09:01:27 -04:00
AArch64.td
[AArch64] Add FEAT_SME_B16B16 and remove FEAT_B16B16 (#102501)
2024-08-12 14:33:11 +01:00
AArch64A53Fix835769.cpp
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AArch64A57FPLoadBalancing.cpp
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AArch64AdvSIMDScalarPass.cpp
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AArch64Arm64ECCallLowering.cpp
[CodeGen][ARM64EC] Use alias symbol for exporting hybrid_patchable functions. (#100872)
2024-07-30 14:22:50 +02:00
AArch64AsmPrinter.cpp
[CodeGen][ARM64EC] Define hybrid_patchable EXP thunk symbol as a function. (#102898)
2024-08-13 13:39:42 +02:00
AArch64BranchTargets.cpp
…
AArch64CallingConvention.cpp
[AArch64][SVE] Lower function arguments in types of arrays of predicates (#90122)
2024-05-24 10:09:49 -07:00
AArch64CallingConvention.h
[AArch64] Support preserve_none calling convention (#91046)
2024-06-03 18:42:08 -04:00
AArch64CallingConvention.td
[AArch64] Support varargs for preserve_nonecc (#99434)
2024-07-21 00:29:18 -04:00
AArch64CleanupLocalDynamicTLSPass.cpp
[CodeGen][NewPM] Split MachineDominatorTree into a concrete analysis result (#94571)
2024-06-11 21:27:14 +08:00
AArch64CollectLOH.cpp
…
AArch64Combine.td
[AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (#90964)
2024-05-29 15:15:53 +01:00
AArch64CompressJumpTables.cpp
…
AArch64CondBrTuning.cpp
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AArch64ConditionalCompares.cpp
[Support] Erase blocks after DomTree::eraseNode (#101195)
2024-07-31 19:20:49 +02:00
AArch64ConditionOptimizer.cpp
[CodeGen][NewPM] Split MachineDominatorTree into a concrete analysis result (#94571)
2024-06-11 21:27:14 +08:00
AArch64DeadRegisterDefinitionsPass.cpp
[AArch64] Don't replace dst of SWP instructions with (X|W)ZR (#102139)
2024-08-07 15:15:25 +01:00
AArch64ExpandImm.cpp
[AArch64] Optimize MOV to ORR when load symmetric constants (#86249)
2024-05-20 09:57:50 +01:00
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434)
2024-08-08 10:58:45 +03:00
AArch64FalkorHWPFFix.cpp
[CodeGen][NewPM] Port machine-loops to new pass manager (#97793)
2024-07-09 09:11:18 +08:00
AArch64FastISel.cpp
Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434)
2024-08-08 10:58:45 +03:00
AArch64Features.td
[AArch64] Add FEAT_SME_B16B16 and remove FEAT_B16B16 (#102501)
2024-08-12 14:33:11 +01:00
AArch64FMV.td
[AArch64][TargetParser] Split FMV and extensions (#92882)
2024-06-20 15:33:21 +01:00
AArch64FrameLowering.cpp
[AArch64][Darwin][SME] Don't try to save VG to the stack for unwinding.
2024-08-13 01:46:43 -07:00
AArch64FrameLowering.h
[AArch64] Add streaming-mode stack hazard optimization remarks (#101695)
2024-08-06 11:39:01 +01:00
AArch64GenRegisterBankInfo.def
[AArch64] Fix || Add brackets for || inside of assert
2024-06-21 09:26:45 +01:00
AArch64GlobalsTagging.cpp
…
AArch64InstrAtomics.td
[AArch64][GlobalISel] Legalize Insert vector element (#81453)
2024-04-08 08:44:13 +01:00
AArch64InstrFormats.td
[AArch64][GlobalISel] Select SHL({Z|S}EXT, DUP Imm) into {U|S}HLL Imm (#96782)
2024-08-05 15:05:50 +01:00
AArch64InstrGISel.td
DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)
2024-06-13 11:52:22 +02:00
AArch64InstrInfo.cpp
[AArch64] Fold more load.x into load.i with large offset
2024-08-15 18:22:52 +08:00
AArch64InstrInfo.h
[AArch64] merge index address with large offset into base address
2024-08-15 18:22:52 +08:00
AArch64InstrInfo.td
[DAG] Support saturated truncate (#99418)
2024-08-14 09:52:36 +01:00
AArch64ISelDAGToDAG.cpp
[AArch64] Construct SmallVector<SDValue> with ArrayRef (NFC) (#102713)
2024-08-09 21:40:59 -07:00
AArch64ISelLowering.cpp
[DAG] Support saturated truncate (#99418)
2024-08-14 09:52:36 +01:00
AArch64ISelLowering.h
[DAG] Support saturated truncate (#99418)
2024-08-14 09:52:36 +01:00
AArch64LoadStoreOptimizer.cpp
[AArch64] Fold more load.x into load.i with large offset
2024-08-15 18:22:52 +08:00
AArch64LowerHomogeneousPrologEpilog.cpp
[IRBuilder] Don't include Module.h (NFC) (#97159)
2024-06-29 15:05:04 +02:00
AArch64MachineFunctionInfo.cpp
Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434)
2024-08-08 10:58:45 +03:00
AArch64MachineFunctionInfo.h
Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434)
2024-08-08 10:58:45 +03:00
AArch64MachineScheduler.cpp
…
AArch64MachineScheduler.h
…
AArch64MacroFusion.cpp
[CodeGen] Make the parameter TRI required in some functions. (#85968)
2024-04-24 14:24:14 +01:00
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
Revert "[PAC][CodeGen][ELF][AArch64] Support signed GOT" (#102434)
2024-08-08 10:58:45 +03:00
AArch64MCInstLower.h
…
AArch64MIPeepholeOpt.cpp
[AArch64] Peephole optimization to remove redundant csel instructions (#101483)
2024-08-05 11:34:59 +01:00
AArch64PBQPRegAlloc.cpp
[AArch64] Add a AArch64InstrInfo::isFpOrNEON method for checking physical register call. NFC
2024-07-15 08:13:52 +01:00
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
[AArch64][GlobalISel] Common some shuffle mask functions.
2024-05-06 18:37:04 +01:00
AArch64PfmCounters.td
…
AArch64PointerAuth.cpp
[PAC] Sign LR with B key for non-leaf functions with ptrauth-returns attr (#100552)
2024-07-25 22:21:03 +03:00
AArch64PointerAuth.h
[AArch64][PAC][NFC] Make checkAuthenticatedRegister() return void (#92507)
2024-05-21 13:19:21 -07:00
AArch64PostCoalescerPass.cpp
[CodeGen][NewPM] Port LiveIntervals to new pass manager (#98118)
2024-07-10 19:34:48 +08:00
AArch64Processors.td
[AArch64] Add FPAC to apple- processors that have it. (#102072)
2024-08-05 20:28:45 -07:00
AArch64PromoteConstant.cpp
…
AArch64RedundantCopyElimination.cpp
[CodeGen] Make the parameter TRI required in some functions. (#85968)
2024-04-24 14:24:14 +01:00
AArch64RegisterBanks.td
[AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (#92130)
2024-05-30 09:10:43 +01:00
AArch64RegisterInfo.cpp
[AArch64] Support varargs for preserve_nonecc (#99434)
2024-07-21 00:29:18 -04:00
AArch64RegisterInfo.h
[MachineLICM] Give opportunity to analyze physregs for invariance. (#84779)
2024-03-15 09:30:46 +00:00
AArch64RegisterInfo.td
[NFC] [AArch64] Refactor predicate register class decode functions (#97412)
2024-07-15 16:57:42 +01:00
AArch64SchedA53.td
…
AArch64SchedA55.td
…
AArch64SchedA57.td
…
AArch64SchedA57WriteRes.td
…
AArch64SchedA64FX.td
…
AArch64SchedA510.td
[AArch64] Update latencies for Cortex-A510 scheduling model (#87293)
2024-04-17 11:42:52 -07:00
AArch64SchedAmpere1.td
[AArch64] Adjust ROBsize for Ampere1/Ampere1A (NFC) (#86330)
2024-03-22 16:29:58 -07:00
AArch64SchedAmpere1B.td
[AArch64] Adjust ROBsize for Ampere1B (NFC) (#86331)
2024-03-22 16:30:12 -07:00
AArch64SchedCyclone.td
…
AArch64SchedExynosM3.td
…
AArch64SchedExynosM4.td
…
AArch64SchedExynosM5.td
…
AArch64SchedFalkor.td
…
AArch64SchedFalkorDetails.td
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AArch64SchedKryo.td
…
AArch64SchedKryoDetails.td
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AArch64SchedNeoverseN1.td
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AArch64SchedNeoverseN2.td
[AArch64] Ensure Neoverse-N2 scheduling model includes all SVE pseudos.
2024-03-08 09:52:49 +00:00
AArch64SchedNeoverseV1.td
[AArch64] Correct Neoverse V1 SVE 16-bit sdot/udot schedule pipelines. (#86142)
2024-03-25 11:20:56 +00:00
AArch64SchedNeoverseV2.td
[AArch64] Add flag setting instructions to scheduling model. (#96880)
2024-06-28 10:11:49 +01:00
AArch64SchedOryon.td
[AArch64] Add support for Qualcomm Oryon processor (#91022)
2024-06-06 07:27:50 -07:00
AArch64SchedPredExynos.td
…
AArch64SchedPredicates.td
…
AArch64SchedPredNeoverse.td
[AArch64] Fix scheduling model issue #96394 (#97047)
2024-07-01 11:34:23 +01:00
AArch64SchedThunderX2T99.td
…
AArch64SchedThunderX3T110.td
…
AArch64SchedThunderX.td
…
AArch64SchedTSV110.td
…
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263)
2024-04-09 17:27:46 +01:00
AArch64SelectionDAGInfo.h
[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263)
2024-04-09 17:27:46 +01:00
AArch64SIMDInstrOpt.cpp
…
AArch64SLSHardening.cpp
Fix MSVC "not all control paths return a value" warning. NFC.
2024-07-10 11:27:23 +01:00
AArch64SMEInstrInfo.td
[AArch64] Add FEAT_SME_B16B16 and remove FEAT_B16B16 (#102501)
2024-08-12 14:33:11 +01:00
AArch64SpeculationHardening.cpp
…
AArch64StackTagging.cpp
[IR] Add getDataLayout() helpers to Function and GlobalValue (#96919)
2024-06-28 08:36:49 +02:00
AArch64StackTaggingPreRA.cpp
…
AArch64StorePairSuppress.cpp
…
AArch64Subtarget.cpp
[AArch64] Increase scatter overhead on Neoverse-V2 (#101296)
2024-08-14 10:12:40 +05:30
AArch64Subtarget.h
[AArch64] Increase scatter overhead on Neoverse-V2 (#101296)
2024-08-14 10:12:40 +05:30
AArch64SVEInstrInfo.td
[AArch64] Add updated FEAT_SVE_B16B16 and begin replacement of 'b16b16' flag (#101480)
2024-08-07 17:26:46 +01:00
AArch64SystemOperands.td
[AArch64] Implement TRBMPAM_EL1 system register (#102485)
2024-08-09 11:59:40 +01:00
AArch64TargetMachine.cpp
[AArch64] When hardening against SLS, only create called thunks (#97472)
2024-07-05 13:12:09 +03:00
AArch64TargetMachine.h
Reapply [IR] Lazily initialize the class to pass name mapping (NFC) (#96321) (#96462)
2024-06-24 15:00:11 +02:00
AArch64TargetObjectFile.cpp
[AArch64][PAC] Lower ptrauth constants in code for MachO. (#97665)
2024-07-10 15:03:17 -07:00
AArch64TargetObjectFile.h
[AArch64][PAC] Lower ptrauth constants in code for MachO. (#97665)
2024-07-10 15:03:17 -07:00
AArch64TargetTransformInfo.cpp
[AArch64] optimise SVE prefetch intrinsics with no active lanes (#103052)
2024-08-15 13:52:35 +01:00
AArch64TargetTransformInfo.h
[LLVM][TTI][SME] Allow optional auto-vectorisation for streaming functions. (#101679)
2024-08-05 11:25:44 +01:00
CMakeLists.txt
[AArch64][LoopIdiom] Generalize AArch64LoopIdiomTransform into LoopIdiomVectorize (#94081)
2024-06-07 14:06:11 -07:00
SMEABIPass.cpp
[IRBuilder] Don't include Module.h (NFC) (#97159)
2024-06-29 15:05:04 +02:00
SMEInstrFormats.td
[CLANG][LLVM][AArch64]Add SME2.1 intrinsics for MOVAZ array to vector (#88901)
2024-07-01 08:23:16 +01:00
SVEInstrFormats.td
[LLVM][ISel][SVE] Remove redundant merging fp patterns. (#101351)
2024-08-01 13:59:38 +01:00
SVEIntrinsicOpts.cpp
[IRBuilder] Don't include Module.h (NFC) (#97159)
2024-06-29 15:05:04 +02:00