Vladislav Khmelevsky 199c400387

[JITLink][AArch64] Add LD64_GOTPAGE_LO15 rel support (#100854) ...

This relocation is used in order to address GOT entries using 15 bit
offset in ldr instruction. The offset is calculated relative to GOT
section page address.

2024-08-07 12:27:22 +04:00

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Interpreter

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JITLink

[JITLink][AArch64] Add LD64_GOTPAGE_LO15 rel support (#100854)

2024-08-07 12:27:22 +04:00

MCJIT

[IR] Remove support for icmp and fcmp constant expressions (#93038)

2024-06-04 08:31:03 +02:00

Orc

[JITLink][AArch32] Fix Unaligned Data Symbol Address Resolution (#97030)

2024-06-29 18:27:06 +03:00

OrcLazy

Reland "[lli] Revisit Orc debug output tests (#79055)"

2024-01-22 22:46:27 +01:00

RuntimeDyld

[MC,COFF] Change how we handle section symbols

2024-06-25 14:00:47 -07:00

2010-01-15-UndefValue.ll

[Interpreter] Add initialization of array members (#66172)

2023-10-20 15:27:11 +02:00

fma3-jit.ll

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frem.ll

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lit.local.cfg

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mov64zext32.ll

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test-interp-target-ext-type.ll

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test-interp-vec-arithm_float.ll

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test-interp-vec-arithm_int.ll

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test-interp-vec-cast.ll

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test-interp-vec-insertelement.ll

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test-interp-vec-insertextractvalue.ll

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test-interp-vec-loadstore.ll

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test-interp-vec-logical.ll

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test-interp-vec-select.ll

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test-interp-vec-setcond-fp.ll

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test-interp-vec-setcond-int.ll

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test-interp-vec-shift.ll

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test-interp-vec-shuffle.ll

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